Fujitsu Series 3 Manual
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4. Registers of Multifunction Timer 4.3.18. ADCMP Control Register A (ACSA) ACSA is a 16-bit register that controls ADCMP’s operation. This register controls all of ch0, ch1 and ch2 of ADCMP. Configuration of Register Bit 15 14 13 12 11 10 9 8 Field Reserved Reserved SEL2[1:0] SEL1[1:0] SEL0[1:0] Attribute - - R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Field Reserved Reserved CE2[1:0] CE1[1:0] CE0[1:0] Attribute - - R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Functions of Register [bit1:0] ACSA.CE0[1:0] Process Value Function 00 Disables the operation of ADCMP ch.0. 01 Enables the operation of ADCMP ch.0. Connects FRT ch.0 to ADCMP ch.0. 10 Enables the operation of ADCMP ch.0. Connects FRT ch.1 to ADCMP ch.0. Write 11 Enables the operation of ADCMP ch.0. Connects FRT ch.2 to ADCMP ch.0. Read - Reads the register setting. [bit3:2] ACSA.CE1[1:0] Process Value Function 00 Disables the operation of ADCMP ch.1. 01 Enables the operation of ADCMP ch.1. Connects FRT ch.0 to ADCMP ch.1. 10 Enables the operation of ADCMP ch.1. Connects FRT ch.1 to ADCMP ch.1. Write 11 Enables the operation of ADCMP ch.1. Connects FRT ch.2 to ADCMP ch.1. Read - Reads the register setting. FUJITSU SEMICONDUCTOR LIMITED CHAPTER 15: Multifunction Timer MN706-00002-1v0-E 575 MB9Axxx/MB9Bxxx Series
4. Registers of Multifunction Timer [bit5:4] ACSA.CE2[1:0] Process Value Function 00 Disables the operation of ADCMP ch.2. 01 Enables the operation of ADCMP ch.2. Connects FRT ch.0 to ADCMP ch.2. 10 Enables the operation of ADCMP ch.2. Connects FRT ch.1 to ADCMP ch.2. Write 11 Enables the operation of ADCMP ch.2. Connects FRT ch.2 to ADCMP ch.2. Read - Reads the register setting. ACSA.CE0[1:0], ACSA.CE1[1:0], and ACSA.CE2[1:0] ar e registers that specify whether to enable or disable the operation of ADCMP-ch.0, ADCMP-ch.1, and ADCMP-ch.2 respectively and also select the FRT to be connected. When the operation is enabled, ADCMP outputs the start instruction signal of AD conversion to ADC at the timing when there is a match between the compare value specified by the ADCMPDN register and the count value of the FRT connected. To enable the operation of ADCMP, make sure to set the values of the ACCP and ACCPDN registers beforehand. ADCMP ch.0 instructs ADC unit0 to start AD conversion. ADCMP ch.1 instructs ADC unit1 to start AD conversion. ADCMP ch.2 instructs ADC unit2 to start AD conversion. The AD conversion start signal output from ADCMP is connected to each ADC unit, after its output is selected by ATSA. When the operation is disabled, ADCMP does nothing. ADCMP can only select the connection to the FRT that exists within its own MFT. If the buffer function of ACCP and ACCPDN registers is to be used, use FRT-ch.0 for FRT to be connected. [bit7:6] Reserved Process Function Write 0 must be written at write access. Read 0 is read. FUJITSU SEMICONDUCTOR LIMITED CHAPTER 15: Multifunction Timer MN706-00002-1v0-E 576 MB9Axxx/MB9Bxxx Series
4. Registers of Multifunction Timer [bit9:8] ACSA.SEL0[1:0] Process Value Function 00 Instructs AD to be started, when FRT is in Up-count/Peak/Down-count state and it matches the setting value of ACCP0. Ignores the setting value of ACCPDN0. 01 Instructs AD to be started, when FRT is in Up-count state and it matches the setting value of ACCP0. Ignores the setting value of ACCPDN0. 10 Instructs AD to be started, when FR T is in Peak/Down-count state and it matches the setting value of ACCP0. Ignores the setting value of ACCPDN0. Write 11 Instructs AD to be started, when FRT is in Up-count state and it matches the setting value of ACCP0. Or instructs AD to be started, when FRT is in Peak/Down-count state and it matches the setting value of ACCPDN0. Read - Reads the register setting. [bit11:10] ACSA.SEL1[1:0] Process Value Function 00 Instructs AD to be started, when FRT is in Up-count/Peak/Down-count state and it matches the setting value of ACCP1. Ignores the setting value of ACCPDN1. 01 Instructs AD to be started, when FRT is in Up-count state and it matches the setting value of ACCP1. Ignores the setting value of ACCPDN1. 10 Instructs AD to be started, when FR T is in Peak/Down-count state and it matches the setting value of ACCP1. Ignores the setting value of ACCPDN1. Write 11 Instructs AD to be started, when FRT is in Up-count state and it matches the setting value of ACCP1. Or instructs AD to be started, when FRT is in Peak/Down-count state and it matches the setting value of ACCPDN1. Read - Reads the register setting. [bit13:12] ACSA.SEL2[1:0] Process Value Function 00 Instructs AD to be started, when FRT is in Up-count/Peak/Down-count state and it matches the setting value of ACCP2. Ignores the setting value of ACCPDN2. 01 Instructs AD to be started, when FRT is in Up-count state and it matches the setting value of ACCP2. Ignores the setting value of ACCPDN2. 10 Instructs AD to be started, when FR T is in Peak/Down-count state and it matches the setting value of ACCP2. Ignores the setting value of ACCPDN2. Write 11 Instructs AD to be started, when FRT is in Up-count state and it matches the setting value of ACCP2. Or instructs AD to be started, when FRT is in Peak/Down-count state and it matches the setting value of ACCPDN2. Read - Reads the register setting. FUJITSU SEMICONDUCTOR LIMITED CHAPTER 15: Multifunction Timer MN706-00002-1v0-E 577 MB9Axxx/MB9Bxxx Series
4. Registers of Multifunction Timer ACSA.SEL0[1:0], ACSA.SEL1[1:0], and ACSA.SEL2[1:0] are registers that specify which count state FRT should be in to instruct AD conversion to be started at each channel of ADCMP. Change the setting of these register, when the operation of ADCMP to be connected is disabled. When using FRT in Up-count mode, set 00 to these registers for use. Figure 4-10 shows an example of the oper ation when SEL is set to 00. Figure 4-10 Example of Operation when SEL=00 ACSA.SEL=00 FRT count 0x0000 time PEAK (=TCCP) ACCP ADC start ADC start ADC start ADC start Figure 4-11 shows an example of the oper ation when SEL is set to 01. Figure 4-11 Example of Operation when SEL=01 ACSA.SEL=01 FRT count 0x0000 time PEAK (=TCCP) ACCP ADC start ADC start FUJITSU SEMICONDUCTOR LIMITED CHAPTER 15: Multifunction Timer MN706-00002-1v0-E 578 MB9Axxx/MB9Bxxx Series
4. Registers of Multifunction Timer Figure 4-12 shows an example of the oper ation when SEL is set to 10. Figure 4-12 Example of Operation when SEL=10 ACSA.SEL=10 FRT count 0x0000 time PEAK (=TCCP) ACCP ADC start ADC start Figure 4-13 shows an example of the oper ation when SEL is set to 11. Figure 4-13 Example of Operation when SEL=11 ACSA.SEL=11 FRT count 0x0000 time ADC start ADC start PEAK (=TCCP)ADC start ADC start ACCP ACCPDN [bit15:14] Reserved Process Function Write 0 must be written at write access. Read 0 is read. FUJITSU SEMICONDUCTOR LIMITED CHAPTER 15: Multifunction Timer MN706-00002-1v0-E 579 MB9Axxx/MB9Bxxx Series
4. Registers of Multifunction Timer 4.3.19. ADCMP Control Register B (ACSB) ACSB is an 8-bit register that controls ADCMP’s operation. This register controls all of ch.0, ch.1 and ch.2 of ADCMP. Configuration of Register Bit 7 6 5 4 3 2 1 0 Field Reserved BTS2 BTS1 BTS0 ReservedBDIS2 BDIS1 BDIS0 Attribute - R/W R/W R/W - R/W R/W R/W Initial Value 0 0 0 0 0 1 1 1 Functions of Register [bit0] ACSB.BDIS0 Process Value Function 0 Enables the buffer function of the ACCP0 and ACCPDN0 registers. Write 1 Disables the buffer function of the ACCP0 and ACCPDN0 registers. Read - Reads the register setting. [bit1] ACSB.BDIS1 Process Value Function 0 Enables the buffer function of the ACCP1 and ACCPDN1 registers. Write 1 Disables the buffer function of the ACCP1 and ACCPDN1 registers. Read - Reads the register setting. [bit2] ACSB.BDIS2 Process Value Function 0 Enables the buffer function of the ACCP2 and ACCPDN2 registers. Write 1 Disables the buffer function of the ACCP2 and ACCPDN2 registers. Read - Reads the register setting. ACSB.BDIS0 is a register that specifies whether to enable or disable the buffer function of the ACCP0 and ACCPDN0 registers. ACSB.BDIS1 is a register that specifies whether to enable or disable the buffer function of the ACCP1 and ACCPDN1 registers. ACSB.BDIS2 is a register that specifies whether to enable or disable the buffer function of the ACCP2 and ACCPDN2 registers. Change the setting of these registers, when the operation of ADCMP to be connected is disabled. If the buffer function of ACCP and ACCPDN registers is to be used, use FRT-ch.0 for FRT to be connected. See 4.3.20 ADCMP Compare Value Store Register (ACCP) and 4.3.21 ADCMP Compare Value Store Register , Down-c o unt Direction Only (ACCPDN) . FUJITSU SEMICONDUCTOR LIMITED CHAPTER 15: Multifunction Timer MN706-00002-1v0-E 580 MB9Axxx/MB9Bxxx Series
4. Registers of Multifunction Timer [bit3] Reserved Process Function Write 0 must be written at write access. Read 0 is read. [bit4] ACSB.BTS0 Process Value Function 0 Performs buffer transfer of the ACCP0 and ACCPDN0 registers upon Zero value detection by FRT. Write 1 Performs buffer transfer of the ACCP0 and ACCPDN0 registers upon Peak value detection by FRT. Read - Reads the register setting. [bit5] ACSB.BTS1 Process Value Function 0 Performs buffer transfer of the ACCP1 and ACCPDN1 registers upon Zero value detection by FRT. Write 1 Performs buffer transfer of the ACCP1 and ACCPDN1 registers upon Peak value detection by FRT. Read - Reads the register setting. [bit6] ACSB.BTS2 Process Value Function 0 Performs buffer transfer of the ACCP2 and ACCPDN2 registers upon Zero value detection by FRT. Write 1 Performs buffer transfer of the ACCP2 and ACCPDN2 registers upon Peak value detection by FRT. Read - Reads the register setting. ACSB.BTS0 is a register that specifies the timing of transferring data from the buffer register to the ACCP0 and ACCPDN0 registers when the buffer function is enabled. ACSB.BTS1 is a register that specifies the timing of transferring data from the buffer register to the ACCP1 and ACCPDN1 registers when the buffer function is enabled. ACSB.BTS2 is a register that specifies the timing of transferring data from the buffer register to the ACCP2 and ACCPDN2 registers when the buffer function is enabled. Change the setting of these registers, when the operation of ADCMP to be connected is disabled. See 4.3.20 ADCMP Compare Value Store Register (ACCP) and 4.3.21 ADCMP Compare Value Store Register , Down-c o unt Direction Only (ACCPDN) . FUJITSU SEMICONDUCTOR LIMITED CHAPTER 15: Multifunction Timer MN706-00002-1v0-E 581 MB9Axxx/MB9Bxxx Series
4. Registers of Multifunction Timer [bit7] Reserved Process Function Write 0 must be written at write access. Read 0 is read. FUJITSU SEMICONDUCTOR LIMITED CHAPTER 15: Multifunction Timer MN706-00002-1v0-E 582 MB9Axxx/MB9Bxxx Series
4. Registers of Multifunction Timer 4.3.20. ADCMP Compare Value Store Register (ACCP) ACCP is a 16-bit register that specifies the timing of starting AD conversion at ADCMP as the compare value of the FRT count value. Each mounted channel has three registers: ACCP0, ACCP1 and ACCP2. ACCP0 stores the compare value of ADCMP ch0. ACCP1 stores the compare value of ADCMP ch1. ACCP2 stores the compare value of ADCMP ch2. It should be noted that this register does not allow for byte access. Configuration of Register Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Field ACCP[15:0] Attribute R/W Initial Va l u e 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Functions of Register [bit15:0] ACCP.ACCP[15:0] Process Function Write Specifies the timing of starting AD conver sion. The value is written to the ACCP buffer register. Read Reads the value in the ACCP register ( not the value in the ACCP buffer register). ACCP is a register that specifies the timing of starting AD conversion. Each specifies the timing of starting AD conversion in combination with the settings of ACSA.SEL0[1:0], ACSA.SEL1[1:0], and ACSA.SEL2[1:0]. When data is written to this address area, the data is fi rst stored in the buffer register. And then, the data is transferred from the buffer register to the ACCP register under the following conditions. When the buffer function is disabled: Data is transferred immediately after it is written to the buffer register. When the buffer function is enabled and the tran sfer upon Zero value detection is enabled: Data is transferred, when FRT’s counter is stopped or when FRT’s count value has reached 0x0000. When the buffer function is enabled and the tran sfer upon Peak value detection is enabled: Data is transferred, when FRT’s counter is stopped or when FRT’s count value has matched the TCCP value. The enabling/disabling of the buffer function and the timin g of data transfer are determined by the value of the corresponding register ACSB.BDIS0, BDIS1, BDIS2, BTS0, BDIS1, or BDIS2. During FRT’s count operation, the timing of starting AD conversion can be changed by rewriting to this register. When the buffer function is disabled, the written value can be immediately reflected on the ACCP register. When the buffer function is enabled, the settings in the ACCP register for multiple channels can be synchronized. If data is read from this address area, the value in th e ACCP register is read, rather than the value in the buffer register. Therefore, it should be noted that no bit can be rewritten by RMW access to this address area when the buffer function is enabled. FUJITSU SEMICONDUCTOR LIMITED CHAPTER 15: Multifunction Timer MN706-00002-1v0-E 583 MB9Axxx/MB9Bxxx Series
4. Registers of Multifunction Timer AD conversion cannot be started by writing 0x0000 to this register. As the initial value of this register is 0x0 000, make sure to rewrite it to another value before use. To start AD conversion upon Zero value detection, use the starting method by the TCSB.AD0E, TCSB.AD1E and TCSB.AD2E registers. If the buffer function of ACCP register is to be used, use FRT-ch.0 for FRT to be connected. It should be noted that when ACSA.SEL0[1:0], SEL1[1:0], SEL[1:0] に01, 10, 11 are set, FRT’s Peak value (=TCCP) will be ignored, even if it is set to ACCP. FUJITSU SEMICONDUCTOR LIMITED CHAPTER 15: Multifunction Timer MN706-00002-1v0-E 584 MB9Axxx/MB9Bxxx Series