Home > Fujitsu > Controller > Fujitsu Series 3 Manual

Fujitsu Series 3 Manual

Add to Favourites
    Download as PDF Print this page Share this page

    Have a look at the manual Fujitsu Series 3 Manual online for free. It’s possible to download the document as PDF or print. UserManuals.tech offer 86 Fujitsu manuals and user’s guides for free. Share the user manual or guide on Facebook, Twitter or Google+.

    View all the pages
    Page
    of 1384
    Add page 321 to Favourites
    image text
    Enable zoom 
    							 
4. Register List 
 
[bit9:8] QBIN1S : QBIN1S Input Select Bit Selects input for QPRC BIN1. 
bit9:8 Description 
Reading  Reads out the register value. 
Writing 00  Uses BIN1_0 at the input pin of QPRC-ch1’s BIN. [Initial value] 
Writing 01  Same as Writing 00. 
Writing 10  Uses BIN1_1 at the input pin of QPRC-ch1’s BIN. 
Writing 11 Uses BIN1_2 at the input pin of QPRC-ch1’s BIN. 
 
[bit7:6] QAIN1S : QAIN1S Input Select Bit  Selects input for QPRC AIN1. 
bit7:6 Description 
Reading  Reads out the register value. 
Writing 00  Uses AIN1_0 at the input pin of QPRC-ch1’s AIN. [Initial value] 
Writing 01  Same as Writing 00. 
Writing 10 Uses AIN1_1 at the input pin of QPRC-ch1’s AIN. 
Writing 11 Uses AIN1_2 at the input pin of QPRC-ch1’s AIN. 
 
[bit5:4] QZIN0S : QZIN0S Input Select Bit  Selects input for QPRC ZIN0. 
bit5:4 Description 
Reading  Reads out the register value. 
Writing 00  Uses ZIN0_0 at the input pin of QPRC-ch0’s ZIN. [Initial value] 
Writing 01  Same as Writing 00. 
Writing 10 Uses ZIN0_1 at the input pin of QPRC-ch0’s ZIN. 
Writing 11 Uses ZIN0_2 at the input pin of QPRC-ch0’s ZIN.   
 
[bit3:2] QBIN0S : QBIN0S Input Select Bit  Selects input for QPRC BIN0. 
bit3:2 Description 
Reading  Reads out the register value. 
Writing 00  Uses BIN0_0 at the input pin of QPRC-ch0’s BIN. [Initial value] 
Writing 01  Same as Writing 00. 
Writing 10  Uses BIN0_1 at the input pin of QPRC-ch0’s BIN. 
Writing 11 Uses BIN0_2 at the input pin of QPRC-ch0’s BIN. 
 
[bit1:0] QAIN0S : QAIN0S Input Select Bit    Selects input for QPRC AIN0. 
bit1:0 Description 
Reading  Reads out the register value. 
Writing 00  Uses AIN0_0 at the input pin of QPRC-ch0’s AIN. [Initial value] 
Writing 01  Same as Writing 00. 
Writing 10 Uses AIN0_1 at the input pin of QPRC-ch0’s AIN. 
Writing 11 Uses AIN0_2 at the input pin of QPRC-ch0’s AIN. 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  9: I/O  PORT 
MN706-00002-1v0-E 
285 
MB9Axxx/MB9Bxxx  Series
    Add page 322 to Favourites
    image text
    Enable zoom 
    							 
4. Register List 
 
4.17.  Extended Pin Function Setting Register 10 (EPFR10) 
The EPFR10 register assigns functions to external bus peripheral pins.   
 Register Configuration 
bit  31 30 29  28 27 26 25 24 
Field  UEA24EUEA23E UEA22E UEA21EUEA20E UEA19E UEA18E  UEA17E
Attribute R/W R/W R/W  R/W R/W R/W R/W R/W 
Initial value 1’b0 1’b0 1’b0  1’b0 1’b0 1’b0 1’b0 1’b0 
           
bit  23 22 21  20 19 18 17 16 
Field UEA16E UEA15E UEA14E UEA13EUEA12E UEA11E UEA10E  UEA09E
Attribute  R/W R/W R/W  R/W R/W R/W R/W R/W 
Initial value 1’b0 1’b0 1’b0  1’b0 1’b0 1’b0 1’b0 1’b0 
           
bit  15 14 13  12 11 10  9 8 
Field UEA08E UEAOOE UECS7EUECS6EUECS5E UECS4E UECS3E  UECS2E
Attribute  R/W R/W R/W  R/W R/W R/W R/W R/W 
Initial value 1’b0 1’b0 1’b0  1’b0 1’b0 1’b0 1’b0 1’b0 
            
bit  7 6 5  4 3 2 1  0 
Field UECS1E UEFLSE UEOEXE UEDQME UEWEXE TESTBUEDTHB  UEDEFB
Attribute  R/W R/W R/W  R/W R/W R/W R/W  R/W 
Initial value 1’b0 1’b0 1’b0  1’b0 1’b0 1’b0 1’b0  1’b0 
 Register Function 
[bit31] UEA24E : UEA24E Output Select Bit 
Selects output for external bus Adress24. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD24. [Initial value] 
Writing 1 Produces output for user external bus MAD24. 
 
[bit30] UEA23E : UEA23E Output Select Bit  Selects output for external bus Adress23. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD23. [Initial value] 
Writing 1 Produces output for user external bus MAD23. 
 
[bit29] UEA22E : UEA22E Output Select Bit  Selects output for external bus Adress22. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD22. [Initial value] 
Writing 1 Produces output for user external bus MAD22. 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  9: I/O  PORT 
MN706-00002-1v0-E 
286 
MB9Axxx/MB9Bxxx  Series
    Add page 323 to Favourites
    image text
    Enable zoom 
    							 
4. Register List 
 
[bit28] UEA21E : UEA21E Output Select Bit Selects output for external bus Adress21. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD21. [Initial value] 
Writing 1 Produces output for user external bus MAD21. 
 
[bit27] UEA20E : UEA20E Output Select Bit  Selects output for external bus Adress20. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD20. [Initial value] 
Writing 1 Produces output for user external bus MAD20. 
 
[bit26] UEA19E : UEA19E Output Select Bit  Selects output for external bus Adress19. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD19. [Initial value] 
Writing 1 Produce output for user external bus MAD19. 
 
[bit25] UEA18E : UEA18E Output Select Bit  Selects output for external bus Adress18. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD18. [Initial value] 
Writing 1 Produces output for user external bus MAD18.   
 
[bit24] UEA17E : UEA17E Output Select Bit  Selects output for external bus Adress17. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD17. [Initial value] 
Writing 1 Produces output for user external bus MAD17.   
 
[bit23] UEA16E : UEA16E Output Select Bit  Selects output for external bus Adress16. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Produces output for user external bus MAD16. [Initial value] 
Writing 1 Produces output for user external bus MAD16. 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  9: I/O  PORT 
MN706-00002-1v0-E 
287 
MB9Axxx/MB9Bxxx  Series
    Add page 324 to Favourites
    image text
    Enable zoom 
    							 
4. Register List 
 
[bit22] UEA15E : UEA15E Output Select Bit Selects output for external bus Adress15. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD15. [Initial value] 
Writing 1 Produces output for user external bus MAD15. 
 
[bit21] UEA14E : UEA14E Output Select Bit  Selects output for external bus Adress14. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD14. [Initial value] 
Writing 1 Produces output for user external bus MAD14. 
 
[bit20] UEA13E : UEA13E Output Select Bit  Selects output for external bus Adress13. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD13. [Initial value] 
Writing 1 Produces output for user external bus MAD13.   
 
[bit19] UEA12E : UEA12E Output Select Bit  Selects output for external bus Adress12. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD12. [Initial value] 
Writing 1 Produces output for user external bus MAD12.   
 
[bit18] UEA11E : UEA11E Output Select Bit  Selects output for external bus Adress11.   
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD11. [Initial value] 
Writing 1 Produces output for user external bus MAD11. 
 
[bit17] UEA10E : UEA10E Output Select Bit  Selects output for external bus Adress10.   
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD10. [Initial value] 
Writing 1 Produces output for user external bus MAD10. 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  9: I/O  PORT 
MN706-00002-1v0-E 
288 
MB9Axxx/MB9Bxxx  Series
    Add page 325 to Favourites
    image text
    Enable zoom 
    							 
4. Register List 
 
[bit16] UEA09E : UEA09E Output Select Bit Selects output for external bus Adress09. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD09. [Initial value] 
Writing 1 Produces output for user external bus MAD09. 
 
[bit15] UEA08E : UEA08E Output Select Bit  Selects output for external bus Adress08. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD08. [Initial value] 
Writing 1 Produces output for user external bus MAD08. 
 
[bit14] UEAOOE : UEAOOE Output Select Bit  Selects output for external bus Adress00. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD00. [Initial value] 
Writing 1 Produces output for user external bus MAD00. 
 
[bit13] UECS7E : UECS7E Output Select Bit  Selects output for external bus CS7. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MCSX7. [Initial value] 
Writing 1 Produces output for us er external bus MCSX7.   
 
[bit12] UECS6E : UECS6E Output Select Bit  Selects output for external bus CS6. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MCSX6. [Initial value] 
Writing 1  Selects output for user external bus MCSX6. 
 
[bit11] UECS5E : UECS5E Output Select Bit  Selects output for external bus CS5. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MCSX5. [Initial value] 
Writing 1 Produces output for  user external bus MCSX5. 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  9: I/O  PORT 
MN706-00002-1v0-E 
289 
MB9Axxx/MB9Bxxx  Series
    Add page 326 to Favourites
    image text
    Enable zoom 
    							 
4. Register List 
 
[bit10] UECS4E : UECS4E Output Select Bit Selects output for external bus CS4. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MCSX4. [Initial value] 
Writing 1 Produces output for  user external bus MCSX4. 
 
[bit9] UECS3E : UECS3E Output Select Bit  Selects output for external bus CS3. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MCSX3. [Initial value] 
Writing 1 Produces output for  user external bus MCSX3. 
 
[bit8] UECS2E : UECS2E Output Select Bit  Selects output for external bus CS2. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MCSX2. [Initial value] 
Writing 1 Produces output for  user external bus MCSX2. 
 
[bit7] UECS1E : UECS1E Output Select Bit  Selects output for external bus CS1. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MCSX1. [Initial value] 
Writing 1 Produces output for  user external bus MCSX1. 
 
[bit6] UEFLSE : UEFLSE Output Select Bit  Selects output for external bus  NAND-Flash control signal.   
bit Description 
Reading Reads out the register value. 
Writing 0  Does not produce output for user extern
al bus MNALE, MNCLE, MNWEX, or 
MNREX. [Initial value] 
Writing 1  Produces output for user external bus MNALE, MNCLE, MNWEX, and 
MNREX. 
 
[bit5] UEOEXE : UEOEXE Output Select Bit  Selects output for external bus OEX. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MOEX. [Initial value] 
Writing 1 Produces output for user external bus MOEX. 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  9: I/O  PORT 
MN706-00002-1v0-E 
290 
MB9Axxx/MB9Bxxx  Series
    Add page 327 to Favourites
    image text
    Enable zoom 
    							 
4. Register List 
 
[bit4] UEDQME : UEDQME Output Select Bit Selects output for external bus DQM. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MDQM1or MDQM0. [Initial value] 
Writing 1  Produces output for user external bus MDQM1 and MDQM0. 
 
[bit3] UEWEXE : UEWEXE Output Select Bit  Selects output for external bus WEX. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MWEX. [Initial value] 
Writing 1 Produces output for user external bus MWEX. 
 
[bit2] TESTB : TESTB Test Bit  This bit is used for test. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Always write 0. [Initial value] 
Writing 1 Setting disabled. 
 
  [bit1] UEDTHB : UEDTHB Input/Output Select Bit  Selects input/output for external bus data.   
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus WD15-WD08. [Initial value] 
Input of user external bus RD15-RD08 is connected to the pin.   
Writing 1 Produces output for user external bus WD15-WD08.   
Input of user external bus RD15-RD08 is connected to the pin. 
 
[bit0] UEDEFB : UEDEFB Input/Output Select Bit  Selects input/output for external bus signal. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD07-MAD01. 
Does not produce output for us
er external bus MCSX0. 
Does not produce output for user  external bus WD07-WD00.   
Input of user external bus RD07-RD00 is connected to the pin. [Initial value] 
Writing 1  Produces output for user external bus MAD07-MAD01. 
Produces output for user external bus MCSX0.   
Produces output for user external bus WD7-WD0.   
Input of user external bus RD7-RD0 is connected to the pin.   
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  9: I/O  PORT 
MN706-00002-1v0-E 
291 
MB9Axxx/MB9Bxxx  Series
    Add page 328 to Favourites
    image text
    Enable zoom 
    							 
4. Register List 
 
4.18.  Special Port Setting Register (SPSR) 
The SPSR register sets a pin as a signal pin of special functions. 
 Register Configuration 
bit  31 30 29  28 27 26 25 24 
Field Reserved 
Attribute - 
Initial value   
           
bit  23 22 21  20 19 18 17 16 
Field Reserved 
Attribute - 
Initial value   
           
bit  15 14 13  12 11 10  9 8 
Field Reserved 
Attribute - 
Initial value   
            
bit  7 6 5  4 3 2 1  0 
Field Reserved  USB0CReserved  SUBXC
Attribute -  R/W - R/W 
Initial value   1’b0   1’b1 
 Register Function 
[bit31:8] res : Reserved Bit 
0x000000 is read from these bits.   
When writing these bits, set them to 0x000000.   
[bit7:5] res : Reserved Bit  0b000 is read from these bits.   
When writing these bits, set them to 0b000.   
[bit4] USB0C : USB (ch.0) Pin Setting Register  This bit sets a pin as a USB pin. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not use two pins of UDM0 and UDP0 as USB pins but as digital 
input/output pins. [Initial value] 
Writing 1 Uses two pins of UDM0 and UDP0 as USB pins. 
(An I/O cell will be in a state of input direction and input cut-off.) 
 
[bit3:1] res : Reserved Bit  0b000 is read from these bits.   
When writing these bits, set them to 0b000.   
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  9: I/O  PORT 
MN706-00002-1v0-E 
292 
MB9Axxx/MB9Bxxx  Series
    Add page 329 to Favourites
    image text
    Enable zoom 
    							 
4. Register List 
 
[bit0] SUBXC : Sub Clock (Oscillation) Pin Setting Register This bit sets a pin as a sub clock (oscillation) pin. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not use two pins of X0A and X1A as sub clock (oscillation) pins but as 
digital input/output pins. 
Writing 1 Uses two pins of X0A and X1A as sub clock (oscillation) pins. [Initial value] 
(An I/O cell will be in a state of input direction, input cut-off, and pull-up 
disconnection.) 
 
 
Writin g 1

 to the SUBXC bit does not make a sub clock start oscillation. 
To make  it start o

scillation, enable oscillation by the SOSCE bit of the System Clock Mode Control 
Register (SCM_CTL) described in the chapter CLOCK. 
 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  9: I/O  PORT 
MN706-00002-1v0-E 
293 
MB9Axxx/MB9Bxxx  Series
    Add page 330 to Favourites
    image text
    Enable zoom 
    							 
5. Usage Precautions 
 
5. Usage Precautions 
This section describes precautions for using this I/O board.   
 ON/OFF of the Pull-up Resistance When SPL=1 
SPL is a signal for turning a pin into Hi-Z state during standby mode.   
  When SPL=0  Normal operations   
   When SPL=1  Pin Hi-Z, input cut-off, pull-up disconnection   
However, the SPL bit cannot be used for setting external interrupts, NMIX, JTAG, or 
TRACE pins.   
For details of the SPL bit, see Chapter Low Power Consumption Mode.   
  DTTIX Input 
DTTI input is an input signal for switching the dual-purpose motor control PWM output (RTO) setting 
output pin to its other GPIO pin setting to address a motor stop demand in an emergency.   
To use this function, enable switching by EPFR.   
  Procedures for Switching Pin Functions 
When switching the outputs for peripheral functions using the EPFR register, to prevent pin uncertain 
output (Hi-Z), switch settings according to the procedures similar to th e switching example shown in the 
following  Figure 5-1 . 
Figure 5-1 Procedures for Switching Pin Functions 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
DDR Register Value
PDOR Register Value
EPFR Register Value
PFR Register Value
Pin Output Level Pin Output ContentsDontcare
Dontcare
Select Peripheral Macro A
1. Set to GPIO output direction  (DDR=1)
2. Set GPIO output value using PDOR (inac tive output value for peripheral  function A)
4. Switch pin functions to GPIO (PFR=0)
Select Peripheral Macro B
5. Change pin function selection from A to B
3. Stop the output of peripheral function A
6. Set GPIO output value using PDOR
   (Inactive output value of peripheral function B)
7. Switch pin functions to peripheral (PFR=1)
8. Start the output of peripheral function B
Peripheral Function A OutputPeripheral Macro B OutputGPIO Output
In order to avoid pin output uncertaint y (Hiz) while switching EPFR settings, 
switch EPFR pin settings after changing to GPIO setting (PFR=0). 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  9: I/O  PORT 
MN706-00002-1v0-E 
294 
MB9Axxx/MB9Bxxx  Series
    All Fujitsu manuals Comments (0)