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Fujitsu Series 3 Manual

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4. Registers 
 
4.10.  IRQ08/10/12/14/16/18/20/22 Batch Read Register (IRQxxMON) 
IRQ08MON indicates all of the interrupt requests allocated to interrupt vector no. 24. 
IRQ10MON indicates all of the interrupt requests allocated to interrupt vector no. 26. 
IRQ12MON indicates all of the interrupt requests allocated to interrupt vector no. 28. 
IRQ14MON indicates all of the interrupt requests allocated to interrupt vector no. 30. 
IRQ16MON indicates all of the interrupt requests allocated to interrupt vector no. 32. 
IRQ18MON indicates all of the interrupt requests allocated to interrupt vector no. 34. 
IRQ20MON indicates all of the interrupt requests allocated to interrupt vector no. 36. 
IRQ22MON indicates all of the interrupt requests allocated to interrupt vector no. 38. 
IRQ08MON shows the status of  the transmission interrupt request and the status interrupt request on MFS ch.0. 
IRQ10MON shows the status of  the transmission interrupt request and the status interrupt request on MFS ch.1. 
IRQ12MON shows the status of  the transmission interrupt request and the status interrupt request on MFS ch.2. 
IRQ14MON shows the status of  the transmission interrupt request and the status interrupt request on MFS ch.3. 
IRQ16MON shows the status of  the transmission interrupt request and the status interrupt request on MFS ch.4. 
IRQ18MON shows the status of  the transmission interrupt request and the status interrupt request on MFS ch.5. 
IRQ20MON shows the status of  the transmission interrupt request and the status interrupt request on MFS ch.6. 
IRQ22MON shows the status of  the transmission interrupt request and the status interrupt request on MFS ch.7. 
 
bit 31  16
Field Reserved 
Attribute R 
Initial  value  0x0000 
  bit 15 14 13 12 11 109 8 7 6 5 4 3 2 1 0 
Field Reserved MFSINT
Attribute  R R R R R  R R R R R R R R R R  R 
Initial 
value  0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
 
[bit31:2] Reserved: Reserved bits  Reads out 0. 
 
[bit1:0] MFSINT: 
bit no.  bit  Description 
0 No status interrupt request on the corresponding MFS channel. 1 
1 Status interrupt request on the corresponding MFS channel. 
0 No transmission interrupt request on the corresponding MFS channel. 0 
1 Transmission interrupt request on the corresponding MFS channel. 
 If DMA transfer requests are selected by the DRQS EL register, the corresponding MFSINT bit is 0. 
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4. Registers 
 
4.11.  IRQ23 Batch Read Register (IRQ23MON) 
IRQ23MON indicates all of the interrupt requests allocated to interrupt vector no. 39. 
 
bit 31  16
Field Reserved 
Attribute R 
Initial  value  0x0000 
  bit 15 14 13 12 11 109 8 7 6 5 4 3 2 1 0 
Field Reserved PPGINT 
Attribute  R R R R R R R R  R R R R R R R  R 
Initial 
value  0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
 
[bit31:6] Reserved: Reserved bits  Reads out 0. 
 
[bit5:0] PPGINT: 
bit no.  bit  Description 
0 No interrupt request on PPG ch. 12 5 
1 Interrupt request on PPG ch. 12 
0 No interrupt request on PPG ch. 10 4 
1 Interrupt request on PPG ch. 10 
0 No interrupt request on PPG ch. 8 3 
1 Interrupt request on PPG ch. 8 
0 No interrupt request on PPG ch. 4 2 
1 Interrupt request on PPG ch. 4 
0 No interrupt request on PPG ch. 2 1 
1 Interrupt request on PPG ch. 2 
0 No interrupt request on PPG ch. 0 0 
1 Interrupt request on PPG ch. 0 
 
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4. Registers 
 
4.12.  IRQ24 Batch Read Register (IRQ24MON) 
IRQ24MON indicates all of the interrupt requests allocated to interrupt vector no. 40. 
 
bit 31  16
Field Reserved 
Attribute R 
Initial  value  0x0000 
  bit 15 14 13 1211 10 9 87654 3 2 1 0 
Field Reserved WCINTUPLLINTMPLLINT SOSCINT MOSCINT
Attribute  R R R RR R R  RR RR R  R  R R R 
Initial 
value  0 0 0 0
0 0 0  00 00 0  0  0 0 0 
 
[bit31:5] Reserved: Reserved bits  Reads out 0. 
 
[bit4] WCINT: 
bit Description 
0  No watch counter interrupt request 
1 Watch counter interrupt request 
 
[bit3] UPLLINT: 
bit Description 
0  No stabilization wait completion interrupt request for USB PLL oscillation 
1 Stabilization wait completion interrupt request for USB PLL oscillation 
 
[bit2] UPLLINT: 
bit Description 
0  No stabilization wait completion interrupt request for PLL oscillation 
1 Stabilization wait completion interrupt request for PLL oscillation 
 
[bit1] SOSCINT: 
bit Description 
0  No stabilization wait completion interrupt request for sub-clock oscillation 
1 Stabilization wait completion interrupt request for sub-clock oscillation 
 
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4. Registers 
 
[bit0] MOSCINT: 
bit Description 
0 No stabilization wait completion interrupt request for main clock oscillation 
1 Stabilization wait completion interrupt request for main clock oscillation 
 
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4. Registers 
 
4.13.  IRQ25/26/27 Batch Read Register (IRQxxMON) 
IRQ25MON indicates all of the interrupt requests allocated to interrupt vector no. 41. 
IRQ26MON indicates all of the interrupt requests allocated to interrupt vector no. 42. 
IRQ27MON indicates all of the interrupt requests allocated to interrupt vector no. 43. 
IRQ25MON shows the status of  the interrupt request in A/D converter unit 0. 
IRQ26MON shows the status of  the interrupt request in A/D converter unit 1. 
IRQ27MON shows the status of  the interrupt request in A/D converter unit 2. 
 
bit 31  16
Field Reserved 
Attribute R 
Initial  value  0x0000 
  bit 15 14 13 12 11 109 8 7 6 5 4 3 2 1 0 
Field Reserved ADCINT 
Attribute  R R R R R R R R  R R R R R R R  R 
Initial 
value  0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
 
[bit31:4] Reserved: Reserved bits  Reads out 0. 
 
[bit3:0] ADCINT: 
bit no.  bit  Description 
0 No conversion result comparison inte
rrupt request in the corresponding 
A/D converter unit. 
3 
1 Conversion result comparison interr
upt request in the corresponding 
A/D converter unit. 
0  No FIFO overrun interrupt request in the corresponding A/D converter 
unit. 
2 
1 FIFO overrun interrupt request in the corresponding A/D converter 
unit. 
0 No scan conversion interrupt request in the corresponding A/D 
converter unit. 
1 
1 Scan conversion interrupt request in
 the corresponding A/D converter 
unit. 
0  No priority conversion interrupt request in the corresponding A/D 
converter unit. 
0 
1 Priority conversion interrupt request in the corresponding A/D 
converter unit. 
 
If DMA transfer requests are selected by the DRQS EL register, the corresponding ADCINT bit is 0. 
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4. Registers 
 
4.14.  IRQ28 Batch Read Register (IRQ28MON) 
IRQ28MON indicates all of the interrupt requests allocated to interrupt vector no. 44. 
 
bit 31  16
Field Reserved 
Attribute R 
Initial  value  0x0000 
  bit 15 14 13 12 11 109 8 7 6 5 4 3 2 1 0 
Field Reserved FRT1INT FRT0INT 
Attribute  R R R R  R R R R R  R R R R R R  R 
Initial 
value  0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
 
[bit31:12] Reserved: Reserved bits  Reads out 0. 
 
[bit11:6] FRT1INT: 
bit no.  bit  Description 
0 No zero detection interrupt request on the free run timer ch. 2 in the 
MFT unit 1 
11 
1 Zero detection interrupt request on the free run timer ch. 2 in the MFT 
unit 1 
0 No zero detection interrupt request on the free run timer ch. 1 in the 
MFT unit 1 
10 
1 Zero detection interrupt request on the free run timer ch. 1 in the MFT 
unit 1 
0 No zero detection interrupt request on the free run timer ch. 0 in the 
MFT unit 1 
9 
1 Zero detection interrupt request on the free run timer ch. 0 in the MFT 
unit 1 
0 No peak value detection interrupt request on the free run timer ch. 2 in the 
MFT unit 1 
8 
1 Peak value detection interrupt request on the free run timer ch. 2 in the 
MFT unit 1 
0 No peak value detection interrupt request on the free run timer ch. 1 in the 
MFT unit 1 
7 
1 Peak value detection interrupt request on the free run timer ch. 1 in the 
MFT unit 1 
0 No peak value detection interrupt request on the free run timer ch. 0 in the 
MFT unit 1 
6 
1 Peak value detection interrupt request on the free run timer ch. 0 in the 
MFT unit 1 
 
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4. Registers 
 
[bit5:0] FRT0INT: 
bit no. bit  Description 
0 No zero detection interrupt request on the free run timer ch. 2 in the 
MFT unit 0 
5 
1 Zero detection interrupt request on the free run timer ch. 2 in the MFT 
unit 0 
0 No zero detection interrupt request on the free run timer ch. 1 in the 
MFT unit 0 
4 
1 Zero detection interrupt request on the free run timer ch. 1 in the MFT 
unit 0 
0 No zero detection interrupt request on the free run timer ch. 0 in the 
MFT unit 0 
3 
1 Zero detection interrupt request on the free run timer ch. 0 in the MFT 
unit 0 
0 No peak value detection interrupt request on the free run timer ch. 2 in the 
MFT unit 0 
2 
1 Peak value detection interrupt request on the free run timer ch. 2 in the 
MFT unit 0 
0 No peak value detection interrupt request on the free run timer ch. 1 in the 
MFT unit 0 
1 
1 Peak value detection interrupt request on the free run timer ch. 1 in the 
MFT unit 0 
0 No peak value detection interrupt request on the free run timer ch. 0 in the 
MFT unit 0 
0 
1 Peak value detection interrupt request on the free run timer ch. 0 in the 
MFT unit 0 
 
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4. Registers 
 
4.15.  IRQ29 Batch Read Register (IRQ29MON) 
IRQ29MON indicates all of the interrupt requests allocated to interrupt vector no. 45. 
 
bit 31  16
Field Reserved 
Attribute R 
Initial  value  0x0000 
  bit 15 14 13 12 11 109 8 7 6 5 4 3 2 1 0 
Field Reserved ICU1INT ICU0INT 
Attribute  R R R  R R R R R  R R R R R R R  R 
Initial 
value  0 
0 0 0 0  0 0 0 0 0 0 0 0 0 0  0 
 
[bit31:8] Reserved: Reserved bits  Reads out 0. 
 
[bit7:4] ICU1INT: 
bit no.  bit  Description 
0 No interrupt request on the input capture ch. 3 in the MFT unit 1 7 
1 Interrupt request on the input capture ch. 3 in the MFT unit 1 
0 No interrupt request on the input capture ch. 2 in the MFT unit 1 6 
1 Interrupt request on the input capture ch. 2 in the MFT unit 1 
0 No interrupt request on the input capture ch. 1 in the MFT unit 1 5 
1 Interrupt request on the input capture ch. 1 in the MFT unit 1 
0 No interrupt request on the input capture ch. 0 in the MFT unit 1 4 
1 Interrupt request on the input capture ch. 0 in the MFT unit 1 
 
[bit3:0] ICU0INT: 
bit no.  bit  Description 
0 No interrupt request on the input capture ch. 3 in the MFT unit 0 3 
1 Interrupt request on the input capture ch. 3 in the MFT unit 0 
0 No interrupt request on the input capture ch. 2 in the MFT unit 0 2 
1 Interrupt request on the input capture ch. 2 in the MFT unit 0 
0 No interrupt request on the input capture ch. 1 in the MFT unit 0 1 
1 Interrupt request on the input capture ch. 1 in the MFT unit 0 
0 No interrupt request on the input capture ch. 0 in the MFT unit 0 0 
1 Interrupt request on the input capture ch. 0 in the MFT unit 0 
 
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4. Registers 
 
4.16.  IRQ30 Batch Read Register (IRQ30MON) 
IRQ30MON indicates all of the interrupt requests allocated to interrupt vector no. 46. 
 
bit 31  16
Field Reserved 
Attribute R 
Initial  value  0x0000 
  bit 15 14 13 12 11 109 8 7 6 5 4 3 2 1 0 
Field Reserved OCU1INT OCU0INT 
Attribute  R R R R R R R R R R R R R R R R 
Initial 
value  0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
 
[bit31:12] Reserved: Reserved bits  Reads out 0. 
 
[bit11:6] OCU1INT: 
bit no.  bit  Description 
0 No interrupt request on the output compare ch. 5 in the MFT unit 1 11 
1 Interrupt request on the output compare ch. 5 in the MFT unit 1 
0 No interrupt request on the output compare ch. 4 in the MFT unit 1 10 
1 Interrupt request on the output compare ch. 4 in the MFT unit 1 
0 No interrupt request on the output compare ch. 3 in the MFT unit 1 9 
1 Interrupt request on the output compare ch. 3 in the MFT unit 1 
0 No interrupt request on the output compare ch. 2 in the MFT unit 1 8 
1 Interrupt request on the output compare ch. 2 in the MFT unit 1 
0 No interrupt request on the output compare ch. 1 in the MFT unit 1 7 
1 Interrupt request on the output compare ch. 1 in the MFT unit 1 
0 No interrupt request on the output compare ch. 0 in the MFT unit 1 6 
1 Interrupt request on the output compare ch. 0 in the MFT unit 1 
 
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4. Registers 
 
[bit5:0] OCU0INT: 
bit no. bit  Description 
0 No interrupt request on the output compare ch. 5 in the MFT unit 0 5 
1 Interrupt request on the output compare ch. 5 in the MFT unit 0 
0 No interrupt request on the output compare ch. 4 in the MFT unit 0 4 
1 Interrupt request on the output compare ch. 4 in the MFT unit 0 
0 No interrupt request on the output compare ch. 3 in the MFT unit 0 3 
1 Interrupt request on the output compare ch. 3 in the MFT unit 0 
0 No interrupt request on the output compare ch. 2 in the MFT unit 0 2 
1 Interrupt request on the output compare ch. 2 in the MFT unit 0 
0 No interrupt request on the output compare ch. 1 in the MFT unit 0 1 
1 Interrupt request on the output compare ch. 1 in the MFT unit 0 
0 No interrupt request on the output compare ch. 0 in the MFT unit 0 0 
1 Interrupt request on the output compare ch. 0 in the MFT unit 0 
 
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