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Samsung Exynos 5 User Manual

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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-27  
4.4.1.14 GPA2DAT 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0044, Reset Value = 0x00 
Name Bit Type Description Reset Value 
GPA2DAT[7:0] [7:0] RWX 
When you configure the port as input port, the 
corresponding bit is the pin state. When you configure 
the port as output port, the pin state is the same as the 
corresponding bit. W hen you configure the port as 
functional pin, the undefined value will be read. 
0x00 
 
4.4.1.15 GPA2PUD 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0048, Reset Value = 0x5555 
Name Bit Type Description Reset Value 
GPA2PUD[n] [2n + 1:2n] 
n = 0 to 7 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x5555 
 
4.4.1.16 GPA2DRV 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x004C, Reset Value = 0x00_0000 
Name Bit Type Description Reset Value 
GPA2DRV[n] 
[2n + 1:2n] 
n = 0 to 7 RW 
0x0 = 1x 
0x2 = 2x 
0x1 = 3x 
0x3 = 4x 
0x00_0000 
[n + 16:16] 
n = 0 to 7 RW Reserved. Should be zero. 0x00_0000
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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-28  
4.4.1.17 GPA2CONPDN 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0050, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPA2[n] [2n + 1:2n] 
n = 0 to 7 RW 
0x0 = Output 0 
0x1 = Output 1 
0x2 = Input 
0x3 = Previous state 
0x00 
 
4.4.1.18 GPA2PUDPDN 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0054, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPA2[n] [2n + 1:2n] 
n = 0 to 7 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x00
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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-29  
4.4.1.19 GPB0CON 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0060, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
GPB0CON[4] [19:16] RW 
0x0 = Input 
0x1 = Output 
0x2 = I2S_1_SDO 
0x3 = PCM_1_SOUT 
0x4 = AC97SDO 
0x5 to 0xE = Reserved 
0xF = EXT_INT4[4] 
0x00 
GPB0CON[3] [15:12] RW 
0x0 = Input 
0x1 = Output 
0x2 = I2S_1_SDI 
0x3 = PCM_1_SIN 
0x4 = AC97SDI 
0x5 to 0xE = Reserved 
0xF = EXT_INT4[3] 
0x00 
GPB0CON[2] [11:8] RW 
0x0 = Input 
0x1 = Output 
0x2 = I2S_1_LRCK 
0x3 = PCM_1_FSYNC 
0x4 = AC97SYNC 
0x5 to 0xE = Reserved 
0xF = EXT_INT4[2] 
0x00 
GPB0CON[1] [7:4] RW 
0x0 = Input 
0x1 = Output 
0x2 = I2S_1_CDCLK 
0x3 = PCM_1_EXTCLK 
0x4 = AC97RESETn 
0x5 to 0xE = Reserved 
0xF = EXT_INT4[1] 
0x00 
GPB0CON[0] [3:0] RW 
0x0 = Input 
0x1 = Output 
0x2 = I2S_1_SCLK 
0x3 = PCM_1_SCLK 
0x4 = AC97BITCLK 
0x5 to 0xE = Reserved 
0xF = EXT_INT4[0] 
0x00
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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-30  
4.4.1.20 GPB0DAT 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0064, Reset Value = 0x00 
Name Bit Type Description Reset Value 
GPB0DAT[4:0] [4:0] RWX 
When you configure the port as input port, the 
corresponding bit is the pin state. When you configure 
the port as output port, the pin state is the same as the 
corresponding bit. W hen you configure the port as 
functional pin, the undefined value will be read. 
0x00 
 
4.4.1.21 GPB0PUD 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0068, Reset Value = 0x0155 
Name Bit Type Description Reset Value 
GPB0PUD[n] [2n + 1:2n] 
n = 0 to 4 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x0155 
 
4.4.1.22 GPB0DRV 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x006C, Reset Value = 0x00_0000 
Name Bit Type Description Reset Value 
GPB0DRV[n] 
[2n + 1:2n] 
n = 0 to 4 RW 
0x0 = 1x 
0x2 = 2x 
0x1 = 3x 
0x3 = 4x 
0x00_0000 
[n + 16:16] 
n = 0 to 4 RW Reserved. Should be zero. 0x00_0000
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Exynos 5250_UM 4 Pad Control 
 4-31  
4.4.1.23 GPB0CONPDN 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0070, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPB0[n] [2n + 1:2n] 
n = 0 to 4 RW 
0x0 = Output 0 
0x1 = Output 1 
0x2 = Input 
0x3 = Previous state 
0x00 
 
4.4.1.24 GPB0PUDPDN 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0074, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPB0[n] [2n + 1:2n] 
n = 0 to 4 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x00
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Exynos 5250_UM 4 Pad Control 
 4-32  
4.4.1.25 GPB1CON 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0080, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
GPB1CON[4] [19:16] RW 
0x0 = Input 
0x1 = Output 
0x2 = I2S_2_SDO 
0x3 = PCM_2_SOUT 
0x4 = I2C_6_SCL 
0x5 = SPI_2_MOSI 
0x6 to 0xE = Reserved 
0xF = EXT_INT5[4] 
0x00 
GPB1CON[3] [15:12] RW 
0x0 = Input 
0x1 = Output 
0x2 = I2S_2_SDI 
0x3 = PCM_2_SIN 
0x4 = I2C_6_SDA 
0x5 = SPI_2_MISO 
0x6 to 0xE = Reserved 
0xF = EXT_INT5[3] 
0x00 
GPB1CON[2] [11:8] RW 
0x0 = Input 
0x1 = Output 
0x2 = I2S_2_LRCK 
0x3 = PCM_2_FSYNC 
0x4 = Reserved 
0x5 = SPI_2_nSS 
0x6 to 0xE = Reserved 
0xF = EXT_INT5[2] 
0x00 
GPB1CON[1] [7:4] RW 
0x0 = Input 
0x1 = Output 
0x2 = I2S_2_CDCLK 
0x3 = PCM_2_EXTCLK 
0x4 = SPDIF_EXTCLK 
0x5 = SPI_2_CLK 
0x6 to 0xE = Reserved 
0xF = EXT_INT5[1] 
0x00 
GPB1CON[0] [3:0] RW 
0x0 = Input 
0x1 = Output 
0x2 = I2S_2_SCLK 
0x3 = PCM_2_SCLK 
0x4 = SPDIF_0_OUT 
0x5 to 0xE = Reserved 
0xF = EXT_INT5[0] 
0x00
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Exynos 5250_UM 4 Pad Control 
 4-33  
4.4.1.26 GPB1DAT 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0084, Reset Value = 0x00 
Name Bit Type Description Reset Value 
GPB1DAT[4:0] [4:0] RWX 
When you configure the port as input port, the 
corresponding bit is the pin state. When you configure 
the port as output port, the pin state is the same as the 
corresponding bit. W hen you configure the port as 
functional pin, the undefined value will be read. 
0x00 
 
4.4.1.27 GPB1PUD 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0088, Reset Value = 0x0155 
Name Bit Type Description Reset Value 
GPB1PUD[n] [2n + 1:2n] 
n = 0 to 4 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x0155 
 
4.4.1.28 GPB1DRV 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x008C, Reset Value = 0x00_0000 
Name Bit Type Description Reset Value 
GPB1DRV[n] 
[2n + 1:2n] 
n = 0 to 4 RW 
0x0 = 1x 
0x2 = 2x 
0x1 = 3x 
0x3 = 4x 
0x00_0000 
[n + 16:16] 
n = 0 to 4 RW Reserved. Should be zero. 0x00_0000
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Exynos 5250_UM 4 Pad Control 
 4-34  
4.4.1.29 GPB1CONPDN 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0090, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPB1[n] [2n + 1:2n] 
n = 0 to 4 RW 
0x0 = Output 0 
0x1 = Output 1 
0x2 = Input 
0x3 = Previous state 
0x00 
 
4.4.1.30 GPB1PUDPDN 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0094, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPB1[n] [2n + 1:2n] 
n = 0 to 4 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x00
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Exynos 5250_UM 4 Pad Control 
 4-35  
4.4.1.31 GPB2CON 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x00A0, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
GPB2CON[3] [15:12] RW 
0x0 = Input 
0x1 = Output 
0x2 = TOUT_3 
0x3 = I2C_7_SCL 
0x4 to 0xE = Reserved 
0xF = EXT_INT6[3] 
0x00 
GPB2CON[2] [11:8] RW 
0x0 = Input 
0x1 = Output 
0x2 = TOUT_2 
0x3 = I2C_7_SDA 
0x4 to 0xE = Reserved 
0xF = EXT_INT6[2] 
0x00 
GPB2CON[1] [7:4] RW 
0x0 = Input 
0x1 = Output 
0x2 = TOUT_1 
0x3 to 0xE = Reserved 
0xF = EXT_INT6[1] 
0x00 
GPB2CON[0] [3:0] RW 
0x0 = Input 
0x1 = Output 
0x2 = TOUT_0 
0x3 = LCD_B_PWM 
0x4 to 0xE = Reserved 
0xF = EXT_INT6[0] 
0x00
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Exynos 5250_UM 4 Pad Control 
 4-36  
4.4.1.32 GPB2DAT 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x00A4, Reset Value = 0x00 
Name Bit Type Description Reset Value 
GPB2DAT[3:0] [3:0] RWX 
When you configure the port as input port, the 
corresponding bit is the pin state. When you configure 
the port as output port, the pin state is the same as the 
corresponding bit. W hen you configure the port as 
functional pin, the undefined value will be read. 
0x00 
 
4.4.1.33 GPB2PUD 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x00A8, Reset Value = 0x0055 
Name Bit Type Description Reset Value 
GPB2PUD[n] [2n + 1:2n] 
n = 0 to 3 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x0055 
 
4.4.1.34 GPB2DRV 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x00AC, Reset Value = 0x00_0000 
Name Bit Type Description Reset Value 
GPB2DRV[n] 
[2n + 1:2n] 
n = 0 to 3 RW 
0x0 = 1x 
0x2 = 2x 
0x1 = 3x 
0x3 = 4x 
0x00_0000 
[n + 16:16] 
n = 0 to 3 RW Reserved. Should be zero. 0x00_0000
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