Samsung Exynos 5 User Manual
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Samsung Confidential Exynos 5250_UM 15 Display Controller 15-19 15.3.3.1.13 4-bpp Display (Palette) NOTE: AEN = specifies the transparency selection bit when you select palette output format with alpha channel in WPALCON register. AEN: 0 = selects ALPHA0 AEN: 1 = selects ALPHA1 When the per-pixel blending is set, it blends with the alpha value that AEN selects. SFR selects the alpha value as ALPHA0_R, ALPHA0_G, ALPHA0_B, ALPHA1_R, ALPHA1_G, and ALPHA1_B. Refer to SFR section for more information. (BYSWP=0,HWSWP=0,WSWP=0) 000H 008H … D[63:60] P1 P17 D[59:56] P2 P18 D[55:52] P3 P19 D[51:48] P4 P20 D[47:44] P5 P21 D[43:40] P6 P22 D[39:36] P7 P23 D[35:32] P8 P24 D[31:28] P25 D[27:24] P26 D[23:20] P27 D[19:16] P28 D[15:12] P29 D[11:8] P30 D[7:4] P31 D[3:0] P32 000H 008H … P9P10P11P12P13P14P15P16 (BYSWP=1,HWSWP=0,WSWP=0) 000H 008H … D[63:60] P1 P17 D[59:56] P2 P18 D[55:52] P3 P19 D[51:48] P4 P20 D[47:44] P5 P21 D[43:40] P6 P22 D[39:36] P7 P23 D[35:32] P8 P24 D[31:28] P25 D[27:24] P26 D[23:20] P27 D[19:16] P28 D[15:12] P29 D[11:8] P30 D[7:4] P31 D[3:0] P32 000H 008H … P9P10P11P12P13P14P15P16
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-20 15.3.3.1.14 2-bpp Display (Palette) NOTE: AEN = specifies the transparency selection bit when you select palette output format with alpha channel in WPALCON register. AEN: 0 = selects ALPHA0 AEN: 1 = selects ALPHA1 When the per-pixel blending is set, it blends with the alpha value that AEN selects. SFR selects the alpha value as ALPHA0_R, ALPHA0_G, ALPHA0_B, ALPHA1_R, ALPHA1_G, and ALPHA1_B. Refer to SFR section for more information. ( BYSWP=0, HWSWP=0, WSWP=0 ) 000H 008H … D[63:62] P1 P33 D[61:60] P2 P34 D[59:58] P3 P35 D[57:56] P4 P36 D[55:54] P5 P37 D[53:52] P6 P38 D[51:50] P7 P39 D[49:48] P8 P40 D[47:46] P41 D[45:44] P42 D[43:42] P43 D[41:40] P44 D[39:38] P45 D[37:36] P46 D[35:34] P47 D[33:32] P48 000H 008H … P9P10P11P12P13P14P15P16 D[31:30]D[29:28]D[27:26]D[25:24]D[23:22]D[21:20]D[19:18]D[17:16] 000H 008H … D[15:14]D[13:12]D[11:10]D[9:8]D[7:6]D[5:4]D[3:2]D[1:0] 000H 008H … P17 P49 P18 P50 P19 P51 P20 P52 P21 P53 P22 P54 P23 P55 P24 P56 P25 P57 P26 P58 P27 P59 P28 P60 P29 P61 P30 P62 P31 P63 P32 P64
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-21 Figure 15-4 illustrates the 16-bpp (5:6:5) Display Types Figure 15-4 16-bpp (5:6:5) Display Types 12345 LCD Panel 16BPP 5: 5:5+1 Format (Non-Palett e) A[ 31] A[ 30] A[29] A[ 28] A[27] A[26] A[25] A[ 24] A[23] A[22] A[ 21] A[20] A[ 19] A[18] A[ 17] A[16] R4R3R2R1R0G4G3G2G1G0R4B3B2B1B0I A[ 15] A[14] A[ 13] A[12] A[ 11] A[ 10] A[ 9] A[8] A[ 7] A[6] A[5] A[ 4] A[3] A[ 2] A[1] A[0] R4R3R2R1R0G4G3G2G1G0R4B3B2B1B0I 12345 LCD Panel 16BPP 5: 6:5 Format (N on-Palet te) A[ 31] A[ 30] A[29] A[ 28] A[27] A[26] A[25] A[ 24] A[23] A[22] A[ 21] A[20] A[ 19] A[18] A[ 17] A[16] A[ 15] A[ 14] A[13] A[ 12] A[ 11] A[ 10] A[ 9] A[ 8] A[7] A[ 6] A[ 5] A[ 4] A[3] A[2] A[ 1] A[0] R4R3R2R1R0G5G4G3G2G1G0B4B3B2B1B0 R4R3R2R1R0G5G4G3G2G1G0B4B3B2B1B0
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-22 15.3.4 Color Space Conversion These tables describe examples of color scheme conversion: Color Space Conversion YCbCr to RGB (CSCY2R) Color Space Conversion RGB to YCbCr (CSCR2Y) 15.3.4.1 Color Space Conversion YCbCr to RGB (CSCY2R) NOTE: Wide indicates that the RGB data contains a nominal range from 0 to 255. Alternatively, Narrow indicates that the RGB data contains a nominal range from 16 to 235. Coefficient Approximation 1.164 = (2^7 + 2^4 + 2^2 + 2^0) >> 7 1.596 = (2^7 + 2^6 + 2^3 + 2^2) >> 7 1,793 = (2^7 + 2^6 + 2^5 + 2^2 + 2^1) >> 7 0.813 = (2^6 + 2^5 + 2^3) >>7 0.534 = (2^6 + 2^2) >> 7 0.391 = (2^5 + 2^4 + 2^1) >> 7 0.213 = (2^4 + 2^3 + 2^1 + 2^0) >> 7 2.018 = (2^8 + 2^1) >> 7 2.115 = (2^8 + 2^3 + 2^2 + 2^1 + 2^0) >> 7 1.371 = (2^8 + 2^6 + 2^4 + 2^3 + 2^2 + 2^1 + 2^0) >> 8 1.540 = (2^8 + 2^7 + 2^3 + 2^1) >> 8 0.698 = (2^7 + 2^5 + 2^4 + 2^1 + 2^0) >> 8 0.459 = (2^6 + 2^5 + 2^4 + 2^2 + 2^1) >> 8 0.336 = (2^6 + 2^4 + 2^2 + 2^1) >> 8 0.183 = (2^5 + 2^3 + 2^2 + 2^1 + 2^0) >> 8 1.732 = (2^8 + 2^7 + 2^5 + 2^4 + 2^3 + 2^1 + 2^0) >> 8 1.816 = (2^8 + 2^7 + 2^6 + 2^4 + 2^0) >> 8 CSCY2R (Color Space Conversion Y to R) R =Y + 1.371(Cr - 128) G = B = Y – 0.698(Cr – 128) – 0.336(Cb – 128) Y + 1.732(Cb – 128) R = G = B = 601709 Narrow Wide 1.164(Y – 16) + 1.596(Cr - 128) 1.164(Y – 16) – 0.813(Cr – 128) – 0.391(Cb – 128) 1.164(Y – 16) + 2.018(Cb – 128) Y + 1.540(Cr - 128) Y – 0.459(Cr – 128) – 0.183(Cb – 128) Y + 1.816(Cb – 128) 1.164(Y – 16) + 1.793(Cr - 128) 1.164(Y – 16) – 0.534(Cr – 128) – 0.213(Cb – 128) 1.164(Y – 16) + 2.115(Cb – 128)
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-23 15.3.4.2 Color Space Conversion RGB to YCbCr (CSCR2Y) NOTE: Wide indicates that the RGB data contains a nominal range from 0 to 255. Alternatively, Narrow indicates that the RGB data contains a nominal range from 16 to 235. Coefficient Approximation 0.257 = (2^6 + 2^1) >> 8 0.183 = (2^5 + 2^3 + 2^2 + 2^1 + 2^0) >> 8 0.504 = (2^7 + 2^0) >> 8 0.614 = (2^7 + 2^4 + 2^3 + 2^2 + 2^0) >> 8 0.098 = (2^4 + 2^3 + 2^0) >> 8 0.062 = (2^4) >> 8 0.148 = (2^5 + 2^2 + 2^1) >> 8 0.101 = (2^4 + 2^3 + 2^1) >> 8 0.291 = (2^6 + 2^3 + 2^1) >> 8 0.338 = (2^6 + 2^4 + 2^2 + 2^1 + 2^0) >> 8 0.439 = (2^6 + 2^5 + 2^4) >> 8 0.368 = (2^7 – 2^5 – 2^1) >> 8 0.399 = (2^6 + 2^5 + 2^2 + 2^1) >> 8 0.071 = (2^4 + 2^1) >> 8 0.040 = (2^3 + 2^1) >> 8 0.299 = (2^6 + 2^3 + 2^2 + 2^0) >> 8 0.213 = (2^5 + 2^4 + 2^2 + 2^1 + 2^0) >> 8 0.587 = (2^7 + 2^4 + 2^2 + 2^1) >> 8 0.715 = (2^7 + 2^5 + 2^4 + 2^2 + 2^1 + 2^0) >> 8 0.114 = (2^4 + 2^3 + 2^2 + 2^0) >> 8 0.072 = (2^4 + 2^1) >> 8 0.172 = (2^5 + 2^3 + 2^2) >> 8 0.117 = (2^4 + 2^3 + 2^2 + 2^1) >> 8 0.339 = (2^6 + 2^4 + 2^3 – 2^0) >> 8 0.394 = (2^6 + 2^5 + 2^2 + 2^0) >> 8 0.511 = (2^7 + 2^1 + 2^0) >> 8 0.428 = (2^7 – 2^4 – 2^1) >> 8 0.464 = (2^6 + 2^5 + 2^4 + 2^2 + 2^1 + 2^0) >> 8 0.083 = (2^4 + 2^2 + 2^0) >> 8 0.047 = (2^3 + 2^2) >> 8 CSCR2Y (Color Space Conversion R to Y) Y =0.299R + 0.587G + 0.114B Cb = Cr = - 0.172R - 0.339G + 0.511B + 128 0.511R – 0.428G – 0.083B + 128 0.213R + 0.715G + 0.072B - 0.117R - 0.394G + 0.511B + 128 0.511R – 0.464G – 0.047B + 128 Y =0.257R + 0.504G + 0.098B + 16 Cb = Cr = - 0.148R - 0.291G + 0.439B + 128 0.439R – 0.368G – 0.071B + 128 601709 Narrow Wide 0.183R + 0.614G + 0.062B + 16 - 0.101R - 0.338G + 0.439B + 128 0.439R – 0.399G – 0.040B + 128
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-24 15.3.5 Palette Usage 15.3.5.1 Palette Configuration and Format Control The display controller supports 256-color palette to select color mapping. You can select up to 256 colors from 32- bit colors by using below formats. A 256-color palette consists of 256 (depth) 32-bit SPSRAM. It supports 8:8:8, 6:6:6, 5:6:5 (R: G: B), and other formats. For Example: Refer to A:5:5:5 format, Write palette, as described in Table 15-2. Connect VD pin to TFT LCD panel (R(5) = VD[23:19], G(5) = VD[15:11], and B (5) = VD[7:3]). AEN bit enables or disables the blending function. Finally, set W PALCON (W1PAL, case window0) register to 0’b101. The 32-bit (8:8:8:8) format contains an alpha value directly, without using the alpha value register (ALPHA_0/1). Table 15-2 describes the 32-bpp (8:8:8:8) palette data format. Table 15-2 32-bpp (8:8:8:8) Palette Data Format Table 15-3 describes the 25-bpp (A: 8:8:8) palette data format. Table 15-3 25-bpp (A: 8:8:8) Palette Data Format INDEX/Bit Pos.313029282726252423222120191817161514131211109876543210 00h 01h …… FFh Numberof VD ALPHA ALPHA ALPHA …………………………………………………………………………………… R7R6R5R4R3R2R1R0 R7R6R5R4R3R2R1R0 R7R6R5R4R3R2R1R0 --------23222120191817161514131211109876543210 G7G6G5G4G3G2G1G0 G7G6G5G4G3G2G1G0 G7G6G5G4G3G2G1G0 B7B6B5B4B3B2B1B0 B7B6B5B4B3B2B1B0 B7B6B5B4B3B2B1B0 INDEX/Bit Pos.313029282726252423222120191817161514131211109876543210 00h 01h …… FFh Numberof VD …………………………………………………………………………………… R7R6R5R4R3R2R1R0 R7R6R5R4R3R2R1R0 R7R6R5R4R3R2R1R0 --------23222120191817161514131211109876543210 G7G6G5G4G3G2G1G0 G7G6G5G4G3G2G1G0 G7G6G5G4G3G2G1G0 B7B6B5B4B3B2B1B0 B7B6B5B4B3B2B1B0 B7B6B5B4B3B2B1B0 ---AEN---- ---AEN---- ---AEN----
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-25 Table 15-4 describes the 19-bpp (A: 6:6:6) palette data format. Table 15-4 19-bpp (A: 6:6:6) Palette Data Format Table 15-5 describes the 16-bpp (A: 5:5:5) palette data format. Table 15-5 16-bpp (A: 5:5:5) Palette Data Format 15.3.5.2 Palette Read/Write Do not access palette memory when the Vertical Status (VSTATUS) register is ACTIVE. Enable VSTATUS to perform Read/Write operation on the palette. INDEX/Bit Pos.313029282726252423222120191817161514131211109876543210 00h 01h …… FFh Numberof VD …………………………………………………………………………………… R5R4R3R2R1R0 --------232221201918151413121110765432 G5G4G3G2G1G0B5B4B3B2B1B0---AEN---- ------- ------- ------ ------ R5R4R3R2R1R0G5G4G3G2G1G0B5B4B3B2B1B0 AEN------ R5R4R3R2R1R0G5G4G3G2G1G0B5B4B3B2B1B0 AEN------ INDEX/Bit Pos.313029282726252423222120191817161514131211109876543210 00h 01h …… FFh Numberof VD …………………………………………………………………………………… R4R3R2R1R0 --------2322212019151413121176543 G4G3G2G1G0B4B3B2B1B0---AEN---- ------- ------- ------ ------ ------ ------ --- --- R4R3R2R1R0G4G3G2G1G0B4B3B2B1B0 AEN--- R4R3R2R1R0G4G3G2G1G0B4B3B2B1B0 AEN---
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-26 15.3.6 Window Blending 15.3.6.1 Overview The main function of the VPRCS module is window blending. The display controller consists of five window layers (win0 to win4). Example of Application: The system uses: win0 as OS window, full TV screen window, and so on win1 as small (next channel ) TV screen with win2 as menu win3 as caption win4 as channel information win3 and win4 have color limitation when it uses color index with Color LUT. This feature reduces the data rate of total system. Thus, it enhances the system performance. Example of Total Five Windows: win0 (base): Local/ (YCbCr, RGB without palette) win1 (Overlay1): RGB with palette win2 (Overlay2): RGB with palette win3 (Caption): RGB (1/2/4) with 16-level Color LUT win4 (Cursor): RGB (1/2) with 4-level Color LUT Overlay Priority win4 > win3 > win2 > win1>win0 Color Key Ensure to set the register value of Color Key register by using 24-bit RGB format.
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-27 Blending Equation Win01 (R, G, B) = Win0 (R, G, B) x b1 + Win1 (R, G, B) x a1 Win012 (R/G/B) = Win01 (R/G/B) x b2 + Win2 (R/G/B) x a2 Win0123 (R/G/B) = Win012 (R/G/B) x b3 + Win3 (R/G/B) x a3 WinOut (R/G/B) = Win0123 (R/G/B) x b4 + Win4 (R/G/B) x a4 where, Win0(R) = Window 0s Red data Win0(G) = Window 0s Green data Win0(B) = Window 0s Blue data Win1(R) = Window 1s Red data ... b1 = Backgrounds Data blending equation1 factor a1 = Foregrounds Data blending equation1 factor b2 = Backgrounds Data blending equation2 factor a2 = Foregrounds Data blending equation2 factor AR (G, B)01 = AR (G, B)0 x q1 + AR (G, B)1 x p1 AR (G, B)012 = AR (G, B)01 x q2 + AR (G, B)2 x p2 AR (G, B)0123 = AR (G, B)012 x q3 + AR (G, B)3 x p3 where, AR0 = Window 0s Red blending factor AG0 = Window 0s Green blending factor AB0 = Window 0s Blue blending factor AR1 = Window 1s Red blending factor... AR01 = Window01s Red blending factor (alpha value blending between AR0 and AR1) AG01 = Window01s Green blending factor (alpha value blending between AG0 and AG1) AB01 = Window01s Blue blending factor (alpha value blending between AB0 and AB1) AR012 = Window012s Red blending factor (alpha value blending between AR01 and AR2) ... q1 = Backgrounds Alpha value blending equation1 factor p1 = Foregrounds Alpha value blending equation1 factor q2 = Backgrounds Alpha value blending equation2 factor p2 = Foregrounds Alpha value blending equation2 factor…
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-28 Figure 15-5 illustrates the blending equation. Figure 15-5 Blending Equation < Default blending equation > Data blending> B = B (1-alphaA) + A alphaA Alpha value blending> alphaB = 0 (= alphaB x 0 + alphaA 0) Blending alphaAalphaBAB alphaB’B’ B’ = a x A + b x B alphaB’ = p x alphaA + q x alphaB a/b/p/q = 0 or 1 or alphaA or 1 - alphaA or alphaB or 1 - alphaB or A or 1 - A or B or 1 - B ‘a’ is controlled by ‘A_FUNC’ @ BLENDEQ register ‘b’ “ by ‘B_FUNC’ @ BLENDEQ register ‘p’ “ by ‘P_FUNC’ @ BLENDEQ register ‘q’ “ by ‘Q_FUNC’ @ BLENDEQ register or ALPHA0