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Samsung Exynos 5 User Manual

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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-87  
4.4.1.131 GPC4CONPDN 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x02F0, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPC4[n] [2n + 1:2n] 
n = 0 to 6 RW 
0x0 = Output 0 
0x1 = Output 1 
0x2 = Input 
0x3 = Previous state 
0x00 
 
4.4.1.132 GPC4PUDPDN 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x02F4, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPC4[n] [2n + 1:2n] 
n = 0 to 6 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x00
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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-88  
4.4.1.133 EXT_INT1CON 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0700, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
RSVD [31] –=Reserved=0x0=
EXT_INT1=
_CON[7]=[30:28]=RW=
Sets=the signaling method of EXT_INT1[7]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[27]=–=Reserved=0x0=
EXT_INT1=
_CON[6]=[26:24]=RW=
Setting the signaling method=of EXT_INT1[6]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[23]=–=Reserved=0x0=
EXT_INT1_Cl
N[5]=[22:20]=RW=
Setting the signaling method of EXT_INT1[5]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[19]=–=Reserved=0x0=
EXT_INT1=
_CON[4]=[18:16]=RW=
Setting the signaling method=of EXT_INT1[4]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[15]=–=Reserved=0x0=
EXT_INT1=
_CON[3]=[14:12]=RW=
Setting the signaling method=of EXT_INT1[3]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[11]=–=Reserved=0x0=
EXT_INT1=[10:8]=RW=Setting the signaling method=of EXT_INT1[2]=0x0=
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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-89  
Name Bit Type Description Reset Value 
_CON[2] 0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
RSVD [7] – Reserved 0x0 
EXT_INT1 
_CON[1] [6:4] RW 
Setting the signaling method of EXT_INT1[1] 
0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
0x0 
RSVD [3] – Reserved 0x0 
EXT_INT1 
_CON[0] [2:0] RW 
Setting the signaling method of EXT_INT1[0] 
0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
0x0
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Exynos 5250_UM 4 Pad Control 
 4-90  
4.4.1.134 EXT_INT2CON 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0704, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
RSVD [31:24] –=Reserved=0x00=
RSVD=[23]=–=Reserved=0x0=
EXT_INT2=
_CON[5]=[22:20]=RW=
Setting the signaling method=of EXT_INT2[5]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[19]=–=Reserved=0x0=
EXT_INT2=
_CON[4]=[18:16]=RW=
Setting the signaling method=of EXT_INT2[4]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[15]=–=Reserved=0x0=
EXT_INT2=
_CON[3]=[14:12]=RW=
Setting the signaling method=of EXT_INT2[3]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[11]=–=Reserved=0x0=
EXT_INT2=
_CON[2]=[10:8]=RW=
Setting the signaling method=of EXT_INT2[2]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[7]=–=Reserved=0x0=
EXT_INT2=
_CON[1]=[6:4]=RW=
Setting the signaling method of EXT_INT2[1]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[3]=–=Reserved=0x0=
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Exynos 5250_UM 4 Pad Control 
 4-91  
Name Bit Type Description Reset Value 
EXT_INT2 
_CON[0] [2:0] RW 
Setting the signaling method of EXT_INT2[0] 
0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
0x0
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Exynos 5250_UM 4 Pad Control 
 4-92  
4.4.1.135 EXT_INT3CON 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0708, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
RSVD [31] –=Reserved=0x0=
EXT_INT3=
_CON[7]=[30:28]=RW=
Setting the signaling method=of EXT_INT3[7]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[27]=–=Reserved=0x0=
EXT_INT3=
_CON[6]=[26:24]=RW=
Setting the signaling method=of EXT_INT3[6]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 ==Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[23]=–=Reserved=0x0=
EXT_INT3=
_CON[5]=[22:20]=RW=
Setting the signaling method=of EXT_INT3[5]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[19]=–=Reserved=0x0=
EXT_INT3=
_CON[4]=[18:16]=RW=
Setting the signaling method=of EXT_INT3[4]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[15]=–=Reserved=0x0=
EXT_INT3=
_CON[3]=[14:12]=RW=
Setting the signaling method=of EXT_INT3[3]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[11]=–=Reserved=0x0=
EXT_INT3=[10:8]=RW=Setting the signaling method=of EXT_INT3[2]=0x0=
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Exynos 5250_UM 4 Pad Control 
 4-93  
Name Bit Type Description Reset Value 
_CON[2] 0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
RSVD [7] – Reserved 0x0 
EXT_INT3 
_CON[1] [6:4] RW 
Setting the signaling method of EXT_INT3[1] 
0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
0x0 
RSVD [3] – Reserved 0x0 
EXT_INT3 
_CON[0] [2:0] RW 
Setting the signaling method of EXT_INT3[0] 
0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
0x0
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Exynos 5250_UM 4 Pad Control 
 4-94  
4.4.1.136 EXT_INT4CON 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x070C, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
RSVD [31:20] –=Reserved=0x000=
RSVD=[19]=–=Reserved=0x0=
EXT_INT4=
_CON[4]=[18:16]=RW=
Setting the signaling method of EXT_INT4[4]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[15]=–=Reserved=0x0=
EXT_INT4=
_CON[3]=[14:12]=RW=
Setting the signaling method=of EXT_INT4[3]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[11]=–=Reserved=0x0=
EXT_INT4=
_CON[2]=[10:8]=RW=
Setting the signaling method=of EXT_INT4[2]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[7]=–=Reserved=0x0=
EXT_INT4=
_CON[1]=[6:4]=RW=
Setting the signaling method=of EXT_INT4[1]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[3]=–=Reserved=0x0=
EXT_INT4=
_CON[0]=[2:0]=RW=
Setting the signaling method=of EXT_INT4[0]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
=
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Exynos 5250_UM 4 Pad Control 
 4-95  
4.4.1.137 EXT_INT5CON 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0710, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
RSVD [31:20] –=Reserved=0x000=
RSVD=[19]=–=Reserved=0x0=
EXT_INT5=
_CON[4]=[18:16]=RW=
Setting the signaling method=of EXT_INT5[4]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[15]=–=Reserved=0x0=
EXT_INT5=
_CON[3]=[14:12]=RW=
Setting the signaling method=of EXT_INT5[3]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[11]=–=Reserved=0x0=
EXT_INT5=
_CON[2]=[10:8]=RW=
Setting the signaling method=of EXT_INT5[2]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[7]=–=Reserved=0x0=
EXT_INT5=
_CON[1]=[6:4]=RW=
Setting the signaling method=of EXT_INT5[1]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[3]=–=Reserved=0x0=
EXT_INT5=
_CON[0]=[2:0]=RW=
Setting the signaling method=of EXT_INT5[0]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
=
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Exynos 5250_UM 4 Pad Control 
 4-96  
4.4.1.138 EXT_INT6CON 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0714, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
RSVD [31:16] –=Reserved=0x0000=
RSVD=[15]=–=Reserved=0x0=
EXT_INT6=
_CON[3]=[14:12]=RW=
Setting the signaling method=of EXT_INT6[3]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[11]=–=Reserved=0x0=
EXT_INT6=
_CON[2]=[10:8]=RW=
Setting the signaling method of EXT_INT6[2]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[7]=–=Reserved=0x0=
EXT_INT6=
_CON[1]=[6:4]=RW=
Setting the signaling method of EXT_INT6[1]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[3]=–=Reserved=0x0=
EXT_INT6=
_CON[0]=[2:0]=RW=
Setting the signaling method=of EXT_INT6[0]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
=
=
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