Samsung Exynos 5 User Manual
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![Page 226
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-172
4.4.1.243 EXT_INT40_FLTCON1
Base Address: 0x1140_0000
Address = Base Address + 0x0E84, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN14[7] [31] RW
Enables Filter for EXT_INT40[7]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL14[7] [30] RW
Selects Filter for EXT_INT40[7]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH14[7] [29:24] RW Filtering width of EXT_INT40[7]
This value is valid when...](http://img.usermanuals.tech/thumb/66/99535/w64_exynos-5-user-manual-1509363421_d-225.png "Page 226
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-172
4.4.1.243 EXT_INT40_FLTCON1
Base Address: 0x1140_0000
Address = Base Address + 0x0E84, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN14[7] [31] RW
Enables Filter for EXT_INT40[7]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL14[7] [30] RW
Selects Filter for EXT_INT40[7]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH14[7] [29:24] RW Filtering width of EXT_INT40[7]
This value is valid when...")
![Page 227
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-173
4.4.1.244 EXT_INT41_FLTCON0
Base Address: 0x1140_0000
Address = Base Address + 0x0E88, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN15[3] [31] RW
Enables Filter for EXT_INT41[3]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL15[3] [30] RW
Selects Filter for EXT_INT41[3]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH15[3] [29:24] RW Filtering width of EXT_INT41[3]
This value is valid when...](http://img.usermanuals.tech/thumb/66/99535/w64_exynos-5-user-manual-1509363421_d-226.png "Page 227
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-173
4.4.1.244 EXT_INT41_FLTCON0
Base Address: 0x1140_0000
Address = Base Address + 0x0E88, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN15[3] [31] RW
Enables Filter for EXT_INT41[3]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL15[3] [30] RW
Selects Filter for EXT_INT41[3]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH15[3] [29:24] RW Filtering width of EXT_INT41[3]
This value is valid when...")
![Page 228
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-174
4.4.1.245 EXT_INT41_FLTCON1
Base Address: 0x1140_0000
Address = Base Address + 0x0E8C, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN15[7] [31] RW
Enables Filter for EXT_INT41[7]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL15[7] [30] RW
Selects Filter for EXT_INT41[7]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH15[7] [29:24] RW Filtering width of EXT_INT41[7]
This value is valid when...](http://img.usermanuals.tech/thumb/66/99535/w64_exynos-5-user-manual-1509363421_d-227.png "Page 228
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-174
4.4.1.245 EXT_INT41_FLTCON1
Base Address: 0x1140_0000
Address = Base Address + 0x0E8C, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN15[7] [31] RW
Enables Filter for EXT_INT41[7]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL15[7] [30] RW
Selects Filter for EXT_INT41[7]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH15[7] [29:24] RW Filtering width of EXT_INT41[7]
This value is valid when...")
![Page 229
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-175
4.4.1.246 EXT_INT42_FLTCON0
Base Address: 0x1140_0000
Address = Base Address + 0x0E90, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN16[3] [31] RW
Enables Filter for EXT_INT42[3]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL16[3] [30] RW
Selects Filter for EXT_INT42[3]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH16[3] [29:24] RW Filtering width of EXT_INT42[3]
This value is valid when...](http://img.usermanuals.tech/thumb/66/99535/w64_exynos-5-user-manual-1509363421_d-228.png "Page 229
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-175
4.4.1.246 EXT_INT42_FLTCON0
Base Address: 0x1140_0000
Address = Base Address + 0x0E90, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN16[3] [31] RW
Enables Filter for EXT_INT42[3]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL16[3] [30] RW
Selects Filter for EXT_INT42[3]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH16[3] [29:24] RW Filtering width of EXT_INT42[3]
This value is valid when...")
![Page 230
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-176
4.4.1.247 EXT_INT42_FLTCON1
Base Address: 0x1140_0000
Address = Base Address + 0x0E94, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN16[7] [31] RW
Enables Filter for EXT_INT42[7]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL16[7] [30] RW
Selects Filter for EXT_INT42[7]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH16[7] [29:24] RW Filtering width of EXT_INT42[7]
This value is valid when...](http://img.usermanuals.tech/thumb/66/99535/w64_exynos-5-user-manual-1509363421_d-229.png "Page 230
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-176
4.4.1.247 EXT_INT42_FLTCON1
Base Address: 0x1140_0000
Address = Base Address + 0x0E94, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN16[7] [31] RW
Enables Filter for EXT_INT42[7]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL16[7] [30] RW
Selects Filter for EXT_INT42[7]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH16[7] [29:24] RW Filtering width of EXT_INT42[7]
This value is valid when...")
![Page 231
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-177
4.4.1.248 EXT_INT43_FLTCON0
Base Address: 0x1140_0000
Address = Base Address + 0x0E98, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN17[3] [31] RW
Enables Filter for EXT_INT43[3]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL17[3] [30] RW
Selects Filter for EXT_INT43[3]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH17[3] [29:24] RW Filtering width of EXT_INT43[3]
This value is valid when...](http://img.usermanuals.tech/thumb/66/99535/w64_exynos-5-user-manual-1509363421_d-230.png "Page 231
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-177
4.4.1.248 EXT_INT43_FLTCON0
Base Address: 0x1140_0000
Address = Base Address + 0x0E98, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN17[3] [31] RW
Enables Filter for EXT_INT43[3]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL17[3] [30] RW
Selects Filter for EXT_INT43[3]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH17[3] [29:24] RW Filtering width of EXT_INT43[3]
This value is valid when...")
![Page 232
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-178
4.4.1.249 EXT_INT43_FLTCON1
Base Address: 0x1140_0000
Address = Base Address + 0x0E9C, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN17[7] [31] RW
Enables Filter for EXT_INT43[7]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL17[7] [30] RW
Selects Filter for EXT_INT43[7]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH17[7] [29:24] RW Filtering width of EXT_INT43[7]
This value is valid when...](http://img.usermanuals.tech/thumb/66/99535/w64_exynos-5-user-manual-1509363421_d-231.png "Page 232
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-178
4.4.1.249 EXT_INT43_FLTCON1
Base Address: 0x1140_0000
Address = Base Address + 0x0E9C, Reset Value = 0x8080_8080
Name Bit Type Description Reset Value
FLTEN17[7] [31] RW
Enables Filter for EXT_INT43[7]
0x0 = Disables
0x1 = Enables
0x1
FLTSEL17[7] [30] RW
Selects Filter for EXT_INT43[7]
0x0 = Delays filter
0x1 = Digital filter (clock count)
0x0
FLTWIDTH17[7] [29:24] RW Filtering width of EXT_INT43[7]
This value is valid when...")
![Page 233
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-179
4.4.1.250 EXT_INT40_MASK
Base Address: 0x1140_0000
Address = Base Address + 0x0F00, Reset Value = 0x0000_00FF
Name Bit Type Description Reset Value
RSVD [31:8] –=Reserved=0x000000=
EXT_INT40=
_MASK[7]=[7]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT40=
_MASK[6]=[6]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT40=
_MASK[5]=[5]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT40=...](http://img.usermanuals.tech/thumb/66/99535/w64_exynos-5-user-manual-1509363421_d-232.png "Page 233
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-179
4.4.1.250 EXT_INT40_MASK
Base Address: 0x1140_0000
Address = Base Address + 0x0F00, Reset Value = 0x0000_00FF
Name Bit Type Description Reset Value
RSVD [31:8] –=Reserved=0x000000=
EXT_INT40=
_MASK[7]=[7]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT40=
_MASK[6]=[6]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT40=
_MASK[5]=[5]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT40=...")
![Page 234
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-180
4.4.1.251 EXT_INT41_MASK
Base Address: 0x1140_0000
Address = Base Address + 0x0F04, Reset Value = 0x0000_00FF
Name Bit Type Description Reset Value
RSVD [31:8] –=Reserved=0x000000=
EXT_INT41=
_MASK[7]=[7]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT41=
_MASK[6]=[6]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT41=
_MASK[5]=[5]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT41=...](http://img.usermanuals.tech/thumb/66/99535/w64_exynos-5-user-manual-1509363421_d-233.png "Page 234
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-180
4.4.1.251 EXT_INT41_MASK
Base Address: 0x1140_0000
Address = Base Address + 0x0F04, Reset Value = 0x0000_00FF
Name Bit Type Description Reset Value
RSVD [31:8] –=Reserved=0x000000=
EXT_INT41=
_MASK[7]=[7]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT41=
_MASK[6]=[6]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT41=
_MASK[5]=[5]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT41=...")
![Page 235
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-181
4.4.1.252 EXT_INT42_MASK
Base Address: 0x1140_0000
Address = Base Address + 0x0F08, Reset Value = 0x0000_00FF
Name Bit Type Description Reset Value
RSVD [31:8] –=Reserved=0x000000=
EXT_INT42=
_MASK[7]=[7]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT42=
_MASK[6]=[6]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT42=
_MASK[5]=[5]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT42=...](http://img.usermanuals.tech/thumb/66/99535/w64_exynos-5-user-manual-1509363421_d-234.png "Page 235
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-181
4.4.1.252 EXT_INT42_MASK
Base Address: 0x1140_0000
Address = Base Address + 0x0F08, Reset Value = 0x0000_00FF
Name Bit Type Description Reset Value
RSVD [31:8] –=Reserved=0x000000=
EXT_INT42=
_MASK[7]=[7]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT42=
_MASK[6]=[6]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT42=
_MASK[5]=[5]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT42=...")
![Page 236
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-182
4.4.1.253 EXT_INT43_MASK
Base Address: 0x1140_0000
Address = Base Address + 0x0F0C, Reset Value = 0x0000_00FF
Name Bit Type Description Reset Value
RSVD [31:8] –=Reserved=0x000000=
EXT_INT43=
_MASK[7]=[7]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT43=
_MASK[6]=[6]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT43=
_MASK[5]=[5]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT43=...](http://img.usermanuals.tech/thumb/66/99535/w64_exynos-5-user-manual-1509363421_d-235.png "Page 236
Samsung Confidential
Exynos 5250_UM 4 Pad Control
4-182
4.4.1.253 EXT_INT43_MASK
Base Address: 0x1140_0000
Address = Base Address + 0x0F0C, Reset Value = 0x0000_00FF
Name Bit Type Description Reset Value
RSVD [31:8] –=Reserved=0x000000=
EXT_INT43=
_MASK[7]=[7]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT43=
_MASK[6]=[6]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT43=
_MASK[5]=[5]=RW=0x0 = Enables Interrupt=
0x1 = Masks Interrupt=0x1=
EXT_INT43=...")
Samsung Confidential Exynos 5250_UM 4 Pad Control 4-177 4.4.1.248 EXT_INT43_FLTCON0 Base Address: 0x1140_0000 Address = Base Address + 0x0E98, Reset Value = 0x8080_8080 Name Bit Type Description Reset Value FLTEN17[3] [31] RW Enables Filter for EXT_INT43[3] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL17[3] [30] RW Selects Filter for EXT_INT43[3] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH17[3] [29:24] RW Filtering width of EXT_INT43[3] This value is valid when FLTSEL17 (of EXT_INT43) is 0x1. 0x00 FLTEN17[2] [23] RW Enables Filter for EXT_INT43[2] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL17[2] [22] RW Selects Filter for EXT_INT43[2] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH17[2] [21:16] RW Filtering width of EXT_INT43[2] This value is valid when FLTSEL17 (of EXT_INT43) is 0x1. 0x00 FLTEN17[1] [15] RW Enables Filter for EXT_INT43[1] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL17[1] [14] RW Selects Filter for EXT_INT43[1] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH17[1] [13:8] RW Filtering width of EXT_INT43[1] This value is valid when FLTSEL17 (of EXT_INT43) is 0x1. 0x00 FLTEN17[0] [7] RW Enables Filter for EXT_INT43[0] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL17[0] [6] RW Selects Filter for EXT_INT43[0] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH17[0] [5:0] RW Filtering width of EXT_INT43[0] This value is valid when FLTSEL17 (of EXT_INT43) is 0x1. 0x00
Samsung Confidential Exynos 5250_UM 4 Pad Control 4-178 4.4.1.249 EXT_INT43_FLTCON1 Base Address: 0x1140_0000 Address = Base Address + 0x0E9C, Reset Value = 0x8080_8080 Name Bit Type Description Reset Value FLTEN17[7] [31] RW Enables Filter for EXT_INT43[7] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL17[7] [30] RW Selects Filter for EXT_INT43[7] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH17[7] [29:24] RW Filtering width of EXT_INT43[7] This value is valid when FLTSEL17 (of EXT_INT43) is 0x1. 0x00 FLTEN17[6] [23] RW Enables Filter for EXT_INT43[6] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL17[6] [22] RW Selects Filter for EXT_INT43[6] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH17[6] [21:16] RW Filtering width of EXT_INT43[6] This value is valid when FLTSEL17 (of EXT_INT43) is 0x1. 0x00 FLTEN17[5] [15] RW Enables Filter for EXT_INT43[5] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL17[5] [14] RW Selects Filter for EXT_INT43[5] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH17[5] [13:8] RW Filtering width of EXT_INT43[5] This value is valid when FLTSEL17 (of EXT_INT43) is 0x1. 0x00 FLTEN17[4] [7] RW Enables Filter for EXT_INT43[4] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL17[4] [6] RW Selects Filter for EXT_INT43[4] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH17[4] [5:0] RW Filtering width of EXT_INT43[4] This value is valid when FLTSEL17 (of EXT_INT43) is 0x1. 0x00
Samsung Confidential Exynos 5250_UM 4 Pad Control 4-179 4.4.1.250 EXT_INT40_MASK Base Address: 0x1140_0000 Address = Base Address + 0x0F00, Reset Value = 0x0000_00FF Name Bit Type Description Reset Value RSVD [31:8] –=Reserved=0x000000= EXT_INT40= _MASK[7]=[7]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT40= _MASK[6]=[6]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT40= _MASK[5]=[5]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT40= _MASK[4]=[4]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT40= _MASK[3]=[3]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT40= _MASK[2]=[2]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT40= _MASK[1]=[1]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT40= _MASK[0]=[0]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= = =
Samsung Confidential Exynos 5250_UM 4 Pad Control 4-180 4.4.1.251 EXT_INT41_MASK Base Address: 0x1140_0000 Address = Base Address + 0x0F04, Reset Value = 0x0000_00FF Name Bit Type Description Reset Value RSVD [31:8] –=Reserved=0x000000= EXT_INT41= _MASK[7]=[7]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT41= _MASK[6]=[6]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT41= _MASK[5]=[5]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT41= _MASK[4]=[4]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT41= _MASK[3]=[3]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT41= _MASK[2]=[2]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT41= _MASK[1]=[1]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT41= _MASK[0]=[0]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= = =
Samsung Confidential Exynos 5250_UM 4 Pad Control 4-181 4.4.1.252 EXT_INT42_MASK Base Address: 0x1140_0000 Address = Base Address + 0x0F08, Reset Value = 0x0000_00FF Name Bit Type Description Reset Value RSVD [31:8] –=Reserved=0x000000= EXT_INT42= _MASK[7]=[7]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT42= _MASK[6]=[6]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT42= _MASK[5]=[5]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT42= _MASK[4]=[4]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT42= _MASK[3]=[3]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT42= _MASK[2]=[2]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT42= _MASK[1]=[1]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT42= _MASK[0]=[0]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= = =
Samsung Confidential Exynos 5250_UM 4 Pad Control 4-182 4.4.1.253 EXT_INT43_MASK Base Address: 0x1140_0000 Address = Base Address + 0x0F0C, Reset Value = 0x0000_00FF Name Bit Type Description Reset Value RSVD [31:8] –=Reserved=0x000000= EXT_INT43= _MASK[7]=[7]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT43= _MASK[6]=[6]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT43= _MASK[5]=[5]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT43= _MASK[4]=[4]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT43= _MASK[3]=[3]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT43= _MASK[2]=[2]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT43= _MASK[1]=[1]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= EXT_INT43= _MASK[0]=[0]=RW=0x0 = Enables Interrupt= 0x1 = Masks Interrupt=0x1= = =
Samsung Confidential Exynos 5250_UM 4 Pad Control 4-183 4.4.1.254 EXT_INT40_PEND Base Address: 0x1140_0000 Address = Base Address + 0x0F40, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:8] –=Reserved=0x000000= EXT_INT40= _PEND[7]=[7]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT40= _PEND[6]=[6]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT40= _PEND[5]=[5]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT40= _PEND[4]=[4]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT40= _PEND[3]=[3]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT40= _PEND[2]=[2]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT40= _PEND[1]=[1]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT40= _PEND[0]=[0]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= = =
Samsung Confidential Exynos 5250_UM 4 Pad Control 4-184 4.4.1.255 EXT_INT41_PEND Base Address: 0x1140_0000 Address = Base Address + 0x0F44, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:8] –=Reserved=0x000000= EXT_INT41= _PEND[7]=[7]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT41= _PEND[6]=[6]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT41= _PEND[5]=[5]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT41= _PEND[4]=[4]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT41= _PEND[3]=[3]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT41= _PEND[2]=[2]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT41= _PEND[1]=[1]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT41= _PEND[0]=[0]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= = =
Samsung Confidential Exynos 5250_UM 4 Pad Control 4-185 4.4.1.256 EXT_INT42_PEND Base Address: 0x1140_0000 Address = Base Address + 0x0F48, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:8] –=Reserved=0x000000= EXT_INT42= _PEND[7]=[7]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT42= _PEND[6]=[6]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT42= _PEND[5]=[5]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT42= _PEND[4]=[4]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT42= _PEND[3]=[3]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT42= _PEND[2]=[2]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT42= _PEND[1]=[1]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT42= _PEND[0]=[0]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= = =
Samsung Confidential Exynos 5250_UM 4 Pad Control 4-186 4.4.1.257 EXT_INT43_PEND Base Address: 0x1140_0000 Address = Base Address + 0x0F4C, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:8] –=Reserved=0x000000= EXT_INT43= _PEND[7]=[7]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT43= _PEND[6]=[6]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT43= _PEND[5]=[5]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT43= _PEND[4]=[4]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT43= _PEND[3]=[3]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT43= _PEND[2]=[2]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT43= _PEND[1]=[1]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= EXT_INT43= _PEND[0]=[0]=RWu=0x0 = Does not=occur= 0x1 = Interrupt occurs=0x0= = =