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Samsung Exynos 5 User Manual

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    							Samsung Confidential  
Exynos 5250_UM 2 Memory Map 
 2-8  
IP Base Address 
AES0&EF0 (NER) 0x1808_0000 
AES0&EF0 (NER) 0x1809_0000 
AES0&EF0 (NER) 0x180A_0000 
AES0&EF0 (NER) 0x180B_0000 
AES0&EF0 (NER) 0x180C_0000 
AES0&EF0 (NER) 0x180D_0000 
AES0&EF0 (NER) 0x180E_0000 
AES0&EF0 (NER) 0x180F_0000 
AES0&EF0 (EW) 0x1810_0000 
AES0&EF0 (EW) 0x1811_0000 
AES0&EF0 (EW) 0x1812_0000 
AES0&EF0 (EW) 0x1813_0000 
AES0&EF0 (EW) 0x1814_0000 
AES0&EF0 (EW) 0x1815_0000 
AES0&EF0 (EW) 0x1816_0000 
AES0&EF0 (EW) 0x1817_0000 
AES0&EF0 (ER) 0x1818_0000 
AES0&EF0 (ER) 0x1819_0000 
AES0&EF0 (ER) 0x181A_0000 
AES0&EF0 (ER) 0x181B_0000 
AES0&EF0 (ER) 0x181C_0000 
AES0&EF0 (ER) 0x181D_0000 
AES0&EF0 (ER) 0x181E_0000 
AES0&EF0 (ER) 0x181F_0000 
EFCON0_SFR 0x1820_0000 
AES0 SFR 0x1830_0000 
AES1&EF1 (NEW) 0x1840_0000 
AES1&EF1 (NEW) 0x1841_0000 
AES1&EF1 (NEW) 0x1842_0000 
AES1&EF1 (NEW) 0x1843_0000 
AES1&EF1 (NEW) 0x1844_0000 
AES1&EF1 (NEW) 0x1845_0000 
AES1&EF1 (NEW) 0x1846_0000 
AES1&EF1 (NEW) 0x1847_0000 
AES1&EF1 (NER) 0x1848_0000 
AES1&EF1 (NER) 0x1849_0000 
AES1&EF1 (NER) 0x184A_0000
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Exynos 5250_UM 2 Memory Map 
 2-9  
IP Base Address 
AES1&EF1 (NER) 0x184B_0000 
AES1&EF1 (NER) 0x184C_0000 
AES1&EF1 (NER) 0x184D_0000 
AES1&EF1 (NER) 0x184E_0000 
AES1&EF1 (NER) 0x184F_0000 
AES1&EF1 (EW) 0x1850_0000 
AES1&EF1 (EW) 0x1851_0000 
AES1&EF1 (EW) 0x1852_0000 
AES1&EF1 (EW) 0x1853_0000 
AES1&EF1 (EW) 0x1854_0000 
AES1&EF1 (EW) 0x1855_0000 
AES1&EF1 (EW) 0x1856_0000 
AES1&EF1 (EW) 0x1857_0000 
AES1&EF1 (ER) 0x1858_0000 
AES1&EF1 (ER) 0x1859_0000 
AES1&EF1 (ER) 0x185A_0000 
AES1&EF1 (ER) 0x185B_0000 
AES1&EF1 (ER) 0x185C_0000 
AES1&EF1 (ER) 0x185D_0000 
AES1&EF1 (ER) 0x185E_0000 
AES1&EF1 (ER) 0x185F_0000 
EFCON1_SFR 0x1860_0000 
ns NDMA 0x1868_0000 
s NDMA 0x1869_0000 
AES1 SFR 0x1870_0000
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Exynos 5250_UM 3 Chip ID 
 3-1  
3 Chip ID 
3.1 Overview 
Exynos 5250 contains a Chip ID block for the software (SW). This chip ID sends and receives APB interface 
signals to the bus system. You can fine the Chip ID on the first address of the SFR region (0x1000_0000). 
The Product ID Register supplies: 
 Product ID  
 Revision number 
 Package information 
With the exception of product ID, the electrical fuse ROM (e-from) provides all information bits.
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Exynos 5250_UM 3 Chip ID 
 3-2  
3.2 Register Description 
3.2.1 Register Map Summary 
 Base Address: 0x1000_0000 
Register Offset Description Reset Value 
PRO_ID 0x0000 Product information (ID, package, revision) 0x43520XXX 
 
 
3.2.1.1 PRO_ID 
 Base Address: 0x1000_0000 
 Address = Base Address + 0x0000, Reset Value = 0x43520XXX 
Name Bit Type Description Reset Value 
Product ID [31:12] R 
Product ID  
0x43520 is the product ID that is allocated to Exynos 
5250.  
0x43520 
Package [11:8] R Package information –=
MainRev=[7:4]=o=Main Revision number=MainRev. No.=
SubRev=[3:0]=o=Sub Revision=number=SubRev. No.=
NOTE: PRO_ID register[7:0] depends on the e-fuse ROM value. The e-fuse ROM values are loaded to the registers during 
the power on sequence. It can read the loaded current e-fuse ROM values. An e-fuse ROM consists of main and sub 
revision numbers.
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Exynos 5250_UM 4 Pad Control 
 4-1  
4 Pad Control 
4.1 Overview 
This chapter describes the General Purpose Input/Output (GPIO). 
Exynos 5250 includes:  
 253 multi-functional input/output port pins  
 160 memory port pins  
There are 39 general port groups and 2 memory port groups. They are: 
 GPA0, GPA1: 14 in/out ports-2xUART with flow control, UART without flow control, and/or 2xI2C , 
and/or2xHS-I2C 
 GPA2: 8 in/out ports-2xSPI, and/or I2C 
 GPB0, GPB1: 10 in/out ports-2xI2S, and/or 2xPCM, and/or AC97, SPDIF, I2C, and/or SPI 
 GPB2, GPB3: 8 in/out ports-PWM, I2C, and/or I2C ,and/or HS-I2C 
 GPC0, GPC1: 11 in/out ports-1xMMC (8-bit MMC) I/F 
 GPC2: 7 in/out ports-1xMMC (4-bit MMC) I/F 
 GPC3, GPC4: 14 in/out ports-2xMMC (4-bit MMC) and/or 1xMMC (8-bit MMC) I/F 
 GPD0: 4 pin/out ports-1xUART with flow control I/F 
 GPD1: 8 pin/out ports-HSI I/F 
 GPE0, GPE1, GPF0, GPF1, GPG0, GPG1, GPG2, GPH0, GPH1: 48 in/out ports-CAM I/F, and/or Trace I/F 
 GPV0, GPV1, GPV2, GPV3, GPV4: 34 in/out ports-C2C I/F 
 GPX0, 1, 2, 3: 32 in/out port-external wake-up interrupts (up-to 32-bit), and/or AUD I/F, and/or MFC I/F (GPX 
groups are in alive region)  
NOTE: These are in ALIVE region.
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Exynos 5250_UM 4 Pad Control 
 4-2  
 GPY0, GPY1, GPY2: 16 in/out ports-control signals of EBI (SROM) 
 GPY3, GPY4, GPY5, GPY6: 32 in/out memory ports-EBI 
 GPZ: 7 in/out ports-low power I2S and/or PCM 
NOTE: They can be used for the GPIO, when the power-gating of the MAU is not applied.  
 
 MP1_0-MP1_10: 80 DRAM1 ports 
NOTE: GPIO registers do not control these ports. 
 
 MP2_0-MP2_10: 80 DRAM2 ports 
NOTE: GPIO registers do not control these ports. 
 
 ETC0, ETC5, ETC6, ETC7, ETC8: 22 in/out ETC ports-JTAG, C2C_CLK (Rx), RESET, CLOCK, USBOTG 
and USB3, C2C_CLK (Tx) 
Warning: Do not leave a port in input Pull-up/down disable state when neither the port is used nor is connected 
to an input pin without Pull-up/down. It may cause unexpected state and leakage current. W hen a port 
is used as output function, ensure to disable Pull-up/down.
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Exynos 5250_UM 4 Pad Control 
 4-3  
4.2 Features 
Features of GPIO are: 
 Controls 205 External Interrupts 
 Controls 32 External wake-up Interrupts 
 Supports 253 multi-functional input/output ports 
 Controls pin states in sleep mode except GPX0, GPX1, GPX2, and GPX3 (GPX* pins are alive-pads)
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Exynos 5250_UM 4 Pad Control 
 4-4  
4.3 Input/Output Description 
This section describes the Block diagram of GPIO 
 
4.3.1 General Purpose Input/Output Block Diagram 
GPIO consists of two parts. They are: 
 Alive-part 
 Off-part 
In Alive-part, power is supplied on sleep mode. However, in off-part power is not supplied on sleep mode in off-
part it is not the same. Therefore, the registers in alive-part retain their values during sleep mode. 
Figure 4-1 illustrates the GPIO block diagram. 
 
    Figure 4-1   GPIO Block Diagram Alive Part
Pad control
Interrupt
Controller
Pad control
APB Bus
Interrupt
Controller &
Wake-up
controller
Register FileMux control
APB InterfaceExternal Interrupt
Control
Async Interface
Register File
Mux control
External InterruptControl
Off Part
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Exynos 5250_UM 4 Pad Control 
 4-5  
4.4 Register Description 
4.4.1 Register Map Summary 
 Base Address: 0x1140_0000 
Register Offset Description Reset Value 
GPA0CON 0x0000 Port group GPA0 configuration register 0x0000_0000 
GPA0DAT 0x0004 Port group GPA0 data register 0x00 
GPA0PUD 0x0008 Port group GPA0 ppull-up/down register 0x5555 
GPA0DRV 0x000C Port group GPA0 drive Strength 0x00_0000 
GPA0CONPDN 0x0010 Port group GPA0 power down mode configuration register 0x0000 
GPA0PUDPDN 0x0014 Port group GPA0 power down mode pull-up/down register 0x0000 
GPA1CON 0x0020 Port group GPA1 configuration register 0x0000_0000 
GPA1DAT 0x0024 Port group GPA1 data register 0x00 
GPA1PUD 0x0028 Port group GPA1 pull-up/down register 0x0555 
GPA1DRV 0x002C Port group GPA1 drive strength 0x00_0000 
GPA1CONPDN 0x0030 Port group GPA1 power down mode configuration register 0x0000 
GPA1PUDPDN 0x0034 Port group GPA1 power down mode pull-up/down register 0x0000 
GPA2CON 0x0040 Port group GPA2 configuration register 0x0000_0000 
GPA2DAT 0x0044 Port group GPA2 data register 0x00 
GPA2PUD 0x0048 Port group GPA2 pull-up/down register 0x5555 
GPA2DRV 0x004C Port group GPA2 drive strength 0x00_0000 
GPA2CONPDN 0x0050 Port group GPA2 power down mode configuration register 0x0000 
GPA2PUDPDN 0x0054 Port group GPA2 power down mode pull-up/down register 0x0000 
GPB0CON 0x0060 Port group GPB0 configuration register 0x0000_0000 
GPB0DAT 0x0064 Port group GPB0 data register 0x00 
GPB0PUD 0x0068 Port group GPB0 pull-up/down register 0x0155 
GPB0DRV 0x006C Port group GPB0 drive strength 0x00_0000 
GPB0CONPDN 0x0070 Port group GPB0 power down mode configuration register 0x0000 
GPB0PUDPDN 0x0074 Port group GPB0 power down mode pull-up/down register 0x0000 
GPB1CON 0x0080 Port group GPB1 configuration register 0x0000_0000 
GPB1DAT 0x0084 Port group GPB1 data register 0x00 
GPB1PUD 0x0088 Port group GPB1 pull-up/down register 0x0155 
GPB1DRV 0x008C Port group GPB1 drive strength 0x00_0000 
GPB1CONPDN 0x0090 Port group GPB1 power down mode configuration register 0x0000 
GPB1PUDPDN 0x0094 Port group GPB1 power down mode pull-up/down register 0x0000 
GPB2CON 0x00A0 Port group GPB2 configuration register 0x0000_0000 
GPB2DAT 0x00A4 Port group GPB2 data register 0x00 
GPB2PUD 0x00A8 Port group GPB2 pull-up/down register 0x0055
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Exynos 5250_UM 4 Pad Control 
 4-6  
Register Offset Description Reset Value 
GPB2DRV 0x00AC Port group GPB2 drive strength 0x00_0000 
GPB2CONPDN 0x00B0 Port group GPB2 power down mode configuration register 0x0000 
GPB2PUDPDN 0x00B4 Port group GPB2 power down mode pull-up/down register 0x0000 
GPB3CON 0x00C0 Port group GPB3 configuration register 0x0000_0000 
GPB3DAT 0x00C4 Port group GPB3 data register 0x00 
GPB3PUD 0x00C8 Port group GPB3 pull-up/down register 0x0055 
GPB3DRV 0x00CC Port group GPB3 drive strength 0x00_0000 
GPB3CONPDN 0x00D0 Port group GPB3 power down mode configuration register 0x0000 
GPB3PUDPDN 0x00D4 Port group GPB3 power down mode pull-up/down register 0x0000 
GPC0CON 0x00E0 Port group GPC0 configuration register 0x0000_0000 
GPC0DAT 0x00E4 Port group GPC0 data register 0x00 
GPC0PUD 0x00E8 Port group GPC0 pull-up/down register 0x0055 
GPC0DRV 0x00EC Port group GPC0 drive strength 0x00_2AAA 
GPC0CONPDN 0x00F0 Port group GPC0 power down mode configuration register 0x0000 
GPC0PUDPDN 0x00F4 Port group GPC0 power down mode pull-up/down register 0x0000 
GPC1CON 0x0100 Port group GPC1 configuration register 0x0000_0000 
GPC1DAT 0x0104 Port group GPC1 data register 0x00 
GPC1PUD 0x0108 Port group GPC1 pull-up/down register 0x0055 
GPC1DRV 0x010C Port group GPC1 drive strength 0x00_0000 
GPC1CONPDN 0x0110 Port group GPC1 power down mode configuration register 0x0000 
GPC1PUDPDN 0x0114 Port group GPC1 power down mode pull-up/down register 0x0000 
GPC2CON 0x0120 Port group GPC2 configuration register 0x0000_0000 
GPC2DAT 0x0124 Port group GPC2 data register 0x00 
GPC2PUD 0x0128 Port group GPC2 pull-up/down register 0x1555 
GPC2DRV 0x012C Port group GPC2 drive strength 0x00_0000 
GPC2CONPDN 0x0130 Port group GPC2 power down mode configuration register 0x0000 
GPC2PUDPDN 0x0134 Port group GPC2 power down mode pull-up/down register 0x0000 
GPC3CON 0x0140 Port group GPC3 configuration register 0x0000_0000 
GPC3DAT 0x0144 Port group GPC3 data register 0x00 
GPC3PUD 0x0148 Port group GPC3 pull-up/down register 0x1555 
GPC3DRV 0x014C Port group GPC3 drive strength 0x00_0000 
GPC3CONPDN 0x0150 Port group GPC3 power down mode configuration register 0x0000 
GPC3PUDPDN 0x0154 Port group GPC3 power down mode pull-up/down register 0x0000 
GPD0CON 0x0160 Port group GPD0 configuration register 0x0000_0000 
GPD0DAT 0x0164 Port group GPD0 data register 0x00 
GPD0PUD 0x0168 Port group GPD0 pull-up/down register 0x0055 
GPD0DRV 0x016C Port group GPD0 drive strength 0x00_0000
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