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Samsung Exynos 5 User Manual

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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-207  
4.4.1.295 GPG2DAT 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x00C4, Reset Value = 0x00 
Name Bit Type Description Reset Value 
GPG2DAT[1:0] [1:0] RWX 
When you configure the port as input port, the 
corresponding bit is the pin state. When you configure 
the port as output port, the pin state is the same as the 
corresponding bit. W hen you configure the port as 
functional pin, the undefined value will be read. 
0x00 
 
4.4.1.296 GPG2PUD 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x00C8, Reset Value = 0x0005 
Name Bit Type Description Reset Value 
GPG2PUD[n] [2n + 1:2n] 
n = 0 to 1 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x0005 
 
4.4.1.297 GPG2DRV 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x00CC, Reset Value = 0x00_0000 
Name Bit Type Description Reset Value 
GPG2DRV[n] 
[2n + 1:2n] 
n = 0 to 1 RW 
0x0 = 1x 
0x2 = 2x 
0x1 = 3x 
0x3 = 4x 
0x00_0000 
[n + 16:16] 
n = 0 to 1 RW Reserved. Should be zero. 0x00_0000
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Exynos 5250_UM 4 Pad Control 
 4-208  
4.4.1.298 GPG2CONPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x00D0, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPG2[n] [2n + 1:2n] 
n = 0 to 1 RW 
0x0 = Output 0, 
0x1 = Output 1 
0x2 = Input 
0x3 = Previous state 
0x00 
 
4.4.1.299 GPG2PUDPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x00D4, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPG2[n] [2n + 1:2n] 
n = 0 to 1 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x00
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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-209  
4.4.1.300 GPH0CON 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x00E0, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
GPH0CON[3] [15:12] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_CLKOUT 
0x3 to 0xE = Reserved 
0xF = EXT_INT21[3] 
0x00 
GPH0CON[2] [11:8] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_HREF 
0x3 to 0xE = Reserved 
0xF = EXT_INT21[2] 
0x00 
GPH0CON[1] [7:4] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_VSYNC 
0x3 = TraceCtl 
0x4 to 0xE = Reserved 
0xF = EXT_INT21[1] 
0x00 
GPH0CON[0] [3:0] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_PCLK 
0x3 = TraceClk 
0x4 to 0xE = Reserved 
0xF = EXT_INT21[0] 
0x00
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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-210  
4.4.1.301 GPH0DAT 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x00E4, Reset Value = 0x00 
Name Bit Type Description Reset Value 
GPH0DAT[3:0] [3:0] RWX 
When you configure the port as input port, the 
corresponding bit is the pin state. When you configure 
the port as output port, the pin state is the same as the 
corresponding bit. W hen you configure the port as 
functional pin, the undefined value will be read. 
0x00 
 
4.4.1.302 GPH0PUD 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x00E8, Reset Value = 0x0055 
Name Bit Type Description Reset Value 
GPH0PUD[n] [2n + 1:2n] 
n = 0 to 3 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x0055 
 
4.4.1.303 GPH0DRV 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x00EC, Reset Value = 0x00_0000 
Name Bit Type Description Reset Value 
GPH0DRV[n] 
[2n + 1:2n] 
n = 0 to 3 RW 
0x0 = 1x 
0x2 = 2x 
0x1 = 3x 
0x3 = 4x 
0x00_0000 
[n + 16:16] 
n = 0 to 3 RW Reserved. Should be zero. 0x00_0000
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Exynos 5250_UM 4 Pad Control 
 4-211  
4.4.1.304 GPH0CONPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x00F0, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPH0[n] [2n + 1:2n] 
n = 0 to 3 RW 
0x0 = Output 0 
0x1 = Output 1 
0x2 = Input 
0x3 = Previous state 
0x00 
 
4.4.1.305 GPH0PUDPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x00F4, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPH0[n] [2n + 1:2n] 
n = 0 to 3 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x00
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Exynos 5250_UM 4 Pad Control 
 4-212  
4.4.1.306 GPH1CON 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0100, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
GPH1CON[7] [31:28] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_DATA[7] 
0x3 to 0xE = Reserved 
0xF = EXT_INT22[7] 
0x00 
GPH1CON[6] [27:24] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_DATA[6] 
0x3 to 0xE = Reserved 
0xF = EXT_INT22[6] 
0x00 
GPH1CON[5] [23:20] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_DATA[5] 
0x3 to 0xE = Reserved 
0xF = EXT_INT22[5] 
0x00 
GPH1CON[4] [19:16] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_DATA[4] 
0x3 = LCD_FRM 
0x4 to 0xE = Reserved 
0xF = EXT_INT22[4] 
0x00 
GPH1CON[3] [15:12] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_DATA[3] 
0x3 to 0xE = Reserved 
0xF = EXT_INT22[3] 
0x00 
GPH1CON[2] [11:8] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_DATA[2] 
0x3 to 0xE = Reserved 
0xF = EXT_INT22[2] 
0x00 
GPH1CON[1] [7:4] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_DATA[1] 
0x3 to 0xE = Reserved 
0xF = EXT_INT22[1] 
0x00 
GPH1CON[0] [3:0] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_A_DATA[0] 
0x3 = TES 
0x4 to 0xE = Reserved 
0xF = EXT_INT22[0] 
0x00
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Exynos 5250_UM 4 Pad Control 
 4-213  
4.4.1.307 GPH1DAT 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0104, Reset Value = 0x00 
Name Bit Type Description Reset Value 
GPH1DAT[7:0] [7:0] RWX 
When you configure the port as input port, the 
corresponding bit is the pin state. When you configure 
the port as output port, the pin state is the same as the 
corresponding bit. W hen you configure the port as 
functional pin, the undefined value will be read. 
0x00 
 
4.4.1.308 GPH1PUD 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0108, Reset Value = 0x5555 
Name Bit Type Description Reset Value 
GPH1PUD[n] [2n + 1:2n] 
n = 0 to 7 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x5555 
 
4.4.1.309 GPH1DRV 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x010C, Reset Value = 0x00_0000 
Name Bit Type Description Reset Value 
GPH1DRV[n] 
[2n + 1:2n] 
n = 0 to 7 RW 
0x0 = 1x 
0x2 = 2x 
0x1 = 3x 
0x3 = 4x 
0x00_0000 
[n + 16:16] 
n = 0 to 7 RW Reserved. Should be zero. 0x00_0000
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Exynos 5250_UM 4 Pad Control 
 4-214  
4.4.1.310 GPH1CONPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0110, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPH1[n] [2n + 1:2n] 
n = 0 to 7 RW 
0x0 = Output 0 
0x1 = Output 1 
0x2 = Input 
0x3 = Previous state 
0x00 
 
4.4.1.311 GPH1PUDPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0114, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPH1[n] [2n + 1:2n] 
n = 0 to 7 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x00
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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-215  
4.4.1.312 EXT_INT14CON 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0700, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
RSVD [31] –=Reserved=0x0=
EXT_INT14=
_CON[7]=[30:28]=RW=
Setting the signaling method of EXT_INT14[7]=
0x0 ==Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[27]=–=Reserved=0x0=
EXT_INT14=
_CON[6]=[26:24]=RW=
Setting the signaling method of EXT_INT14[6]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[23]=–=Reserved=0x0=
EXT_INT14=
_CON[5]=[22:20]=RW=
Setting the signaling method=of EXT_INT14[5]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[19]=–=Reserved=0x0=
EXT_INT14=
_CON[4]=[18:16]=RW=
Setting the signaling method=of EXT_INT14[4]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[15]=–=Reserved=0x0=
EXT_INT14=
_CON[3]=[14:12]=RW=
Setting the signaling method=of EXT_INT14[3]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4== Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[11]=–=Reserved=0x0=
EXT_INT14=[10:8]=RW=Setting the signaling method=of EXT_INT14[2]=0x0=
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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-216  
Name Bit Type Description Reset Value 
_CON[2] 0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
RSVD [7] – Reserved 0x0 
EXT_INT14 
_CON[1] [6:4] RW 
Setting the signaling method of EXT_INT14[1] 
0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
0x0 
RSVD [3] – Reserved 0x0 
EXT_INT14 
_CON[0] [2:0] RW 
Setting the signaling method of EXT_INT14[0] 
0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
0x0
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