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Samsung Exynos 5 User Manual

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    							Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-187  
4.4.1.258 GPE0CON 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0000, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
GPE0CON[7] [31:28] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_GPIO[7] 
0x3 = TXD_UART_ISP 
0x4 to 0xE = Reserved 
0xF = EXT_INT14[7] 
0x00 
GPE0CON[6] [27:24] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_GPIO[6] 
0x3 = nRTS_UART_ISP 
0x4 = CAM_I2C2_SDA 
0x5 to 0xE = Reserved 
0xF = EXT_INT14[6] 
0x00 
GPE0CON[5] [23:20] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_GPIO[5] 
0x3 = MPWM6_OUT_ISP 
0x4 = CAM_SPI1_MOSI 
0x5 to 0xE = Reserved 
0xF = EXT_INT14[5] 
0x00 
GPE0CON[4] [19:16] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_GPIO[4] 
0x3 = MPWM5_OUT_ISP 
0x4 = CAM_SPI1_MISO 
0x5 to 0xE = Reserved 
0xF = EXT_INT14[4] 
0x00 
GPE0CON[3] [15:12] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_GPIO[3] 
0x3 = MPWM4_OUT_ISP 
0x4 to 0xE = Reserved 
0xF = EXT_INT14[3] 
0x00 
GPE0CON[2] [11:8] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_GPIO[2] 
0x3 = MPWM3_OUT_ISP 
0x4 to 0xE = Reserved 
0xF = EXT_INT14[2] 
0x00 
GPE0CON[1] [7:4] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_GPIO[1] 
0x3 = MPWM2_OUT_ISP 
0x4 to 0xE = Reserved 
0x00
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Exynos 5250_UM 4 Pad Control 
 4-188  
Name Bit Type Description Reset Value 
0xF = EXT_INT14[1] 
GPE0CON[0] [3:0] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_GPIO[0] 
0x3 = MPWM1_OUT_ISP 
0x4 to 0xE = Reserved 
0xF = EXT_INT14[0] 
0x00
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Exynos 5250_UM 4 Pad Control 
 4-189  
4.4.1.259 GPE0DAT 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0004, Reset Value = 0x00 
Name Bit Type Description Reset Value 
GPE0DAT[7:0] [7:0] RWX 
When you configure the port as input port, the 
corresponding bit is the pin state. When you configure 
the port as output port, the pin state is the same as the 
corresponding bit. W hen you configure the port as 
functional pin, the undefined value will be read. 
0x00 
 
4.4.1.260 GPE0PUD 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0008, Reset Value = 0x5555 
Name Bit Type Description Reset Value 
GPE0PUD[n] [2n + 1:2n] 
n = 0 to 7 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x5555 
 
4.4.1.261 GPE0DRV 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x000C, Reset Value = 0x00_0000 
Name Bit Type Description Reset Value 
GPE0DRV[n] 
[2n + 1:2n] 
n = 0 to 7 RW 
0x0 = 1x 
0x2 = 2x 
0x1 = 3x 
0x3 = 4x 
0x00_0000 
[n + 16:16] 
n = 0 to 7 RW Reserved. Should be zero. 0x00_0000
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Exynos 5250_UM 4 Pad Control 
 4-190  
4.4.1.262 GPE0CONPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0010, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPE0[n] [2n + 1:2n] 
n = 0 to 7 RW 
0x0 = Output 0 
0x1 = Output 1 
0x2 = Input 
0x3 = Previous state 
0x00 
 
4.4.1.263 GPE0PUDPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0014, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPE0[n] [2n + 1:2n] 
n = 0 to 7 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x00 
 
4.4.1.264 GPE1CON 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0020, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
GPE1CON[1] [7:4] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_GPIO[9] 
0x3 = RXD_UART_ISP 
0x4 to 0xE = Reserved 
0xF = EXT_INT15[1] 
0x00 
GPE1CON[0] [3:0] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_GPIO[8] 
0x3 = nCTS_UART_ISP 
0x4 = CAM_I2C2_SCL 
0x5 to 0xE = Reserved 
0xF = EXT_INT15[0] 
0x00
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Exynos 5250_UM 4 Pad Control 
 4-191  
4.4.1.265 GPE1DAT 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0024, Reset Value = 0x00 
Name Bit Type Description Reset Value 
GPE1DAT[1:0] [1:0] RWX 
When you configure the port as input port, the 
corresponding bit is the pin state. When you configure 
the port as output port, the pin state is the same as the 
corresponding bit. W hen you configure the port as 
functional pin, the undefined value will be read. 
0x00 
 
4.4.1.266 GPE1PUD 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0028 Reset Value = 0x0005 
Name Bit Type Description Reset Value 
GPE1PUD[n] [2n + 1:2n] 
n = 0 to 1 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x0005 
 
4.4.1.267 GPE1DRV 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x002C, Reset Value = 0x00_0000 
Name Bit Type Description Reset Value 
GPE1DRV[n] 
[2n + 1:2n] 
n = 0 to 1 RW 
0x0 = 1x 
0x2 = 2x 
0x1 = 3x 
0x3 = 4x 
0x00_0000 
[n + 16:16] 
N = 0 to 1 RW Reserved. Should be zero. 0x00_0000
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Exynos 5250_UM 4 Pad Control 
 4-192  
4.4.1.268 GPE1CONPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0030, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPE1[n] [2n + 1:2n] 
n = 0 to 1 RW 
0x0 = Output 0 
0x1 = Output 1 
0x2 = Input 
0x3 = Previous state 
0x00 
 
4.4.1.269 GPE1PUDPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0034, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPE1[n] [2n + 1:2n] 
n = 0 to 1 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x00
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Exynos 5250_UM 4 Pad Control 
 4-193  
4.4.1.270 GPF0CON 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0040, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
GPF0CON[3] [15:12] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_I2C1_SCL 
0x3 = CAM_GPIO[13] 
0x4 = CAM_SPI1_nSS 
0x5 to 0xE = Reserved 
0xF = EXT_INT16[3] 
0x00 
GPF0CON[2] [11:8] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_I2C1_SDA 
0x3 = CAM_GPIO[12] 
0x4 = CAM_SPI1_CLK 
0x5 to 0xE = Reserved 
0xF = EXT_INT16[2] 
0x00 
GPF0CON[1] [7:4] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_I2C0_SCL 
0x3 = CAM_GPIO[11] 
0x4 to 0xE = Reserved 
0xF = EXT_INT16[1] 
0x00 
GPF0CON[0] [3:0] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_I2C0_SDA 
0x3 = CAM_GPIO[10] 
0x4 to 0xE = Reserved 
0xF = EXT_INT16[0] 
0x00
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Exynos 5250_UM 4 Pad Control 
 4-194  
4.4.1.271 GPF0DAT 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0044, Reset Value = 0x00 
Name Bit Type Description Reset Value 
GPF0DAT[3:0] [3:0] RWX 
When you configure the port as input port, the 
corresponding bit is the pin state. When you configure 
the port as output port, the pin state is the same as the 
corresponding bit. W hen you configure the port as 
functional pin, the undefined value will be read. 
0x00 
 
4.4.1.272 GPF0PUD 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0048, Reset Value = 0x0055 
Name Bit Type Description Reset Value 
GPF0PUD[n] [2n + 1:2n] 
n = 0 to 3 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved0x3 = Enables Pull-up  
0x0055 
 
4.4.1.273 GPF0DRV 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x004C, Reset Value = 0x00_0000 
Name Bit Type Description Reset Value 
GPF0DRV[n] 
[2n + 1:2n] 
n = 0 to 3 RW 
0x0 = 1x 
0x2 = 2x 
0x1 = 3x 
0x3 = 4x 
0x00_0000 
[n + 16:16] 
n = 0 to 3 RW Reserved. Should be zero. 0x00_0000
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Exynos 5250_UM 4 Pad Control 
 4-195  
4.4.1.274 GPF0CONPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0050, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPF0[n] [2n + 1:2n] 
n = 0 to 3 RW 
0x0 = Output 0 
0x1 = Output 1 
0x2 = Input 
0x3 = Previous state 
0x00 
 
4.4.1.275 GPF0PUDPDN 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0054, Reset Value = 0x0000 
Name Bit Type Description Reset Value 
GPF0[n] [2n + 1:2n] 
n = 0 to 3 RW 
0x0 = Disables Pull-up/down  
0x1 = Enables Pull-down  
0x2 = Reserved 
0x3 = Enables Pull-up  
0x00
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Exynos 5250_UM 4 Pad Control 
 4-196  
4.4.1.276 GPF1CON 
 Base Address: 0x1340_0000 
 Address = Base Address + 0x0060, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
GPF1CON[3] [15:12] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_SPI_MOSI 
0x3 = CAM_GPIO[17] 
0x4 to 0xE = Reserved 
0xF = EXT_INT17[3] 
0x00 
GPF1CON[2] [11:8] RW 
0x0 = Inputs 
0x1 = Outputs 
0x2 = CAM_SPI_MISO 
0x3 = CAM_GPIO[16] 
0x4 to 0xE = Reserved 
0xF = EXT_INT17[2] 
0x00 
GPF1CON[1] [7:4] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_SPI_nSS 
0x3 = CAM_GPIO[15] 
0x4 to 0xE = Reserved 
0xF = EXT_INT17[1] 
0x00 
GPF1CON[0] [3:0] RW 
0x0 = Input 
0x1 = Output 
0x2 = CAM_SPI_CLK 
0x3 = CAM_GPIO[14] 
0x4 to 0xE = Reserved 
0xF = EXT_INT17[0] 
0x00
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