NEC Mcu 5000a Multipoint Control Unit Equipment Manual
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NECA 340-414-210 Revision 2.0 Page 1 of 4 MCU 5000A Multipoint Control Unit GSD-008 PG/SIO Unit Figure 1: PG/SIO Unit CN1 CN2SW 1(1) RC 1~4 L S14 S15 S16 S17 CN 4 CN 3 S8 S11INT 3 INT 4 EXT 1 EXT 2 S2 S5 INT 1 INT 2S3 S4 S6 S7 IN NOR DBGS 1IN S 13 S 12 S 10 S 9SW 1 RC 1~4 CN 4 CN 38 1 RC 1 RC 2 RC 3 RC 4C L0S SLP 3 SLP 2 SLP 1 (a) SIDE VIEW (b) FRONT VIEW E (RED) (AMBER) (AMBER) (AMBER) (LED) SW 2 14 EXT 3 EXT 4CH 4 CH 1
Page 2 of 4 NECA 340-414-210 Revision 2.0 GSD-008 MCU 5000A Multipoint Control Unit Table 1: Switch and Strap Setting for PG/SIO Unit (1 of 3) COMPONENTS FUNCTION SHIPPING CONDITION SW1 Set the baud rate of RS-232C interface (CH1 to CH4). 0: SW ON state 1: SW OFF state *: Setting at the time of shipment. SW2 Set the external clock frequency to extract from the network. D1 D0 Baud rate 1 1 9600 bps 1 0 4800 bps 0 1 2400 bps 0 0 1200 bps SW1 Setting Function 8D1 RS-232C CH4 Baud rate setting 7D0 6D1 RS-232C CH3 Baud rate setting 5D0 4D1 RS-232C CH2 Baud rate setting 3D0 2D1 RS-232C CH1 Baud rate setting 1D0SW1Setting 8OFF 7OFF 6OFF 5OFF 4OFF 3OFF 2OFF 1OFF * : Setting at the time of shipment.SW2 Input clock (Hz) 4 321 OFF OFF OFF OFF OFF OFF OFF OFF ON OFF OFF OFF ON OFF 448 k OFF OFF ON ON 112 k OFF ON OFF OFF 56 k OFF ON OFF ON 2,048 k OFF ON ON OFF 1,920 k OFFONONON 1,544 k * ON OFF OFF OFF 1,536 k ON OFF OFF ON 960 k ON OFF ON OFF 768 k ON OFF ON ON 384 k ON ON OFF OFF 256 k ON ON OFF ON 192 k ON ON ON OFF 128 k ON ON ON ON 64 k SW2 Setting 4OFF 3ON 2ON 1ON 14ON OFF 1,544Hz Setting OFF ON 8 1 9600 bps Setting
NECA 340-414-210 Revision 2.0 Page 3 of 4 MCU 5000A Multipoint Control Unit GSD-008 Table 1: Switch and Strap Setting for PG/SIO Unit (2 of 3) COMPONENTS FUNCTION SHIPPING CONDITION S1 Strap for debugging NOR side. S2 S3 S4 S5 S6 S7With regard to the control signals (CS, DR, CD, ST2 clocks, RT clock) of the RS-232C interface (CH1 to 4), these select either the normal operation (a signal from the remote communication side is fetched) or the fixed level. Side to be strapped is indicated below: S2 EXT1 side S3 IN side S4 IN side S5 EXT2 side S6 IN side S7 IN side DBGNOR RS-232C Part No. Setting Function Ch1S2 INT1 CS, DR, CD fixed at “L” (ON) EXT1 CS, DR, CD normal operation S3 IN ST2 fixed at “H”. _ ST2 normal operation S4 IN RT fixed at “H”. _ RT normal operation CH2S5 INT2 CS, DR, CD fixed at “L” (ON). EXT2 CS, DR, CD normal operation S6 IN ST2 fixed at “H”. _ ST2 normal operation S7 IN RT fixed at “H”. _ RT normal operation Part No. Setting Function S1DBG Disregard slot address on mounted location. NOR Normal state
Page 4 of 4 NECA 340-414-210 Revision 2.0 GSD-008 MCU 5000A Multipoint Control Unit Table 1: Switch and Strap Setting for PG/SIO Unit (3 of 3) Table 2: LED FUNCTIONS FOR PG/SIO UNIT COMPONENTS FUNCTION SHIPPING CONDITION S8 S9 S10 S11 S12 S13 S8 EXT3 side S9 IN side S10 IN side S11 EXT4 side S12 IN side S13 IN side S14 S15 S16 S17Set interrupting detect trigger (Edge trigger mode or Level trigger mode) which is caused by external clock OFF or internal clock phase slip in the unit to initialization of µ PD71059 by strapping.S14 E side S15 E side S16 E side S17 E side RS-232C Part No. Setting Function Ch3S8 INT3 CS, DR, CD fixed at “L” (ON) EXT3 CS, DR, CD normal operation S9 IN ST2 fixed at “H”. _ ST2 normal operation S10 IN RT fixed at “H”. _ RT normal operation CH4S11 INT4 CS, DR, CD fixed at “L” (ON). EXT4 CS, DR, CD normal operation S12 IN ST2 fixed at “H”. _ ST2 normal operation S13 IN RT fixed at “H”. _ RT normal operation Strap Functions Trigger mode S141.544 MHz clock Phase SlipEEdge LLevel S154.096 MHz clock Phase SlipEEdge LLevel S1610.752 MHz clock Phase SlipEEdge LLevel S17Line Clock LossEEdge LLevel LED NO. LED NAME FUNCTION LED COLOR RC1 CLOS Lights when the line clock input lost. Red RC2 SLP3 Lights when a phase slip between the circuit clock and 10.752 MHz clock has occurred.Amber RC3 SLP2 Lights when a phase slip between the line clock and 4.096 MHz clock has occurred. Amber RC4 SLP1 Lights when phase slip between the line clock and 1.544 MHz clock has occurred. Amber
NECA 340-414-210 Revision 2.0 Page 1 of 4 MCU 5000A Multipoint Control Unit GSD-009 M CONT Unit Figure 1: M CONT Unit ON (a) SIDE VIEW (b) FRONT VIEW CN1 CN2 M CONT MS B LS B NMI RST SW 3 MEM CARD ACCESS CN 4 CN 3 LED CHECK SW 4 CN 3 CN 4 RC 6 8 1 SW 3 SW 2 SW 1 RC 7 RC 14 RC 14 RC 7 8 1 MEMORY CARDCPU STATUS DEBUG DBS 816 OFFON (LED)CPU PCK CLK BATTOFF WDT BATTERY
Page 2 of 4 NECA 340-414-210 Revision 2.0 GSD-009 MCU 5000A Multipoint Control Unit Table 1: Switch and Strip Setting for M CONT Unit (1 of 2) Components Function Shipping Condition SW1 (NMI) Re-start switch Requests the CPU for NMI (Non-Maskable Interrupt) (Push On)_ SW2 (RST) Reset switch Requests for CPU reset (Push On)_ SW3 (D IN) DIP switch for debugging Board for input of data of 8 bit length ALL OFF SW4 (LMT) LED check switch (on-latch) Lighting check of all units in the MCU Set Up ® Normal Down LED ® checkUp (Normal) SW##8#7#6#5#4#3#2#1 bit D7D6D5D4D3D2D1D0 DB SE LM PS VC TCB TCA CM Not Used Operates in the 0: Operates after event of a system initialization parameter error 1: Stop processing Operates in the 0: Stop event of an alarm 1: Restart Command for debugging 0: Debug command usable (SMIO, RMIO) 1: Debug command unusable If reset with both #7 and #8 to 0, backup RAM is forced to be initialized. Set Open (OFF) ® 1 Close (ON) ® 0 OFF ON 8 1
NECA 340-414-210 Revision 2.0 Page 3 of 4 MCU 5000A Multipoint Control Unit GSD-009 Table 1: Switch and Strip Setting for M CONT Unit (2 of 2) Components Function Shipping Condition BATT Backup power control (ON/OFF) When installed, should be set to ON side.OFF side DBS External unit data bus selection (8 bits/16 bits) 8 side CN3 (MON) RS-232C port RS-232C port for debugging Communications system: Full duplex Communication rate: 9600 bps Sync system: Asynchronous Data type: Start bit 1 Data bit 8 Stop bit 1 Parity None_ CN4 Connector for memory card CLK External output clock selection PCK side WDT Watchdog time control (ON/OFF) ON side Setting Function ON Backup power ON OFF Backup power OFF OFFON Setting Function 16 Data bus is 16 bits 8 Data bus is 8 bits 816 Pin # Signal name Contents 1 2 3 4_ RxD TxD SGNC Receive data Send data Ground Setting Function CPU CPU clock is outputted PCK P clock of CPU is outputted. PLKCPU Setting Function ON CPU is reset by watchdog timer. OFF CPU is not reset by watchdog timer. OFFON
Page 4 of 4 NECA 340-414-210 Revision 2.0 GSD-009 MCU 5000A Multipoint Control Unit Table 2: LED Function for M CONT Unit Components Function Shipping Condition RC7 thru 14 ST 1~8)CPU status When normal D7, D6: RED Except D7, D6: YELLOW RC6 (MC) Memory card access Lights when accessing the memory cardRED LED# 14 13 12 11 10 9 8 7 bit D7D6D5D4D3D2D1D0 Task No. display memory card battery 0: Voltage abnormal voltage detection 1: Voltage normal 0 ® lit 1 ® unlit LED#1413121110 9 8 7 bit D7D6D5D4D3D2D1D0 Memory card battery voltage detection 0: Voltage abnormal 1: Voltage normal • Abnormal generated task number display • Initial RAM/ROM error RAM error : 7F : D0~D6 ON ROM error : 7E : D1~D6 ON MCU H/W initialize error : 7D : D0, D2~D6 ON Backup RAM error : 7C : D2~D6 ON Program load error : 7B : D0, D1, D3~D6 ON Loader abnormal operating : 7A : D1, D3~D6 ON
NECA 340-414-210 Revision 2.0 Page 1 of 4 MCU 5000A Multipoint Control Unit GSD-010 VDSW Unit Figure 1: VDSW Unit CN1 CN2 S2 chL chH 4 1 SW 2 SW1A B LED8 LED7 LED6 LED5 LED4 LED3 LED2 LED1VDSW CONF A RC8 TOGGLE SW 4 P ANGLE PIN HEADER THUMB WHEEL SW (a) SIDE VIEW(b) FRONT VIEW CN 3LED1 JOIN 27 LED2 S3 chL chH S1 NOR DBG PN ERR PN RCV LED9CONF B LED3 LED4 LED5 LED6 LED7 LED8 LED9 LED11 LED10PN ERR PN RCVRC1 RC4 RC1 RC4 RC1 RC4 RC1 RC4 RC1 RC4 RC1 OPE VIDEO LSD1 MLP/LSD2 HSD
Page 2 of 4 NECA 340-414-210 Revision 2.0 GSD-010 MCU 5000A Multipoint Control Unit Table 1: Switch and Strap Setting for VDSW Unit COMPONENTS SETTING FUNCTION SHIPPING CONDITION CONF A/B (Toggle SW, SW1)Selects the status indication of conference A. (Toggle SW is in up state.) Selects the status indication of conference B. (Toggle SW is in down state.) MON SEL (Thumb wheel SW, SW2)_Selects the output (CH1-CH8) for monitor. Select Channel No. Displayed (SW No.) CH1 0 CH2 1 CH3 2 CH4 3 CH5 4 CH6 5 CH7 6 CH8 7SW No. is 0 S3ch L side Sets TS0 to TS15 on LSD for use. ch H side ch H side Normal condition. (TS16 to TS31) S1NOR side Normal condition. NOR side DBG side Access to CPU irrespective of slot address for mounting position of unit. S2ch L side Set HSCX Point-to-Point mode. ch H side ch H side Normal condition (Bus connection). ChLChH 1 2 3 NOR DBG 1 2 3 ChL ChH 1 2 3 CONF A CONF B CONF A SIDE