NEC Neax 2400 Imx Callcenterworx Enterprise Acd System Manual
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CHAPTER 4 NDA-24282 Pag e 7 2 Revision 1.0 PA-CP54 (CPU) PA-CP54 (CPU) 1. Function This circuit card is the CPU card (Central Processing Unit) which controls the ACD Module Type System. Using the V60 microprocessor (32 bits), this CPU card provides programs and working memory. The card is equipped with EPROM of 2MB and SRAM of maximum 384KB respectively. 2. Mounting Location/Condition The mounting locations of this circuit card and the conditions related to mounting are shown below. CPU APINTAPINT CPUCPU COPYCOPY CRAMCRAM IOC ACD-MIS ALMC RS-232C (Non-protocol) ACD in IMX system (Module Type) Position within the System I/O LOCAL BUS (ACDP) (ACDP) APM 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Mounting Module APM-A\E PA-CP54PA-CP54 For No.1 systemFor No.0 system
NDA-24282 CHAPTER 4 Page 73 Revision 1.0 PA - C P 5 4 ( C P U ) 3. Face Layout of Lamp, Switches, and Connectors The face layout of lamps, switches, and connectors of this circuit card is shown below. 4. Lamp Indications The contents of lamp indications of this circuit card are shown in the table below. LAMP NAME COLOR STATE CPU OPE Green Remains lit while this circuit card is operating. CLK ALM RedLights when a microprocessor operating clock failure has occurred in this circuit card. COP ALM Red Lights when a C-level infinite loop has occurred. CPU OPE MBR SW0 SW4 SW3 CLKALM COPALM RESET SENSE SW1 SW2
CHAPTER 4 NDA-24282 Pag e 7 4 Revision 1.0 PA-CP54 (CPU) 5. Switch Settings Standard settings of various switches on this circuit card are shown in the table below. SWITCH NAMESWITCH NO. SETTINGSTANDARD SETTINGMEANING MBUP Circuit card make busy. DOWN Circuit card make idle. RESET PUSH Starting of reset of this circuit card. SENSE0 1For MMG (ICS), UMG (ICS), UMGx (Normal Setting). 2 3 4 5For IMG (IMX) (ICS), IMGx, IMGxh, IMGdxh (Normal Setting). 6 7 8 9When connecting the ACD System to MMG (ICS), UMG (ICS), UMGx; and when the data memory of ACDP is to be cleared at the time of ACDP initialization. (CRAM Clear). A B C DWhen connecting the ACD System to IMG (IMX) (ICS), IMGx, IMGxh, IMGdxh; and when the data memory of ACDP is to be cleared at the time of ACDP initialization. (CRAM Clear). E F
NDA-24282 CHAPTER 4 Page 75 Revision 1.0 PA - C P 5 4 ( C P U ) SW01ON×Memory Parity Alarm Inhibited. OFF Memory Parity Alarm not inhibited. 2ON External NMI input inhibited. OFF×External NMI input not inhibited. 3ON Memory Alarm NMI inhibited. OFF×Memory Alarm NMI not inhibited. 4ON COPALM inhibited. OFF×COPALM not inhibited. 5OFF×Fixed. 6OFF×Fixed. 7ONWhen ACDP is provided by dual-system con- figuration. OFFWhen ACDP is provided by single-system con- figuration. 8OFF×Fixed. SW11ONSets Ready Alarm Detect Timing to longer than 48 sec. OFF×Sets Ready Alarm Detect Timing to longer than 6 sec. 2ON Sets the interval of C-Level interrupt to 4 msec. OFF×Sets the interval of C-Level interrupt to 16 msec. 3ONNMI input from an external memory system is inhibited. OFF×NMI input from an external memory system is not inhibited. 4OFF×Fixed. 5ON×Equipped with 1.5 MB CRAM area. OFF Equipped with 3 MB CRAM area. 6ON×Fixed. 7ON IMX Fixed. OFF ICS Fixed. 8ON×CRAM (PA-ME34) mounted. OFF CRAM (PA-ME34) not mounted. SWITCH NAMESWITCH NO. SETTINGSTANDARD SETTINGMEANING
CHAPTER 4 NDA-24282 Pag e 7 6 Revision 1.0 PA-CP54 (CPU) SW21 2 3ON×When equipping 1M bit SRAM IC. OFF When equipping 256 K bit SRAM IC. 4 5 6ON×When providing EE0000H ~ EFFFFFH and E00000H ~ E3FFFFH as RAM areas. OFFWhen providing EE0000H ~ EFFFFFH as RAM area. 7ON×When equipping 256 kbit SRAM IC as parity RAM. OFFWhen equipping 64 kbit SRAM IC as parity RAM. 8ON Test mode (Always mis-hit state). OFF×Normal operation mode. SW31OFF×Fixed. 2ONWhen equipping 64 kbit SRAM IC as parity RAM. OFF×When equipping 256 kbit SRAM IC as parity RAM. 3ON×When equipping EPROM IC of either 1M bit 2M bit. OFF When equipping EPROM IC of 4M bit. 4ON×When equipping EPROM IC of either 1M bit 2M bit as parity ROM. OFFWhen equipping EPROM IC of 4M bit as pari- ty ROM. SWITCH NAMESWITCH NO. SETTINGSTANDARD SETTINGMEANING SW2-1 SW2-2 SETTING OF EPROM ON ON When equipping 1M bit EPROM IC. ON OFF When equipping 2M bit EPROM IC (standard). OFF ON When equipping 4M bit EPROM IC. OFF OFF Not used SW2-4 SW2-5 SETTING OF ROM AREAS ON ON When providing 1MB of F00000H ~ FFFFFFH. OFF ONWhen providing 2MB of F00000H ~ FFFFFFH and 00000H ~ 0FFFFFH (standard setting). OFF OFFWhen providing 4MB of F00000H ~ FFFFFFH and 00000H ~ 2FFFFFH.
NDA-24282 CHAPTER 4 Page 77 Revision 1.0 PA - C P 5 4 ( C P U ) SW41OFF×Fixed 2OFF×Fixed 3ON×Fixed 4OFF×Fixed 5ON×Fixed 6OFF×Fixed 7OFF×Fixed 8OFF×Fixed SWITCH NAMESWITCH NO. SETTINGSTANDARD SETTINGMEANING
CHAPTER 4 NDA-24282 Pag e 7 8 Revision 1.0 PA-CP54 (CPU) SWITCH SETTING SHEET MODULE SLOT NO. SWITCH NAME SWITCH SHAPE REMARKS APM 09 16MBR UP: Circuit card make busy. DOWN:Circuit card make idle. RESET SENSE SW0 7 ON = Dual ACDP 7 OFF = Single ACDP SW1 7 ON = IMX Systems 8 ON = PA-ME34 Mounted 8 OFF = PA-ME34 Not Mounted SW2 Standard SW3 Standard SW4 FixedON ON 12345678 ON 12345678 ON 12345678 ON 1234 ON 12345678
NDA-24282 CHAPTER 4 Page 79 Revision 1.0 PA-ME34 (CRAM) PA-ME34 (CRAM) 1. Function This circuit card is a RAM card for the ACD System and has memory capacity of 1.5 Mbytes. 2. Mounting Location/Condition The mounting locations of this circuit card and the conditions related to mounting are shown below. CPUCPU COPYCOPY CRAMCRAM IOC APM-A\E ALMC RS-232C (Non-protocol) Position within the system (ACDP) (ACDP) 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Mounting Module APM-A\E PA-ME34PA-ME34PA-ME34 For No. 1 systemFor No. 0 system Note Note: When ACDP is single system configuration, this circuit card is mounted in Slot No. 08.
CHAPTER 4 NDA-24282 Pag e 8 0 Revision 1.0 PA-ME34 (CRAM) 3. Face Layout of Lamps, Switches, and Connectors The face layout of lamps, switches, and connectors of this circuit card is shown below. 4. Lamp Indications The contents of lamp indications of this circuit card are shown in the table below. LAMP NAME COLOR STATE OPE Green Lights when the CPU has accessed to the RAM in this card. DMWE Red Lights when the data memory area of this card is in write enable state. DMWD RedLights when the data memory area of this card is in write inhibited state as set by the DMWDK switch. OPE SW0DMWE DMWD DMWDK PZ-ME17 SW1
NDA-24282 CHAPTER 4 Page 81 Revision 1.0 PA-ME34 (CRAM) 5. Switch Settings Standard settings of various switches on this circuit card are shown in the table below. SWITCH NAMESWITCH NO. SETTINGSTANDARD SETTINGMEANING DMWDK UP Data memory area write inhibited DOWN Data memory area write enable SW01OFF× 2OFF× 3ON× 4ON× 5OFF× 6ON× 7OFF×Fixed 8OFF×Fixed SW11 2 Fixed Sets the RAM area to $800000 ~ 8FFFFFH, $C00000 ~ C7FFFFH SW1-1 SW1-2 ON ON Write Protect is provided. OFF OFF Write Protect is not provided (Fixed).