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NEC Neax 2400 Ipx Installation Manual

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    							NDA-24306 CHAPTER 5
    Page 313
    Revision 1.0
    INSTALLATION TEST PROCEDURE
    Figure 025-4  LEDs and Switches for PLO Changeover
    NAP-200-025
    Sheet 8/13
    System Changeover Test
    AT T E N T I O NContents
    Static Sensitive
    Handling
    Precautions Required
    Legend
    Lamp is ON:Lamp is OFF:
     PLO: ST-BY
    MB
    OPE
     PLO: Active
    MB
    OPE
    green
    PH-CK16-A
     PLO: ST-BY
    MB
    OPE
     PLO: Active
    MB
    OPE
    green
    PH-CK16-A / PH-CK17-A
     CLK: ST-BY
    MB
    OPE
     CLK: Active
    MB
    OPE
    green
    PH-CK18
    [ISW]
    [Local Nodes] 
    						
    							CHAPTER 5 NDA-24306
    Page 314
    Revision 1.0
    INSTALLATION TEST PROCEDURE
    Figure 025-5  General Block Diagram of the Whole System (1/2)
    NAP-200-025
    Sheet 9/13
    System Changeover Test
    HSW
    TSWM0TSWM1
    TSWM0TSWM1
    This figure roughly shows the general block diagram of the whole system.
    MISCIOCEMA
    MISCIOCEMA
    TSW00TSW01TSW02TSW03
    TSW00TSW01TSW02TSW03
    FCCS Link
    ISWLN0LN1
    To PLO of
      LN2/3
    GT
    ISAGT-A
    DLKCPLO
    To MUX
    (IMG0)To MUX
    (IMG1)
    To MUX
    (IMG0)To MUX
    (IMG1)To MUX
    (IMG2)To MUX
    (IMG3)
    To MUX
    (IMG2)To MUX
    (IMG3)
    Note 1
    Note 3
    Note 4
    Circuit Card 
    (No. 0 System) 
    Circuit Card 
    (No. 1 System)
    Note 1HSW00, 01 for No. 0 System / 
    HSW10, 11 for No. 1 System
    Note 2ISW-LN TSW CA-n Cables
    Note 3ISW-LN PLO CA-n Cables
    Note 4PLO-CLK CA-n Cables
    :
    :
    TSW02TSW03
    Note 2
    To TSW
    of LN2To TSW
    of LN3
    TSW00TSW01
    LANI
    CPU
    ISAGT
    IOGT
    PLO
    DLKC
    GT
    PLOCLK
    GT
    TSW00TSW01TSW02TSW03
    ISAGT- BISAGT-A
    CPULANI
    TSW00TSW01TSW02
    CLK
    TSW03
    GT
    ISAGT-B
    MISCIOCEMA
    CPULANI
    Note 4
    < ISW (Inter-node Switch) >
    ISAGT:  PZ-GT13  LANI:  PZ-PC19   IOGT:  PH-GT10 ISW:  PU-SW00
    HSW:  PU-SW01  PLO:  PH-CK16/17-A EMA:  PH-PC40 IOC:  PH-IO24
    < LN (Local Node) >
    ISAGT-A:  PZ-GT13 ISAGT-B:  PZ-GT20 LANI:  PZ-PC19 GT:  PH-GT09 TSW:  PH-SW12 MUX:  PH-PC36 
    DLKC:  PH-PC20   PLO:  PH-CK16-A CLK:  PH-CK18 EMA:  PH-PC40 IOC:  PH-IO24 
    						
    							NDA-24306 CHAPTER 5
    Page 315
    Revision 1.0
    INSTALLATION TEST PROCEDURE
    Figure 025-5  General Block Diagram of the Whole System (2/2)
    NAP-200-025
    Sheet 10/13
    System Changeover Test
    HSW
    TSWM0TSWM1
    TSWM0TSWM1
    MI S CIOCEMA
    MISCIOCEMA
    MISCIOCEMA
    IOGT
    ISAGT
    FCCS LinkISWLN0
    LN1
    To PLO of
      LN1
    To MUX(IMG0)To MUX(IMG1)
    To MUX
    (IMG0)To MUX
    (IMG1)To MUX
    (IMG2)To MUX
    (IMG3)
    To MUX
    (IMG2)To MUX
    (IMG3)
    Note 1
    Note 3
    Note 4
    Note 4
    Circuit Card 
    (No. 0 System) 
    Circuit Card 
    (No. 1 System)
    Note 1HSW00, 01 for No. 0 System / 
    HSW10, 11 for No. 1 System
    Note 2ISW-LN TSW CA-n Cables
    Note 3ISW-LN PLO CA-n Cables
    Note 4PLO-CLK CA-n Cables:
    :
    Note 2To TSW
    of LN2
    To TSW
    of LN3
    This figure roughly shows the general block diagram of the whole system.
    TSW00TSW01TSW02TSW03
    PLODLKC
    GT
    ISAGT-A
    CPULANI
    TSW00TSW01TSW02TSW03
    DLKC
    GT
    PLOCLK
    GT
    ISAGT-BISAGT- A
    CPULANI
    TSW02TSW03TSW00TSW01
    TSW02TSW03TSW00TSW01
    PLO
    CPU
    LANI
    TSW00TSW01TSW02TSW03
    GT
    CLK
    ISAGT-B
    < ISW (Inter-node Switch) >
    ISAGT:  PZ-GT13  LANI:  PZ-PC19   IOGT:  PH-GT10 ISW:  PU-SW00
    HSW:  PU-SW01  PLO:  PH-CK16/17-A EMA:  PH-PC40 IOC:  PH-IO24
    < LN (Local Node) >
    ISAGT-A:  PZ-GT13 ISAGT-B:  PZ-GT20 LANI:  PZ-PC19 GT:  PH-GT09 TSW:  PH-SW12 MUX:  PH-PC36 
    DLKC:  PH-PC20   PLO:  PH-CK16-A CLK:  PH-CK18 EMA:  PH-PC40 IOC:  PH-IO24 
    						
    							CHAPTER 5 NDA-24306
    Page 316
    Revision 1.0
    INSTALLATION TEST PROCEDURE
    Figure 025-6  System Block Diagram for ISW Switching Network
    NAP-200-025
    Sheet 11/13
    System Changeover Test
    This figure shows a system block diagram of ISW, which adopts a dual configuration. As seen in the figure, ISW
    has the following terminals for the ACT/ST-BY changeover of dual system equipment:
    CPU:If the ACT/ST-BY of CPU (ISW) is once changed over, the whole controlling block (including CPU, IS-
    AGT, LANI in ISW) are also changed over.
    IOGT:If the ACT/ST-BY of IOGT (ISW) is once changed over, the whole switching block within the system
    (IOGT, TSW, HSW in ISW and TSW, MUX, DLKC in all LNs) are also changed over.
    However, PLO (in both ISW and each LN) is not affected.
    PLO:If the ACT/ST-BY of PLO in ISW is once changed over, only the PLOs in ISW are solely changed over.
    Note:Even though the ACT/ST-BY of PLO in ISW is once changed over, the PLO/CLK in each LN are not
    changed over. This is because the PLOs in ISW and each LN (TSWM0) have multiple connections, re-
    spectively, via the backboard bus. For more details, refer to the “Circuit Card Manual.”
    HSW 01
    HSW 00
    TSW 03
    TSW 02
    TSW 01
    PLO 1
    PLO 0
    IOGT 0IOGT 1
    CPR 1
    CPR 0
    ISAGT
    ISAGT: PZ-GT13 LANI : PZ-PC19 IOGT: PH-GT10 TSW : PU-SW00
    HSW : PU-SW01 PLO : PH-CK16/17-A EMA : PH-PC40 IOC : PH-IO24CPU 0
    LANI
    MISC BUSLANI
    IOC/
    MISCEMACPU 1ISAGT TSW 00To TSW of LN3 External Cables
    (ISW-LN TSW CA-n)External Cables(ISW-LN TSW CA-n)
    External Cables
    (ISW-LN PLO CA-n)To  P L O 1  ( T S W M 0 )
    of each LN
    To PLO0 (TSWM0)
    of each LN TSW I/O BUS
    TSW I/O BUS
    NoteTo TSW of LN2
    To TSW of LN1
    To TSW of LN0 To TSW of LN3
    To TSW of LN2
    To TSW of LN1
    To TSW of LN0HSW 11
    HSW 10
    TSW 13
    TSW 12
    TSW11
    TSW 10
    FCCS Link
    LANILANI 
    						
    							NDA-24306 CHAPTER 5
    Page 317
    Revision 1.0
    INSTALLATION TEST PROCEDURE
    Figure 025-7  System Block Diagram for LN Switching Network (1/2)
    NAP-200-025
    Sheet 12/13
    System Changeover Test
    This figure shows a system block diagram of LN, which adopts a dual configuration. As seen in the figure, each
    LN has following terminals for the ACT/ST-BY changeover of dual system equipment:
    CPU:If the ACT/ST-BY of CPU is once changed over, the whole controlling block in the same node (in-
    cluding CPU, ISAGT, LANI) and GT in both TSWM0 and TSWM1 are also changed over.
    GT (TSWM0):  If the MBR key is flipped on the active GT (PH-GT09) card in TSWM0, the whole switching block
    in IPX-U [IMG0/1 (TSW, MUX, DLKC) and IMG2/3 (TSW, MUX)] is totally changed over. How-
    ever, PLO (in TSWM0) and CLK (in TSWM1) are not affected.
    PLO (TSWM0):If the MB key is flipped on the active PLO (PH-CK16-A) card (in TSWM0), the ACT/ST-BY of
    both PLOs in TSWM0 and CLKs in TSWM1 are totally changed over.
    Note:See “Note” on the previous page.
    MUX:  PH-PC36
    LANI
    TSW 01
    DLKC 0DLKC 1
    CPR 0
    CPR 1
    MISC BUS
    TSW I/O BUS
    Note
    TSW I/O BUS
    Line/Trunk PMIMG 0PM BUS
    PCM HW
    PCM HW
    PCM HW
    PCM HW
    To  T S W M 1
    Line/Trunk PMIMG 1PCM HW
    PCM HW PM BUS
    PCM HW PCM HW
    TSWM0
    To  T S W M 1
    Fr o m PL O
    of ISWMTo CLK of
    TSWM1
    TSW 02TSW 03
    TSW 12TSW 13
    External Cables
    (ISW-LN TSW CA-n)
    External Cables
    (ISW-LN PLO CA-n)External Cables
    (PLO-CLK CA-n)
    To/From TSW of ISWMLN0/1/2/3
    FCCS Link
    CPU 0CPU 1
    MUXMUXMUXMUX
    TSW 10TSW 00TSW 11
    MUXMUXMUXMUX
    PLO 1
    PLO 0
    GT 1GT 0
    ISAGT-AISAGT-B
    LANILANILANI
    ISAGT-BISAGT- A
    EMAIOC/
    MISC
    ISAGT-A:  PZ-GT13TSW:  PH-SW12 GT:  PH-GT09 LANI:  PZ-PC19 ISAGT-B: PZ-GT20
    IOC:  PH-IO24 EMA:  PH-PC40 PLO:  PH-CK16-A DLKC:  PH-PC20 
    						
    							CHAPTER 5 NDA-24306
    Page 318
    Revision 1.0
    INSTALLATION TEST PROCEDURE
    Figure 025-7  System Block Diagram for LN Switching Network (2/2)
    NAP-200-025
    Sheet 13/13
    System Changeover Test
    ISAGT-A:  PZ-GT13
    MUX:  PH-PC36
    LANI
    GT 0
    TSW 00TSW 10TSW 01TSW 11
    GT 1
    EMA
    CLK 0
    CLK 1
    CPR 0LANICPR 1
    MISC BUS
    TSW I/O BUS
    TSW I/O BUS
    Line/Trunk PMIMG 2PCM HW
    PCM HW
    PCM HW
    PCM HW PM BUS PCM HW
    PCM HW
    PCM HW
    PCM HW PM BUS
    ISAGT-BISAGT-B
    To  T S W M 0
    Line/Trunk PMIMG 3
    TSWM1
    To  T S W M 0
    Fr o m  P L O
    of ISWM
    CPU 0
    ISAGT-AISAGT-A
    CPU 1
    TSW 02TSW 03
    TSW 12TSW 13
    External Cables
    (ISW-LN TSW CA-n)
    To  / F r o m  T S W  o f  I S W M
    External Cable
    (PLO-CLK CA-n)LN0/1/2/3
    FCCS Link
    MUXMUXMUXMUXMUXMUXMUXMUX
    LANI
    IOC/
    MISC
    LANI
    TSW:  PH-SW12 GT:  PH-GT09 LANI:  PZ-PC19 ISAGT-B: PZ-GT20
    IOC:  PH-IO24 EMA:  PH-PC40 CLK:  PH-CK18 
    						
    							NDA-24306 CHAPTER 5
    Page 319
    Revision 1.0
    Test Outline
    Tests are to be performed to see if the system initialization can be executed on the following basis:
    1. System Initialization on a Local Node basis (in each Local Node individually)
    2. System Initialization in ISW only
    3. System Initialization on a system basis (in ISW and all Local Nodes simultaneously)
    NAP-200-026
    Sheet 1/5
    System Initialization Test
    AT T E N T I O NContents
    Static Sensitive
    Handling
    Precautions Required 
    						
    							CHAPTER 5 NDA-24306
    Page 320
    Revision 1.0
    1. System Initialization on a Local Node basis
    Perform the system initialization test in each Local Node (LN), using the keys on the TOPU (refer to Figure 026-
    1):
    Figure 026-1  Keys on the TOPU (Local Node)
    NAP-200-026
    Sheet 2/5
    System Initialization Test
    START
    On the TOPU of the LN to be tested, set the EFFECT key to “ON” side.
    On the TOPU, set the SYSTEM DATA key to “NON LOAD” side, and PROGRAM key to “NON LOAD” 
    side.
    Perform the system initialization by pressing the START button.
    Confirm When the system is initialized, the CPU OPE lamp on the DSP 
    of active CPR lights steady-green.
    When the system is initialized, system message “7-B” is 
    displayed automatically.
    Assign data and time via MAT command “ATIMN/ATIM”.
    Repeat the steps above for all the remaining LNs.
    END
    AT T E N T I O NContents
    Static Sensitive
    Handling
    Precautions Required
    *
    ALM
    ON
    OFF PFT
    START INITIAL
    ON
    OFF EFFECT
    LOAD
    NON LOAD PROGRAMNON LOAD SYSTEM DATA
    LOAD
    
    RST 
    						
    							NDA-24306 CHAPTER 5
    Page 321
    Revision 1.0
    2. System Initialization in ISW
    Perform the system initialization test in ISW, by using the keys on the TOPU (refer to Figure 026-2):
    Figure 026-2  Keys on the TOPU (ISW)
    NAP-200-026
    Sheet 3/5
    System Initialization Test
    START
    On the TOPU of ISW, set the INITIAL SELECT key to “SELF” side.
    On the TOPU of ISW, set the EFFECT key to “ON” side.
    On the TOPU of ISW, set the SYSTEM DATA key to “NON LOAD” side and PROGRAM key to “NON 
    LOAD” side.
    Perform the system initialization by pressing the START button.
    Confirm When the system is initialized, the CPU OPE lamp on the DSP 
    of active CPR lights steady-green.
    When the system is initialized, system message “7-B” is 
    displayed automatically.
    Assign data and time via MAT command “ATIMN/ATIM”.
    END
    ATTENTIONContents
    Static Sensitive
    Handling
    Precautions Required
    *
    ALM
    ON
    OFF PFT
    START INITIAL
    ON
    OFF EFFECT
    LOAD
    NON LOAD PROGRAMNON LOAD SYSTEM DATA
    LOAD
    
    RST
    SYSTEM
    SELF SELECT
    SYSTEM 
    						
    							CHAPTER 5 NDA-24306
    Page 322
    Revision 1.0
    3. System Initialization on a system basis
    Perform the system initialization tests in ISW and all Local Nodes simultaneously, per the flowchart cited be-
    low. As in the flowchart, there are two kinds of method here; test via the keys on the TOPU of ISW, and test by
    turning the power ON and OFF.
    NAP-200-026
    Sheet 4/5
    System Initialization Test
    START
    Perform the total system initialization via the keys on the TOPU (ISW)
    Note:For key allocations, refer to Figure 026-2 on the previous page.
    On the TOPU of ISW, set the INITIAL SELECT key to “SYSTEM” side.
    On the TOPU of ISW, set the EFFECT key to “ON” side.
    On the TOPU of ISW, set the SYSTEM DATA key to “NON LOAD” side and 
    PROGRAM key to “NON LOAD” side.
    Perform the system initialization by pressing the START button.
    Confirm When the system is initialized, the CPU OPE lamps on the DSP 
    of active CPR in all LNs and ISW light steady-green.
    When the system is initialized, system message “7-B” is 
    displayed automatically.
    ATTENTIONContents
    Static Sensitive
    Handling
    Precautions Required
    A
    * 
    						
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