Fujitsu Series 3 Manual

 
3. Operations of Multifunction Timer 
 
Table 3-4 Example of Operation 1 – Register Settings 4 
Setting Timing  Name of 
Target Block  Name of 
Register Operation 
Bit Field Value Description of Setting 
EG0[1:0] DC ch.0 operation state: 
EG1[1:0]  DC ch.1 operation state: 
ICE0 DC  ch.0 interrupt: 
ICE1 DC ch.1 interrupt: 
ICP0 1 ch.0 edge detection: Edge detected 
ICSA10 BR 
ICP1 0 ch.1 edge detect ion: Edge not detected 
ICCP0 HW  ICCP0 0x57FECapture ch.0 capture value 
EG0[1:0]  NM ch.0 operation...

 
3. Operations of Multifunction Timer 
 
3.2.  Example of Operation of Multifunction Timer - 2 
Example of Operation of Multifunction Timer - 2 explains the cases where each function 
block is operated in the following modes: FRT  :  Up/Down-count mode, with interrupt 
OCU  :  Up/Down-count mode (Active High), without interrupt 
WFG  :  RT-dead timer mode (Active High) 
  ADCMP/ATSA :  Instruct ADCunit0 to start scan conversion under the match condition for 
Up-counting 
 Time Chart 
 
Figure 3-2 Time...

 
3. Operations of Multifunction Timer 
 
 Operation of FRT, OCU 
Timing 1 
  Set Up-count operation to FRT-ch.0 (TCSA0 register write). 
   Set an operating cycle to FRT-ch.0  (TCCP0 register write). In this example, 0x5FFF is set. When the 
FRT pre-scaler is set to 1/4 and PCLK to  40MHz, the count cycle of FRT is 4.915 s. 
   Connect and set FRT-ch.0 to OCU-ch.1 (OCFS10 register write). 
   Set OCU-ch.1 to Up/Down-count m ode (Active High) operation. Also specify the initial output level 
of the...

 
3. Operations of Multifunction Timer 
 
 Operation of ADCMP/ATSA 
Timing 1 
  Set ADCMP-ch.0 to instruct ADC-unit0 to start  AD conversion with the match condition for FRT’s 
Up-count operation (ACSA and ACSB register write). 
   Initialize ATSA to select ADC-unit0’s conversion st art signal from ADCMP as the scan conversion 
start signal (ATSA register write). 
   Set the timing of starting AD conversion (ACCP0 regi ster write). In this example, 0x2800 is set. 
Timing 3    Instruct ADCMP-ch.0 to...

 
3. Operations of Multifunction Timer 
 
Table 3-5 Example of Operation 2 - Register Settings 1 
Setting Timing  Name of 
Target Block  Name of 
Register Operation 
Bit Field Value Description of Setting 
CLK[3:0]0010 Clock division pre-scaler setting: 1/4 
SCLR  0 Soft clear: Do nothing 
MODE  1 Count mode setting: Up/Down-count mode 
STOP  1 FRT count operation: Stop counting 
BFE  1 TCCP buffer function: Enable 
ICRE  0 Peak value detection interrupt: Disable 
ICLR  0 Peak value detection: Clear...

 
3. Operations of Multifunction Timer 
 
Table 3-6 Example of Operation 2 - Register Settings 2 
Setting Timing  Name of 
Target Block  Name of 
Register Operation 
Bit Field Value Description of Setting 
DCK[2:0]001 Clock division pre-scaler setting: 1/2 
TMD[2:0] 100 Operation mode: Select RT-dead timer mode 
GTEN[1:0] 00 Gate signal generation: don’t care 
PSEL[1:0] 00 Connecting PPG: don’t care 
PGEN[1:0] 00 PPG reflection: don’t care 
DMOD  0 Output polarity: Active High 
WFSA10 HW 
Reserved 000  -...

 
3. Operations of Multifunction Timer 
 
Table 3-7 Example of Operation 2 – Register Settings 3 
Setting Timing  Name of 
Target Block  Name of 
Register Operation 
Bit Field Value Description of Setting 
CLK[3:0]NM Clock division pre-scaler setting: 
SCLR NM  Soft clear: 
MODE NM Count mode setting: 
STOP  0 FRT count operation: Start counting 
BFE  NM TCCP buffer function: 
ICRE  NM Peak value detection interrupt: 
ICLR  1(RMW)Peak value detection: Do nothing 
Reserved NM  - 
IRQZE NM Zero value...

 
3. Operations of Multifunction Timer 
 
Table 3-8 Example of Operation 2 – Register Settings 4 
Setting Timing  Name of 
Target Block  Name of 
Register Operation 
Bit Field Value Description of Setting 
CLK[3:0]DC Clock division pre-scaler setting: 
SCLR DC  Soft clear: 
MODE DC Count mode setting: 
STOP  DC FRT count operation: 
BFE  DC TCCP buffer function: 
ICRE  DC Peak value detection interrupt: 
ICLR  DC Peak value detection: 
Reserved DC  - 
IRQZE DC Zero value detection interrupt: 
IRQZF  1...

 
3. Operations of Multifunction Timer 
 
Table 3-9 Example of Operation 2 – Register Settings 5 
Setting Timing  Name of 
Target Block  Name of 
Register Operation 
Bit Field Value Description of Setting 
CST0 NM ch.0 operation state: 
CST1  0 ch.1 operation state: Disable 
BDIS0  NM ch.0 OCCP buffer function:   
BDIS1  NM ch.1 OCCP buffer function:   
IOE0 NM  ch.0 interrupt: 
IOE1 NM ch.1 interrupt: 
IOP0 1 ch.0 match detection: Do nothing 
OCSA10 BW 
IOP1  1 ch.1 match detection: Do nothing 
OTD0  NM...

 
4. Registers of Multifunction Timer 
 
4.  Registers of Multifunction Timer 
This chapter describes the registers of the multifunction timer. 
 
4.1 Individual Notation and Common Notation of Channel Numbers in Descriptions of Functions  
4.2  List of Registers of Multifunction Timer  
4.3  Details of Register Functions  
4.4  Details of OCU Output Waveform  
4.5  Details of WFG Output Waveform 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  15: Multifunction  Timer 
MN706-00002-1v0-E 
524 
MB9Axxx/MB9Bxxx...