Fujitsu Series 3 Manual

 
4. Registers of Multifunction Timer 
 
[bit3:2] Reserved 
Process Function 
Write 0 must be written at write access. 
Read 0 is read. 
 
[bit4] WFIR.TMIF10 
Process Value  Function 
  Write - Writing is ignored. 
0  Indicates that WFG10 timer interrupt has not been generated. Read 
1 Indicates that WFG10 timer interrupt has been generated. 
 
[bit5] WFIR.TMIC10 
Process Value  Function 
0 Does nothing. Write 
1 Clears WFIR.TMIF10 and deasserts  the WFG10 timer interrupt signal. 
Read - 0 is always...

 
4. Registers of Multifunction Timer 
 
Figure 4-8 shows a diagram of the operation when the WFG timer is used as a reload timer. 
Figure 4-8 Diagram of Operation when WFG Timer is Used as Reload Timer 
 
CPU operation
WFG timer count
  0N
WFG timer interrupt1
Start
2
Clear
N-1N-2・・・
WFTM reg.
N
N12N-1N-2NN-1
Stop
・・・  0
Load initial 
count value・・・
  
 
Below is the procedure for using the WFG timer as a reload timer. 
  First, set the initial value of the timer to the WFTM  register and the clock...

 
4. Registers of Multifunction Timer 
 
[bit8] WFIR.TMIF32 
Process Value Function 
Write - Writing is ignored. 
0  Indicates that WFG32 timer interrupt has not been generated. Read 
1 Indicates that WFG32 timer interrupt has been generated. 
 
[bit9] WFIR.TMIC32 
Process Value  Function 
0 Does nothing. Write  
1 Clears WFIR.TMIF32 and deasserts the  interrupt signal of the WFG32 timer.
Read - 0 is always read. 
 
[bit10] WFIR.TMIE32 
Process Value  Function 
0 Does nothing. Write 
1 Starts the WFG32...

 
4. Registers of Multifunction Timer 
 
[bit12] WFIR.TMIF54 
Process Value Function 
Write - Writing is ignored. 
0  Indicates that the WFG54 timer interrupt has not been generated. Read 
1 Indicates that the WFG54 timer interrupt has been generated. 
 
[bit13] WFIR.TMIC54 
Process Value  Function 
0 Does nothing. Write 
1 Clears WFIR.TMIF54 and deasserts the  interrupt signal of the WFG54 timer.
Read - 0 is always read. 
 
[bit14] WFIR.TMIE54 
Process Value  Function 
0 Does nothing. Write 
1 Starts...

 
4. Registers of Multifunction Timer 
 
4.3.14.  ICU Connecting FRT Select Register (ICFS) 
ICFS is an 8-bit register that selects and sets FRT to be connected to ICU. 
Each mounted channel has two registers: ICFS10 and ICFS32. 
ICFS10 controls ICU ch1 and ICU ch0. 
ICFS32 controls ICU ch3 and ICU ch2. 
ICFS10 is located at an even-numbered address, while ICFS32 is located at an 
odd-numbered address; therefore, their bit positions are [7:0] and [15:8]. 
 Configuration of Register 
Bit  15/7 14/6 13/5...

 
4. Registers of Multifunction Timer 
 
4.3.15.  ICU Control Register A (ICSA) 
ICSA is an 8-bit register that controls ICU’s operation. 
Each mounted channel has two registers: ICSA10 and ICSA32. 
ICSA10 controls ICU ch1 and ICU ch0. 
ICSA32 controls ICU ch3 and ICU ch2. 
 Configuration of Register 
 
Bit 7 6 5 4 3 2 1 0 
Field ICP1 ICP0 ICE1 ICE0 EG1[1:0] EG0[1:0] 
Attribute  R/W R/W R/W  R/W R/W  R/W 
Initial Value 0 0 0  0 0 0 0 0 
 
  Functions of Register 
[bit1:0] ICSA.EG0[1:0] 
Process Value...

 
4. Registers of Multifunction Timer 
 
If a valid edge is detected at the input signal when ICU’s operation is enabled, it performs the capture 
operation that captures FRT’s count output to the ICCP register. At the same time, it notifies CPU that the 
valid edge has been detected. The valid edge of the input signal can be selected from the rising edge only, 
the falling edge only, or both rising and falling edges. 
When the operation is disabled, it does nothing and ignores the input signal. 
Figure...

 
4. Registers of Multifunction Timer 
 
[bit5] ICSA.ICE1 
Process Value Function 
0 Does not generate interrupt, when 1 is set to ICSA.ICP1. Write 
1 Generates interrupt, when 1 is set to ICSA.ICP1. 
Read - Reads the register setting 
 
ICSA.ICE0 is a register that specifies whether to notify  CPU of the event that 1 is set to ICSA.ICP0 as an 
interrupt (enabling interrupt) or not to notify it (disabling interrupt). 
ICSA.ICE1 is a register that specifies whether to notify  CPU of the event that 1 is...

 
4. Registers of Multifunction Timer 
 
4.3.16.  ICU Control Register B (ICSB) 
ICSB is an 8-bit register that reads the operation state of ICU. 
Each mounted channel has two registers: ICSB10 and ICSB32. 
ICSB10 reads the operation state of ICU ch1 and ICU ch0. 
ICSB32 reads the operation state of ICU ch3 and ICU ch2. 
 Configuration of Register 
Bit  15 14 13  12 11 10  9 8 
Field  Reserved Reserved Reserved ReservedReservedReserved  IEI1 IE10 
Attribute  - - -  - - - R R 
Initial Value  - - -  - - -...

 
4. Registers of Multifunction Timer 
 
4.3.17.  ICU Capture value store register (ICCP) 
ICCP is a 16-bit register that reads the value captured to ICU. 
Each mounted channel has four registers: ICCP0, ICCP1, ICCP2 and ICCP3. 
ICCP0 stores the capture value of ICU ch0. 
ICCP1 stores the capture value of ICU ch1. 
ICCP2 stores the capture value of ICU ch2. 
ICCP3 stores the capture value of ICU ch3. 
It should be noted that this register does not allow for byte access. 
 Configuration of Register...