Fujitsu Series 3 Manual

 
1. Overview of Base Timer 
 
Chapter: Base Timer 
This chapter explains the functions and operations of the base timer. 
 1.
 Overview of Base Timer 
2. Block Diagram Of Base Timer 
3. Operations of the Base Timer 
4. 32-bit mode operations 
5. Base Timer Interrupt 
6. Starting the DMA Controller (DMAC) 
7. Base Timer Registers 
8. Notes on using the base timer 
9. Descriptions of base timer functions  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
CODE: FM10-E03.1 
FUJITSU SEMICONDUCTOR LIMITED...

 
1. Overview of Base Timer 
 
1.  Overview of Base Timer 
The function of the base timer can be set to either the 16-bit PWM timer, 16-bit PPG timer, 
16/32-bit reload timer, or 16/32-bit PWC timer using the FMD2, 1, and 0 bits in the Timer 
Control Register. The following provides an overview of each selectable timer function. 
 Relationship between mode se ttings and timer functions 
 
Settings of FMD2, FMD1,   
and FMD0 bits  Function 
0b000 Reset 
mode 
0b001 16-bit PWM timer 
0b010 16-bit PPG...

 
1. Overview of Base Timer 
 
 16/32-bit reload timer 
This timer consists of a 16-bit down counter, a 16-bit reload register, and a pin controller. 
The count clock of the 16-bit down counter can be selected from eight internal clocks (1, 4, 16, 128, 256, 
512, 1024, and 2048 frequency divisions of the machin e clock) and three external events (detection of a 
rising edge, a falling edge, or both). 
The one-shot mode where the counting stops at an und erflow or the continuous mode where the counting...

 
2. Block Diagram Of Base Timer 
 
2.  Block Diagram Of Base Timer 
Figure 2-1 to Figure 2-4 show block diagrams of the base timer in each mode. 
Figure 2-1 Block diagram of 16-bit PWM timer 
 
 
16-bit down counter 
Underflow
Count 
clock
/ 16  
16 
/ 
Load
OSEL
TOUT
Inversion 
control
Match 
detection
STRG
External startup trigger 
(TGIN signal)
EGS
CTEN
TGIE
DTIE
UDIE
Trigger 
Timer enable
/  
2 
PMSK
POE
Buffer
Edge 
detection
Count 
enable
Interrupt  cause 
generation
Toggle 
generation
MDSE
PDUT...

 
2. Block Diagram Of Base Timer 
 
Figure 2-3 Block diagram of 16/32-bit reload timer (ch1 and ch0) 
 
T32
/ 16
CH1
CH0
Output 
waveform 
(TOUT signal)OSEL
Inversion  control
32-bit mode T32=1
16-bit mode T32=0
POE
Trigger interrupt 
request
TGIE
UDIE
PCSR
Down counter TMR
Underflow
Count clock Load
Count 
enable
20
:
211
/ 4
CKS
External clock 
(ECK signal)
EGS
/
2
Clock 
frequency  circuitInternal clock
STRGExternal startup 
trigger 
(TGIN signal)
Timer enable Trigger
Edge 
detection
Count 
enable
/...

 
2. Block Diagram Of Base Timer 
 
Figure 2-4 Block diagram of 16/32-bit PWC timer (ch1 and ch0) 
 
CH0
/ 16
CH1
Clear
/ 
16
16-bit mode
T32=0
32-bit mode
T32=1
20
:
211
/ 4
CKS
Clock 
frequency  circuitInternal clock
STRGSignal to be measured 
(TIN signal)
Detection of a  startEdge 
detection
Count 
enable
Edge 
detectionCTEN
CTENMeasurement  completion 
interrupt request
EDIE
OVIEOverflow interrupt  request
Interrupt 
cause 
generation
MDSE
Up counter
TMR
Overflow
Count 
clock
Count 
enable
T32
Clear...

 
3. Operations of the Base Timer 
 
3.  Operations of the Base Timer 
This section explains operations of the base timer. 
 Operations of the base timer 
  Reset mode 
The reset mode is a status where the base timer macros  are reset (with each register set to the initial value). 
Be sure to set this mode before switching to a differ ent timer function or T32 bit setting. However, it is not 
necessary to set this mode before setting the timer function or T32 bit immediately after the macros are...

 
3. Operations of the Base Timer 
 
 16-bit PWC timer 
The PWC timer starts the 16-bit up counter with input  of the specified measurement start edge and stops the 
counter with detection of a measurement end edge. The value counted in between is stored as a pulse width 
in the data buffer register. 
  32-bit PWC timer 
This timer has the same basic operations as the 16-bit PWC timer. However, it uses two channels, even and 
odd, to operate as a 32-bit PWC timer. The even channel operates as a lower...

 
4. 32-bit mode operations 
 
4.  32-bit mode operations 
Using two channels, the reload timer and PWC provide 32-bit mode operations. This section 
explains the basic functions and operations of the 32-bit mode functions. 
 32-bit mode functions 
This function enables the operations of a 32-bit data reload timer or 32-bit data PWC timer by combining 
two channels of base timers. Since  the upper 16-bit timer counter value in the odd channel is read together 
with the lower 16-bit timer counter value...

 
4. 32-bit mode operations 
 
 32-bit mode operations 
After transition to 32-bit mode, if th e reload or PWC timer is started by control of the even channel, the 
timer/counter in the even channel operates with the lower 16 bits. Also, the time/counter in the odd channel 
operates with the upper 16 bits. 
The operations in 32-bit mode are defined by the settings for the even channel. For this reason, the settings 
for the odd channel (except the Cycle Set Register for  the reload timer) are ignored....