Fujitsu Series 3 Manual

 
9. Descriptions of base timer functions 
 
9.1.9. Timer  Register  (TMR) 
The Timer Register (TMR) reads the value of the 16-bit down counter. 
 bit 15       0 
Field TMR [15:0] 
Attribute R 
Initial value  0x0000 
 
The value of the 16-bit down counter is read. 
   Access the TMR register with 16-bit data. 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  14-2: Base Timer 
MN706-00002-1v0-E 
445 
MB9Axxx/MB9Bxxx  Series  

 
9. Descriptions of base timer functions 
 
9.2.  PPG timer function 
The function of the base timer can be set to either the 16-bit PWM timer, 16-bit PPG timer, 
16/32-bit reload timer, or 16/32-bit PWC timer using the FMD2, 1, and 0 bits in the Timer 
Control Register. This section explains the timer functions available when PPG is set. 
1. 16-bit PPG timer operations 
2.  Continuous operation 
3.  One-shot operation 
4.  Interrupt causes and timing chart 
5.  PPG timer operation flowchart 
6.  Timer...

 
9. Descriptions of base timer functions 
 
9.2.1. 16-bit PPG timer operations 
In PPG timer operations, any output pulse can be controlled by setting the LOW and HIGH 
widths of the pulse in respective reload registers. 
 Overview of operations 
Two 16-bit long reload registers for setting the LOW and HIGH widths, respectively, and one buffer for 
setting the HIGH width are used (PRLL, PRLH, and PRLHB). 
A start trigger initially causes the PRLL set value to be  loaded to the 16-bit down counter and,...

 
9. Descriptions of base timer functions 
 
9.2.2. Continuous  operation 
In continuous operations, any pulse can be output continuously by updating the LOW and 
HIGH widths at the set timing of each interrupt cause. When a restart is enabled, the counter 
is reloaded when an edge is detected during operation. 
 Continuous operation 
  When a restart is disabled (RTGEN = 0) 
Figure 9-8 PPG operation timing chart (when a restart is disabled) 
 
Rising edge detection
The trigger is ignored.
Trigger
m
n...

 
9. Descriptions of base timer functions 
 
9.2.3. One-shot  operation 
In one-shot operation, a single pulse of any width can be output using a trigger. When a 
restart is enabled, the counter is reloaded when an edge is detected during operation. 
 One-shot operation 
  When a restart is disabled (RTGEN = 0) 
Figure 9-10 One-shot operation timing chart (trigger restart is disabled) 
 
Rising edge detection
The trigger is ignored.
Trigger
m
n
o
(1) (2)
 
PPG output 
waveform
(1) = T(m+1)ms
(2) =...

 
9. Descriptions of base timer functions 
 
 Relation between reload value and pulse width 
The output pulse width is equal to the 16-bit long reload register value added by 1, and which is multiplied 
by the count clock cycle. Therefore, when the reload register value is 0x0000, the pulse width is equal to 
one count clock cycle. When the relo ad register value is 0xFFFF, the pulse width is equal to 65536 count 
clock cycle. The pulse width calcul ation formulas are as follows: 
PL = T x (L + 1)  PL...

 
9. Descriptions of base timer functions 
 
9.2.4. Interrupt causes and timing chart 
This section explains interrupt causes and a timing chart. 
 Interrupt causes and timing chart (PPG output: Normal polarity) 
As a time from trigger input to loading of the counter va lue, T is required for software triggering or 2T to 
3T (T: machine cycle) fo r external triggering. 
Interrupt causes are set to detection of a PPG star t trigger and an underflow in HIGH level output. 
Figure 9-12  shows the interrupt...

 
9. Descriptions of base timer functions 
 
9.2.5. PPG timer operation flowchart 
This section provides an operation flowchart of the PPG timer. 
 PPG timer operation flowchart 
 
  
PPG mode selectio
n
Count clo ck 
 selection
Operation mode selection
Interrupt flag clea
r
Interrupt enable
Settings 
Stop of count operation
Stop of operation
Continuous operation
Trigger detection 
TGIR flag setting
Start of decrement
Occurrence of an underflow UDIR flag setting
MDSE =0 ?  
No  
Yes
PPGL output
PPGH...

 
9. Descriptions of base timer functions 
 
9.2.6. Timer Control Registers (TMCR and TMCR2) and Status Control Register (STC) used when the PPG 
timer is selected 
The Timer Control Register (TMCR) controls the PPG timer. Note that some bits cannot be 
rewritten while the PPG timer is in operation. 
 Timer Control Register (H igh-order bytes of TMCR) 
 
bit 15 14 13 12 11 10 9 8 
Field res CKS2 CKS1 CKS0 RTGENPMSK EGS1 EGS0 
Attribute  R/W R/W  R/W R/W R/W R/W R/W R/W 
Initial value 0 0  0 0 0 0 0 0...

 
9. Descriptions of base timer functions 
 
[bit 11] RTGEN: Restart enable bit This bit enables restart by a software trigger or trigger input. 
Bit Description 
0 Restart  disabled 
1 Restart  enabled 
 
[bit 10] PMSK: Pulse output mask bit    This bit controls the output level of PPG output waveforms. 
   When this bit is set to 0, PPG waveforms are output as they are. 
   When this bit is set to 1, the PPG output is masked with LOW output regardless of the cycle and duty 
set values. 
 
When...