Samsung Exynos 5 User Manual
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Page 601
Samsung Confidential Exynos 5250_UM 7 Interrupt Combiner 7-23 7.5.1.15 ISTR3 Base Address: 0x1044_0000 for main CPU and 0x1045_0000 for IOP Address = Base Address + 0x0038, Reset Value = Undefined Name Bit Type Description Reset Value RSVD [31:28] –=Interrupt pending status= The corresponding interrupt enable bit does not affect this pending status. = 0===The interrupt is not pending= 1===The interrupt is pending= –= MDMA0_ABORT=[27]=o=–= RSVD=[2S:10]=–=–= MDMA1_ABORT=[9]=o=–=...
Page 602
Samsung Confidential Exynos 5250_UM 7 Interrupt Combiner 7-24 7.5.1.17 IESR4 Base Address: 0x1044_0000 for main CPU and 0x1045_0000 for IOP Address = Base Address + 0x0040, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value CPU_nRAMERRIRQ [31] RW Sets the corresponding interrupt enable bit to 1. If the interrupt enable bit is set to 1, the interrupt request is served. Write 0 = Does not change the current setting 1 = Sets the interrupt enable bit to 1 Read The current...
Page 603
Samsung Confidential Exynos 5250_UM 7 Interrupt Combiner 7-25 7.5.1.18 IECR4 Base Address: 0x1044_0000 for main CPU and 0x1045_0000 for IOP Address = Base Address + 0x0044, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value CPU_nRAMERRIRQ [31] RW Clear the corresponding interrupt enable bit to 0. If the interrupt enable bit is cleared, the interrupt is masked. Write 0 = Does not change the current setting 1 = Clears the interrupt enable bit to 0 Read The current...
Page 604
Samsung Confidential Exynos 5250_UM 7 Interrupt Combiner 7-26 7.5.1.19 ISTR4 Base Address: 0x1044_0000 for main CPU and 0x1045_0000 for IOP Address = Base Address + 0x0048, Reset Value = Undefined Name Bit Type Description Reset Value CPU_nRAMERRIRQ [31] R Interrupt pending status The corresponding interrupt enable bit does not affect this pending status. 0 = The interrupt is not pending 1 = The interrupt is pending –= CPU_nAXIERRIRn=[30]=o=–= RSVD=[29]=–=–=...
Page 605
Samsung Confidential Exynos 5250_UM 7 Interrupt Combiner 7-27 7.5.1.20 IMSR4 Base Address: 0x1044_0000 for main CPU and 0x1045_0000 for IOP Address = Base Address + 0x004C, Reset Value = Undefined Name Bit Type Description Reset Value CPU_nRAMERRIRQ [31] R Masked interrupt pending status If the corresponding interrupt enable bit is 0, the IMSR bit is read out as 0. 0 = The interrupt is not pending 1 = The interrupt is pending –= CPU_nAXIERRIRn=[30]=o=–= RSVD=[29]=–=–=...
Page 606
Samsung Confidential Exynos 5250_UM 7 Interrupt Combiner 7-28 7.5.1.21 IESR5 Base Address: 0x1044_0000 for main CPU and 0x1045_0000 for IOP Address = Base Address + 0x0050, Reset Value = 0x0000_0101 Name Bit Type Description Reset Value RSVD [31] –=Sets the corresponding interrupt enable bit to 1. If the interrupt enable bit is set to 1, the= interrupt request is served.= Write= 0===Does not change the current setting= 1===Sets the interrupt enable bit to 1= Read= The current interrupt...
Page 607
Samsung Confidential Exynos 5250_UM 7 Interrupt Combiner 7-29 7.5.1.22 IECR5 Base Address: 0x1044_0000 for main CPU and 0x1045_0000 for IOP Address = Base Address + 0x0054, Reset Value = 0x0000_0101 Name Bit Type Description Reset Value RSVD [31] RW Clear the corresponding interrupt enable bit to 0. If the interrupt enable bit is cleared, the interrupt is masked. Write 0 = Does not change the current setting 1 = Clears the interrupt enable bit to 0 Read The current interrupt enable...
Page 608
Samsung Confidential Exynos 5250_UM 7 Interrupt Combiner 7-30 7.5.1.23 ISTR5 Base Address: 0x1044_0000 for main CPU and 0x1045_0000 for IOP Address = Base Address + 0x0058, Reset Value = Undefined Name Bit Type Description Reset Value RSVD [31] –= Interrupt pending status= The corresponding interrupt enable bit does not affect this pending status.= 0===The interrupt is not pending= 1===The interrupt is pending= –= RSVD=[30]=–=–= RSVD=[29]=–=–= MCT_G1=[28]=o=–= MCT_G0=[27]=o=–=...
Page 609
Samsung Confidential Exynos 5250_UM 7 Interrupt Combiner 7-31 7.5.1.24 IMSR5 Base Address: 0x1044_0000 for main CPU and 0x1045_0000 for IOP Address = Base Address + 0x005C, Reset Value = Undefined Name Bit Type Description Reset Value RSVD [31] –= Masked interrupt=pending status= If the corresponding interrupt enable bit is=0,= the IMSR bit is=read out as 0.= 0===The interrupt is not pending= 1===The interrupt is pending= –= RSVD=[30]=–=–= RSVD=[29]=–=–= MCT_G1=[28]=o=–= MCT_G0=[27]=o=–=...
Page 610
Samsung Confidential Exynos 5250_UM 7 Interrupt Combiner 7-32 7.5.1.25 IESR6 Base Address: 0x1044_0000 for main CPU and 0x1045_0000 for IOP Address = Base Address + 0x0060, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:26] –=Reserved=0x0= EINTx7]=[25]=RW=Sets the corresponding interrupt enable bit to 1. If the interrupt enable bit is set to 1, the= interrupt request is served.= Write= 0===Does not change the current setting= 1===Sets the interrupt enable bit to...
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