Samsung Exynos 5 User Manual
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Page 651
Samsung Confidential Exynos 5250_UM 10 Pulse Width Modulation Timer 10-7 10.3.3 Auto-Reload and Double Buffering The PWM Timers includes a double buffering feature, which changes the reload value for the next Timer operation without stopping the current Timer operation. The Timer value is written into TCNTBn (Timer Count Buffer register) and the current counter value of the Timer is read from TCNTOn (Timer Count Observation register). If TCNTBn is Read, the Read value does not reflect the...
Page 652
Samsung Confidential Exynos 5250_UM 10 Pulse Width Modulation Timer 10-8 10.3.4 Timer Operation Figure 10-5 illustrates an example of Timer Operation: Figure 10-5 Timer Operation Steps in Timer Operation: 1. Enable the Auto-reload feature. Set the TCNTBn as 159 (50 + 109) and TCMPBn as 109. Set the manual update bit On and set the manual update bit Off. Set the inverter On/Off bit. The manual update bit sets TCNTn and TCMPn to the value of TCNTBn and TCMPBn. 2. Set TCNTBn and...
Page 653
Samsung Confidential Exynos 5250_UM 10 Pulse Width Modulation Timer 10-9 10.3.5 Initialize Timer (Setting Manual-Up Data and Inverter) User must define the starting value of the TCNTn, because an Auto-reload operation of the Timer occurs when the down counter reaches 0. In this case, the starting value must be loaded by manual update bit. The sequence to start a Timer is: 1. Write the initial value into TCNTBn and TCMPBn. 2. Set the manual update bit and clear only manual update bit of the...
Page 654
Samsung Confidential Exynos 5250_UM 10 Pulse Width Modulation Timer 10-10 10.3.7 Output Level Control Figure 10-7 illustrates an example of inverter On/Off: Figure 10-7 Inverter On/Off Steps to maintain TOUT as high or low (assume that inverter is off): 1. Turn-off the Auto-reload bit. The TOUTn goes to high level and the Timer is stopped after TCNTn reaches 0. This method is recommended. 2. Stop the timer by clearing the timer start/stop bit to 0. When TCNTn TCMPn, the output level...
Page 655
Samsung Confidential Exynos 5250_UM 10 Pulse Width Modulation Timer 10-11 10.3.8 Dead Zone Generator This feature inserts the time gap between a Turn-off and Turn-on of two different switching devices. This time gap prohibits the two switching device turning on simultaneously, even for a very short time. TOUT_0 specifies the PWM output. nTOUT_0 specifies the inversion of the TOUT_0. When the dead-zone is enabled, the output wave-form of TOUT_0 and nTOUT_0 is TOUT_0_DZ and nTOUT_0_DZ,...
Page 656
Samsung Confidential Exynos 5250_UM 10 Pulse Width Modulation Timer 10-12 10.4 I/O Description Signal I/O Description Pad Type TOUT_0 Output PW MTIMER TOUT[0] XpwmTOUT[0] muxed TOUT_1 Output PW MTIMER TOUT[1] XpwmTOUT[1] muxed TOUT_2 Output PW MTIMER TOUT[2] XpwmTOUT[2] muxed TOUT_3 Output PW MTIMER TOUT[3] XpwmTOUT[3] muxed NOTE: Type field indicates whether pads are dedicated to the signal, or pads are connected to the multiplexed signals.
Page 657
Samsung Confidential Exynos 5250_UM 10 Pulse Width Modulation Timer 10-13 10.5 Register Description 10.5.1 Register Map Summary Base Address: 0x12DD_0000 (PWM) Base Address: 0x1316_0000 (PWM_ISP) Register Offset Description Reset Value TCFG0 0x0000 Specifies the timer configuration register 0 that configures the two 8-bit prescaler and dead zone length 0x0000_0101 TCFG1 0x0004 Specifies the timer configuration register 1 that controls 5 MUX select bit 0x0000_0000 TCON 0x0008 Specifies...
Page 658
Samsung Confidential Exynos 5250_UM 10 Pulse Width Modulation Timer 10-14 10.5.1.1 TCFG0 Base Address: 0x12DD_0000 (PWM) Base Address: 0x1316_0000 (PWM_ISP) Address = Base Address + 0x0000, Reset Value = 0x0000_0101 Name Bit Type Description Reset Value RSVD [31:24] –=Reserved Bits=0x00= Dead zone length=[23:16]=RW=Dead Zone Length==0x00= Prescaler 1=[15:8]=RW=Prescaler 1=value for Timer=2, 3=and=4=0x01= Prescaler 0=[7:0]=RW=Prescaler 0=value for Timer 0=and=1=0x01= = Timer fnput=Clock...
Page 659
Samsung Confidential Exynos 5250_UM 10 Pulse Width Modulation Timer 10-15 10.5.1.2 TCFG1 Base Address: 0x12DD_0000 (PWM) Base Address: 0x1316_0000 (PWM_ISP) Address = Base Address + 0x0004, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:20] –=Reserved Bits=0x000= Divider MUX4=[19:16]=RW= Selects=MUX input for PWM Timer 4= 0000== 1/1= 0001== 1/2= 0010 = 1/4= 0011== 1/8= 0100 = 1/1S= 0x0= Divider MUX3=[15:12]=RW= Selects=MUX input for PWM Timer 3= 0000== 1/1=...
Page 660
Samsung Confidential Exynos 5250_UM 10 Pulse Width Modulation Timer 10-16 10.5.1.3 TCON Base Address: 0x12DD_0000 (PWM) Base Address: 0x1316_0000 (PWM_ISP) Address = Base Address + 0x0008, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:23] –=Reserved Bits=0x000= Timer 4=auto= reload on/off =[22]=RW=0===lne-phot= 1== fnterval Mode=(Auto-oeload)=0x0= Timer 4=manual= update=[21]=RW=0===No lperation= 1 = rpdates TCNTB4=0x0= Timer 4=start/stop=[20]=RW=0===ptops=...
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