Samsung Exynos 5 User Manual

Samsung Confidential  
Exynos 5250_UM 6 Interrupt Controller 
 6-1  
6 Interrupt Controller 
6.1 Overview 
6.1.1 Features of the Generic Interrupt Controller (GIC) 
Exynos 5250 adopts CoreLink GIC-400 Generic Interrupt Controller as a centralized resource for supporting and 
managing interrupts in a system. For GIC details, please refer to the following ARM documents. 
 CoreLink GIC-400 Generic Interrupt Controller-Technical Reference Manual, Revision r0p0 
 ARM Generic Interrupt...

Samsung Confidential  
Exynos 5250_UM 6 Interrupt Controller 
 6-2  
6.2 Interrupt Source 
6.2.1 Interrupt Sources Connection 
 
    Figure 6-1   Interrupt Sources Connection 
The Cortex-A15 has an external GIC which has 128 SPIs. GICs interrupt sources pass via INT_COMBINER block 
that combines interrupt sources for GIC as shown in Figure 6-1. 
 
 Main CPU
(Dual Cortex-A15)
GIC_CPU
INT_COMBINER_CPU
nFIQ_cpu[1:0]
nIRQ_cpu[1:0]
nVIRQ_cpu[1:0]
nVFIQ_cpu[1:0]
[31:0]
…… 
[127:32]
SPI[127:0]
…… Raw interrupt...

Samsung Confidential  
Exynos 5250_UM 6 Interrupt Controller 
 6-3  
6.2.2 External GIC Interrupt Table 
Softwared Generated Interrupts (SGIs[15:0], ID[15:0]), Private Peripheral Interrupts (PPIs[15:0], ID[31:16]) and 
Shared Peripheral Interrupts (SPIs[127:0], ID[159:32]) are supported. For SPI, maximal 32  4 = 128 interrupt 
requests shall be serviced. See the following table. 
Table 6-2   External GIC Interrupt Table (SPI[127:32]: Non-Combined Interrupt) 
SPI Port No ID Interrupt Source Source Block...

Samsung Confidential  
Exynos 5250_UM 6 Interrupt Controller 
 6-4  
SPI Port No ID Interrupt Source Source Block 
95 127 HDMI – 
94 126 MIXER – 
93 125 EFNFCON_1 – 
92 124 EFNFCON_0 – 
91 123 G2D – 
90 122 EFNFCON_DMA – 
89 121 JPEG – 
88 120 GSCL3 – 
87 119 GSCL2 – 
86 118 GSCL1 – 
85 117 GSCL0 – 
84 116 ROTATOR – 
83 115 WDT_IOP – 
82 114 MIPI_DSI_4LANE – 
81 113 EFNFCON_DMA_ABORT – 
80 112 MIPI_CSI_B – 
79 111 MIPI_CSI_A – 
78 110 SDMMC3 – 
77 109 SDMMC2 – 
76 108 SDMMC1 – 
75 107 SDMMC0 – 
74 106...

Samsung Confidential  
Exynos 5250_UM 6 Interrupt Controller 
 6-5  
SPI Port No ID Interrupt Source Source Block 
58 90 I2C2/USI2 – 
57 89 I2C1/USI1 – 
56 88 I2C0/USI0 – 
55 87 MONOCNT – 
54 86 UART3 – 
53 85 UART2 – 
52 84 UART1 – 
51 83 UART0 – 
50 82 GPIO_C2C – 
49 81 Reserved – 
48 80 Reserved – 
47 79 GPIO – 
46 78 GPIO_LB – 
45 77 GPIO_RT – 
44 76 RTC_TIC – 
43 75 RTC_ALARM – 
42 74 WDT – 
41 73 RTIC – 
40 72 TIMER4 – 
39 71 TIMER3 – 
38 70 TIMER2 – 
37 69 TIMER1 – 
36 68 TIMER0 – 
35 67 PDMA1 –...

Samsung Confidential  
Exynos 5250_UM 6 Interrupt Controller 
 6-6  
Table 6-3   External GIC Interrupt Table (SPI[31:0]: Combined Interrupt) 
SPI Port No Id Int_e_combiner Interrupt Source Source Block 
31 63 IntG31_1 EINT[15] – 
IntG31_0 EINT[14] – 
30 62 IntG30_1 EINT[13] – 
IntG30_0 EINT[12] – 
29 61 IntG29_1 EINT[11] – 
IntG29_0 EINT[10] – 
28 60 IntG28_1 EINT[9] – 
IntG28_0 EINT[8] – 
27 59 IntG27_1 EINT[7] – 
IntG27_0 EINT[6] – 
26 58 IntG26_1 EINT[5] – 
IntG26_0 EINT[4] – 
25 57 
IntG25_3 MCT_G3...

Samsung Confidential  
Exynos 5250_UM 6 Interrupt Controller 
 6-7  
SPI Port No Id Int_e_combiner Interrupt Source Source Block 
IntG22_3 CPU_nCNTPNSIRQ[1] – 
IntG22_2 CPU_PARITYFAILSCU[1] – 
IntG22_1 CPU_nCNTHPIRQ[1] – 
IntG22_0 CPU_PARITYFAIL[1] – 
21 53 IntG21_0 CPU_nIRQ[1] – 
20 52 IntG20_0 CPU_nIRQ[0] – 
19 51 
IntG19_7 CPU_nRAMERRIRQ – 
IntG19_6 CPU_nAXIERRIRQ – 
IntG19_5 Reserved – 
IntG19_4 INT_COMB_ISP_GIC – 
IntG19_3 INT_COMB_IOP_GIC – 
IntG19_2 CCI_nERRORIRQ – 
IntG19_1 INT_COMB_ARMISP_GIC –...

Samsung Confidential  
Exynos 5250_UM 6 Interrupt Controller 
 6-8  
SPI Port No Id Int_e_combiner Interrupt Source Source Block 
IntG16_0 PEREV_A0_CDREX – 
15 47 
IntG15_7 Reserved – 
IntG15_6 Reserved – 
IntG15_5 Reserved – 
IntG15_4 Reserved – 
IntG15_3 MDMA0_ABORT – 
IntG15_2 Reserved – 
IntG15_1 Reserved – 
IntG15_0 Reserved – 
14 46 
IntG14_7 Reserved – 
IntG14_6 Reserved – 
IntG14_5 Reserved – 
IntG14_4 Reserved – 
IntG14_3 Reserved – 
IntG14_2 Reserved – 
IntG14_1 Reserved – 
IntG14_0 Reserved –...

Samsung Confidential  
Exynos 5250_UM 6 Interrupt Controller 
 6-9  
SPI Port No Id Int_e_combiner Interrupt Source Source Block 
IntG11_3 Reserved 
IntG11_2 Reserved 
IntG11_1 SYSMMU_ODC[1] 
IntG11_0 SYSMMU_ODC[0] 
10 42 
IntG10_7 SYSMMU_ISP[1] – 
IntG10_6 SYSMMU_ISP[0] – 
IntG10_5 SYSMMU_DIS0[1] – 
IntG10_4 SYSMMU_DIS0[0] – 
IntG10_3 DP1 – 
IntG10_2 Reserved – 
IntG10_1 Reserved – 
IntG10_0 Reserved – 
9 41 
IntG9_7 Reserved – 
IntG9_6 Reserved – 
IntG9_5 SYSMMU_DIS1[1] – 
IntG9_4 SYSMMU_DIS1[0] –...

Samsung Confidential  
Exynos 5250_UM 6 Interrupt Controller 
 6-10  
SPI Port No Id Int_e_combiner Interrupt Source Source Block 
IntG6_6 SYSMMU_SSS[0] – 
IntG6_5 SYSMMU_RTIC[1] – 
IntG6_4 SYSMMU_RTIC[0] – 
IntG6_3 SYSMMU_MFCR[1] – 
IntG6_2 SYSMMU_MFCR[0] – 
IntG6_1 SYSMMU_ARM[1] – 
IntG6_0 SYSMMU_ARM[0] – 
5 37 
IntG5_7 SYSMMU_3DNR[1] – 
IntG5_6 SYSMMU_3DNR[0] – 
IntG5_5 SYSMMU_MCUISP[1] – 
IntG5_4 SYSMMU_MCUISP[0] – 
IntG5_3 SYSMMU_SCALERCISP[1] – 
IntG5_2 SYSMMU_SCALERCISP[0] – 
IntG5_1...