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Samsung Exynos 5 User Manual

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    Page 431

    Page 431 Samsung Confidential Exynos 5250_UM 5 Clock Controller 5-65 5.9.1.22 APLL_CON0_L4  Base Address: 0x1001_0000  Address = Base Address + 0x1110, Reset Value = 0x00C8_0301 Name Bit Type Description Reset Value RSVD [31:28] –=Reserved=0x0= FSEL=[27]=RW=APLL FSEL value=0x0= RSVD=[26]=–=Reserved=0x0= MDIV=[25:16]=RW=APLL M=Divide Value=0xC8= RSVD=[15:14]=–=Reserved=0x0= PDIV=[13:8]=RW=APLL P=Divide Value=0x3= RSVD=[7:3]=–=Reserved=0x0= SDIV=[2:0]=RW=APLL S=Divide Value=0x1= = 5.9.1.23 APLL_CON0_L3... 
    Samsung Confidential  
Exynos 5250_UM 5 Clock Controller 
 5-65  
5.9.1.22 APLL_CON0_L4 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x1110, Reset Value = 0x00C8_0301 
Name Bit Type Description Reset Value 
RSVD [31:28] –=Reserved=0x0=
FSEL=[27]=RW=APLL FSEL value=0x0=
RSVD=[26]=–=Reserved=0x0=
MDIV=[25:16]=RW=APLL M=Divide Value=0xC8=
RSVD=[15:14]=–=Reserved=0x0=
PDIV=[13:8]=RW=APLL P=Divide Value=0x3=
RSVD=[7:3]=–=Reserved=0x0=
SDIV=[2:0]=RW=APLL S=Divide Value=0x1=
=
5.9.1.23 APLL_CON0_L3...

    Page 432

    Page 432 Samsung Confidential Exynos 5250_UM 5 Clock Controller 5-66 5.9.1.24 APLL_CON0_L2  Base Address: 0x1001_0000  Address = Base Address + 0x1118, Reset Value = 0x00C8_0301 Name Bit Type Description Reset Value RSVD [31:28] –=Reserved=0x0= FSEL=[27]=RW=APLL FSEL value=0x0= RSVD=[26]=–=Reserved=0x0= MDIV=[25:16]=RW=APLL M=Divide Value=0xC8= RSVD=[15:14]=–=Reserved=0x0= PDIV=[13:8]=RW=APLL P=Divide Value=0x3= RSVD=[7:3]=–=Reserved=0x0= SDIV=[2:0]=RW=APLL S=Divide Value=0x1= = 5.9.1.25 APLL_CON0_L1... 
    Samsung Confidential  
Exynos 5250_UM 5 Clock Controller 
 5-66  
5.9.1.24 APLL_CON0_L2 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x1118, Reset Value = 0x00C8_0301 
Name Bit Type Description Reset Value 
RSVD [31:28] –=Reserved=0x0=
FSEL=[27]=RW=APLL FSEL value=0x0=
RSVD=[26]=–=Reserved=0x0=
MDIV=[25:16]=RW=APLL M=Divide Value=0xC8=
RSVD=[15:14]=–=Reserved=0x0=
PDIV=[13:8]=RW=APLL P=Divide Value=0x3=
RSVD=[7:3]=–=Reserved=0x0=
SDIV=[2:0]=RW=APLL S=Divide Value=0x1=
=
5.9.1.25 APLL_CON0_L1...

    Page 433

    Page 433 Samsung Confidential Exynos 5250_UM 5 Clock Controller 5-67 5.9.1.26 APLL_CON1_L8  Base Address: 0x1001_0000  Address = Base Address + 0x1200, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value AFC_ENB [31] RW Decides whether AFC is enabled or not (Active- low) 0 = Enables AFC 1 = Disables AFC 0x0 RSVD [30:5] –=Reserved=0x0= AFC=[4:0]=RW=AFC value=0x0= = 5.9.1.27 APLL_CON1_L7  Base Address: 0x1001_0000  Address = Base Address + 0x1204, Reset Value = 0x0000_0000 Name Bit... 
    Samsung Confidential  
Exynos 5250_UM 5 Clock Controller 
 5-67  
5.9.1.26 APLL_CON1_L8 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x1200, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
AFC_ENB [31] RW 
Decides whether AFC is enabled or not (Active-
low) 
0 = Enables AFC 
1 = Disables AFC 
0x0 
RSVD [30:5] –=Reserved=0x0=
AFC=[4:0]=RW=AFC value=0x0=
=
5.9.1.27 APLL_CON1_L7 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x1204, Reset Value = 0x0000_0000 
Name Bit...

    Page 434

    Page 434 Samsung Confidential Exynos 5250_UM 5 Clock Controller 5-68 5.9.1.29 APLL_CON1_L5  Base Address: 0x1001_0000  Address = Base Address + 0x120C, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value AFC_ENB [31] RW Decides whether AFC is enabled or not (Active- low) 0 = Enables AFC 1 = Disables AFC 0x0 RSVD [30:5] –=Reserved=0x0= AFC=[4:0]=RW=AFC value=0x0= = 5.9.1.30 APLL_CON1_L4  Base Address: 0x1001_0000  Address = Base Address + 0x1210, Reset Value = 0x0000_0000 Name Bit... 
    Samsung Confidential  
Exynos 5250_UM 5 Clock Controller 
 5-68  
5.9.1.29 APLL_CON1_L5 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x120C, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
AFC_ENB [31] RW 
Decides whether AFC is enabled or not (Active-
low) 
0 = Enables AFC 
1 = Disables AFC 
0x0 
RSVD [30:5] –=Reserved=0x0=
AFC=[4:0]=RW=AFC value=0x0=
=
5.9.1.30 APLL_CON1_L4 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x1210, Reset Value = 0x0000_0000 
Name Bit...

    Page 435

    Page 435 Samsung Confidential Exynos 5250_UM 5 Clock Controller 5-69 5.9.1.32 APLL_CON1_L2  Base Address: 0x1001_0000  Address = Base Address + 0x1218, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value AFC_ENB [31] RW Decides whether AFC is enabled or not (Active- low) 0 = Enables AFC 1 = Disables AFC 0x0 RSVD [30:5] –=Reserved=0x0= AFC=[4:0]=RW=AFC value=0x0= = 5.9.1.33 APLL_CON1_L1  Base Address: 0x1001_0000  Address = Base Address + 0x121C, Reset Value = 0x0000_0000 Name Bit... 
    Samsung Confidential  
Exynos 5250_UM 5 Clock Controller 
 5-69  
5.9.1.32 APLL_CON1_L2 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x1218, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
AFC_ENB [31] RW 
Decides whether AFC is enabled or not (Active-
low) 
0 = Enables AFC 
1 = Disables AFC 
0x0 
RSVD [30:5] –=Reserved=0x0=
AFC=[4:0]=RW=AFC value=0x0=
=
5.9.1.33 APLL_CON1_L1 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x121C, Reset Value = 0x0000_0000 
Name Bit...

    Page 436

    Page 436 Samsung Confidential Exynos 5250_UM 5 Clock Controller 5-70 5.9.1.35 MPLL_CON0  Base Address: 0x1001_0000  Address = Base Address + 0x4100, Reset Value = 0x00C8_0601 Name Bit Type Description Reset Value ENABLE [31] RW PLL Enable control 0 = Disables 1 = Enables 0x0 RSVD [30] –=Reserved=0x0= LOCKED=[29]=o= PLL Locking indication= 0 = Unlocks= 1 = Locks= 0x0= RSVD=x28]=–=Reserved=0x0= FSEL=[27]=RW= Monitoring Frequency Select pin= 0 = FVCO_OUT = FREc= 1 = FVCO_OUT = FVCl= 0x0=... 
    Samsung Confidential  
Exynos 5250_UM 5 Clock Controller 
 5-70  
5.9.1.35 MPLL_CON0 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x4100, Reset Value = 0x00C8_0601 
Name Bit Type Description Reset Value 
ENABLE [31] RW 
PLL Enable control 
0 = Disables 
1 = Enables 
0x0 
RSVD [30] –=Reserved=0x0=
LOCKED=[29]=o=
PLL Locking indication=
0 = Unlocks=
1 = Locks=
0x0=
RSVD=x28]=–=Reserved=0x0=
FSEL=[27]=RW=
Monitoring Frequency Select pin=
0 = FVCO_OUT = FREc=
1 = FVCO_OUT = FVCl=
0x0=...

    Page 437

    Page 437 Samsung Confidential Exynos 5250_UM 5 Clock Controller 5-71 Do not set the value of PDIV[5:0] or MDIV[9:0] to all zeros Refer to 5.3.1 Recommended PLL PMS Value for APLL, MPLL for more information on recommended PMS values. SDIV[2:0] controls division ratio of Scaler as described in Table 5-15. 
    Samsung Confidential  
Exynos 5250_UM 5 Clock Controller 
 5-71  
Do not set the value of PDIV[5:0] or MDIV[9:0] to all zeros 
Refer to 5.3.1 Recommended PLL PMS Value for APLL, MPLL for more information on recommended PMS 
values. 
SDIV[2:0] controls division ratio of Scaler as described in Table 5-15.

    Page 438

    Page 438 Samsung Confidential Exynos 5250_UM 5 Clock Controller 5-72 5.9.1.36 MPLL_CON1  Base Address: 0x1001_0000  Address = Base Address + 0x4104, Reset Value = 0x0020_3800 Name Bit Type Description Reset Value RSVD [31:22] –=Reserved=0x0= DCC_ENB=[21]=RW= Enables Duty Cycle Corrector== (only for monitoring)= 0 = Enables DCC = 1 = Disables=DCC = 0x1= AFC_ENB=x20]=RW= Decides=whether AFC is enabled or not (Active- low)= 0 = Enables AFC = 1 = Disables AFC== 0x0= RSVD=x19:17]=–=Reserved=0x0=... 
    Samsung Confidential  
Exynos 5250_UM 5 Clock Controller 
 5-72  
5.9.1.36 MPLL_CON1 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x4104, Reset Value = 0x0020_3800 
Name Bit Type Description Reset Value 
RSVD [31:22] –=Reserved=0x0=
DCC_ENB=[21]=RW=
Enables Duty Cycle Corrector==
(only for monitoring)=
0 = Enables DCC =
1 = Disables=DCC =
0x1=
AFC_ENB=x20]=RW=
Decides=whether AFC is enabled or not (Active-
low)=
0 = Enables AFC =
1 = Disables AFC==
0x0=
RSVD=x19:17]=–=Reserved=0x0=...

    Page 439

    Page 439 Samsung Confidential Exynos 5250_UM 5 Clock Controller 5-73 5.9.1.37 CLK_SRC_CORE0  Base Address: 0x1001_0000  Address = Base Address + 0x4200, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:20] –=Reserved=0x0= MUX_RSVD3= _CORb_SEL=x19:1S]=RW= Control MUu_RSVD3_CORb, the source clock of RSVD3_CORE= 0000 = XXTf= 0001 ==XXTI= 0010 = SCLK_HDMI24M= 0011 = SCLK_DPTXPHY= 0100 = SCLK_USBHOST20PHY= 0101 = SCLK_HDMIPHY= 0110 = SCLK_MPLL= 0111 = SCLK_EPLL= 1000 = SCLK_VPLL=... 
    Samsung Confidential  
Exynos 5250_UM 5 Clock Controller 
 5-73  
5.9.1.37 CLK_SRC_CORE0 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x4200, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
RSVD [31:20] –=Reserved=0x0=
MUX_RSVD3=
_CORb_SEL=x19:1S]=RW=
Control MUu_RSVD3_CORb, the source clock of 
RSVD3_CORE=
0000 = XXTf=
0001 ==XXTI=
0010 = SCLK_HDMI24M=
0011 = SCLK_DPTXPHY=
0100 = SCLK_USBHOST20PHY=
0101 = SCLK_HDMIPHY=
0110 = SCLK_MPLL=
0111 = SCLK_EPLL=
1000 = SCLK_VPLL=...

    Page 440

    Page 440 Samsung Confidential Exynos 5250_UM 5 Clock Controller 5-74 5.9.1.39 CLK_SRC_MASK_CORE  Base Address: 0x1001_0000  Address = Base Address + 0x4300, Reset Value = 0x0001_0000 Name Bit Type Description Reset Value RSVD [31:17] –=Reserved=0x0= RSVD3_CORE_M ASh=x16]=RW= Mask=output clock of MUu_RSVD3_CORb= 0 = Masks MUX_RSVD3_CORE= 1 = Unmasks MUX_RSVD3_CORE= 0x0= RSVD=[15:0]=–=Reserved=0x0= = 5.9.1.40 CLK_MUX_STAT_CORE1  Base Address: 0x1001_0000  Address = Base Address + 0x4404 Reset Value... 
    Samsung Confidential  
Exynos 5250_UM 5 Clock Controller 
 5-74  
5.9.1.39 CLK_SRC_MASK_CORE 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x4300, Reset Value = 0x0001_0000 
Name Bit Type Description Reset Value 
RSVD [31:17] –=Reserved=0x0=
RSVD3_CORE_M
ASh=x16]=RW=
Mask=output clock of MUu_RSVD3_CORb=
0 = Masks MUX_RSVD3_CORE=
1 = Unmasks MUX_RSVD3_CORE=
0x0=
RSVD=[15:0]=–=Reserved=0x0=
=
5.9.1.40 CLK_MUX_STAT_CORE1 
 Base Address: 0x1001_0000 
 Address = Base Address + 0x4404 Reset Value...
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