Panasonic Cpc+AII/B Digital Business System Release Notes Manual

Chapter 1. System Programming (FFI)Section 400-Programming
Table l-36. Minimum Tl programming (default settings appear in bold)
STEP 1 -- NEW FUNCTION RESET
Address:
Description:
Options:
,
FFl 8# l# (0 or l)# (to select the reset)
FFl 8# 2# (0 or l)# (to complete the reset)
Must be performed if you are installing Tl while upgrading
to a new CPC-B release (e.g., from 6.2 to 7.0). Not needed
if you are upgrading to a “point” release (e.g., from 6.0 to
6.2).
O=Do not reset
l=Reset
STEP 2 -- SYSTEM...

Section 400-ProgrammingChapter 1. System Programming (FFl)
iddress:
continued)
Iescrip tion:
continued)
lp tions:
Zxamples:
FFl 8# 4# l# 2# (l-3)# for Sync Source 1
FFl 8# 4# I# 3# (0-3)# for Sync Source 2
FFl 8# 4# l# 4# (0-3)# for Sync Source 3
The “Free run” setting is the only setting that can be
entered for more than one sync source. One of the three
sync sources should be set to “Free run”, so that the 
Tl can
provide its own clocking if the network clock fails.
For changes to this parameter to...

Chapter 1. System Programming (FFl )
Section 400-Programming
STEP 5 -- NUMBER OF Tl CHANNELS
Address:
Description:
Options:
FFl 8# # 4# l# 2# (0-24)# for Master Cabinet
FFl 8# 4# 5# l# 2# (0-24)# for Slave Cabinet
Specify the number of Tl channels used when “Fractional
Tl” is needed (using only a portion of the 24 available
channels on the 
Tl card).
0 = None (no Tl channels are used)
1 thru 24 = Number of Tl channels used
STEP 6 -- FRAME FORMAT
iddress:
Jescription:
Options:
FFl 8# # 4# l# 3# (0 or l>#...

STEP 8 -- TRUNK CIRCUIT TYPE
Iddress:
>escription:
1p tions:
Section 400-ProgrammingChapter 1. System Programming (FFCFF2 
(l-64)# 21# (0-4)##
Specify which trunk channels are used for Tl.
When assigning trunks as circuit type “3” (Tl), start from
the highest-numbered trunk port in the DBS cabinet struc-
ture, and move down sequentially from there.
If Fractional 
Tl is used, make sure that the number of
trunks assigned to circuit type “3” 
(Tl) matches the “Num
ber of Tl Channels” setting (see STEP 5...

Chapter 1. System Programming (FFi)Section 400-Programming
STEP 10 -- OUTGOUNG SIGNALING TYPE
Address:
Description:
Options:
FFl 8# # 6# (l-64)# 3# (0-2)#
Specify the outgoing signaling type used by the 
Tl.
Be sure to match the signaling ordered from the CO.
For changes to this parameter to take effect, the system
must be powered down, then powered back up.
0 = Immediate Start
l=WinkStart
2 = Dial Tone Start
STEP 11 -- INCOMING SIGNALING TYPE
4ddress:
Description:
3ptions:
FFl 8# 4#/ 6# (l-64)# 4# (0 or...

Section 400-ProgrammingChapter 1. System Programming (FFl)
SyncSource1
Software Version:CPC-6 Version 4.0 or higherAddress: 
FFl 8## 4# 1# 2# (l-3)##
DescriptionThe Sync Card (installed on the CPC-B) provides a method of synchronizing
the DBS with the public network. This address determines the first clocking
source for network synchronization (internal clocking by default).
If the first clocking source fails, the system 
wili switch to the second source.
The system will attempt to go back 
to the fist...

Chapter 1. System Programming (FFl)Section 400-Programming
Restriction on Duplicate Sync Settings.
“Free run” is the only setting that
can be entered for more than one sync source.Power-Cycling Requirement.
For changes to this parameter to take effect,
the system must be turned off, then back on.Page l-142DBS Manual 
- Issued 8/l/95DBS-70-400 

Section 400-ProgrammingChapter 1. System Programming (FFl)
Sync Source 2Software Version:
WC-6 Version 4.0 or higher
Address: 
FFl 8# 4# l# 3# (O-3)#
DescriptionDetermines the source of clocking for the second sync source, which is used
if the 
first sync source fails.
If the second sync source is used, the DBS system will attempt to switch back
to the first source based on the value set for the Network Re-Sync Timer (see
FFl 8# 4# 2# l# 0-25#). If the second source fails and the first source is not...

waprer I. sysrem rrogrammlng (t-r I 13ecIion 4uu-rrogrammwig
Sync Source 3
Software Version:CPC-B Version 4.0 or higherAddress: 
FFI 8# 4# 1# 4# (0-3)#
DescriptionDeterrnines the source of clocking for the third sync source, which is used if
both the first and second sources fail.
If the third sync source is used, the DBS system will attempt to switch back to
the first source based on the value set for the Network Re-Sync Timer (see
FFl 8# # 2# l# O-2%).
In most cases, a system with one Tl has the third...

Section 400-ProgrammingChapter 1. System Programming (FFI)
Network Re-Sync Timer
Sofhwate Version:
CPC-B Version 4.0 or higherAddress: 
FFl 8# M 2# 1# (O-25)#
DescriptionIf one clock source fails, the system will switch to another clock source. The
Network Re-Sync Timer determines how many times (once an hour) the
system attempts to return to the original clock source.
For example, if the first clocking (sync) source fails, the system will switch to
the second source, and then will attempt to return to...