Fujitsu Series 3 Manual

 
4. Registers 
 
[bit 8] CDCIE: Count inversion interrupt enable bit This bit is used to control whether or not to issue an interrupt notification to the CPU when the count 
inversion interrupt request fl ag (CDCF) is set to 1. 
When this bit is set to 1, an interrupt is generated  if the count direction of the position counter is inverted 
(CDCF=1). 
Bit Description 
0 Interrupt disabled 
1 Interrupt enabled 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  17: Quad  Position  & Revolution  Counter...

 
4. Registers 
 FUJITSU SEMICONDUCTOR LIMITED 
Chapter: Quad Position & Revolution Counter 
FUJITSU SEMICONDUCTOR CONFIDENTIAL  39  
4.9.  QPRC Maximum Position Register(QMPR) 
The QPRC Maximum Position Register (QMPR) is used to specify the maximum value of the 
position counter. 
 
bit 15 14 13 12 11 109 8 7 6 5 4 3 2 1 0 
Field QMPR[15:0] 
Attribute  R/W R/W R/W R/W R/W R/W R/WR/WR/WR/WR/WR/W R/W R/W R/W R/W
Initial 
value  1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 
 
[bit 15:0] QMPR:    When the position...

 
1. Configuration 
 
CHAPTER: A/D Converter 
This chapter explains the functions and operations of the A/D converter. 
 
1.
 Configuration 
2. Functions and Operations 
3. Notes 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
CODE: 9BFADCTOP-E01.2 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  18-1: A/D Converter 
MN706-00002-1v0-E 
687 
MB9Axxx/MB9Bxxx  Series  

 
1. Configuration 
 
1. Configuration 
A/D converter converts analog input voltage from an external pin to a digital value. 
 A/D converter configuration 
  3 units of A/D converters with 10-bit resolution or 12-bit resolution are installed. 
   Any channel can be selected to any unit from 16 channels of analog input. 
   The following triggers can be selected as  an activation trigger for A/D conversion. 
   Priority conversion activation trigger 
Trigger input from an external pin 
Timer trigger...

 
2. Functions and Operations 
 
2.  Functions and Operations 
See descriptions of the following related chapters for functions and operations of the A/D 
converter. 
 10-bit A/D converter operation 
See the chapter of 10-bit A/D Converter for  conversion operations of 10-bit A/D converter. 
 10-bit A/D timer trig ger select operation 
See the chapter of A/D Timer Trigger Selection fo r operations of 10-bit A/D converter timer trigger 
selection. 
  12-bit A/D converter operation 
See the chapter of...

 
3. Notes 
 FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER: A/D  Converter 
FUJITSU SEMICONDUCTOR CONFIDENTIAL  5 
3. Notes 
This section shows the notes. 
  Notes on 10-bit A/D converter 
 
  Simultaneous A/D conversion of 3 channels is possible because 3 units of A/D converters are installed. 
Do not select the same input channel with the multiple units. 
 
   Some channels of an analog input cannot be used for certain models. Do not change the selection 
registers (SCIS0, SCIS1, SCIS2, and SCIS3) and the...

 
1. Overview 
 
Chapter: 10-bit A/D Converter 
This chapter explains the functions and operations of the 10-bit A/D converter. 
 
1.
 Overview 
2. Configuration 
3. Explanation of Operations 
4. Setup procedure examples 
5. Registers 
   
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
CODE: 9BF10BADC-E01.2_FG65-J03.0 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  18-2: 10-bit  A/D Converter 
MN706-00002-1v0-E 
691 
MB9Axxx/MB9Bxxx  Series  

 
1. Overview 
 
1. Overview 
The 10-bit A/D converter is a function that converts analog input voltages into 10-bit digital 
values using a type of the RC Successive Approximation Register. 
 Features of the 10-bit A/D converter 
  10-bit resolution 
   Converter using a type of RC Successive Approximation Register with sample and hold circuits 
   Conversion time of 1.2  s (at a peripheral clock frequency of 30 MHz) 
   Two sampling times selectable for each input channel 
   Scan conversion...

 
2. Configuration 
 
2. Configuration 
This section provides the configuration of the 10-bit A/D converter. 
 10-bit A/D converter block diagram 
Figure 2-1 10-bit A/D converter block diagram 
 
Control unit
A/D converter
Channel & status control unit
Peripheral buses
Buffer
Scan conversion FIFO, 16 
stages  
Priority conversion FIFO, 4  stages
D/A converter  
Comparator  
Sample 
& 
holdAnalog input n
Analog input n-1 ･
･
･
･
Analog input 3
Analog input 2
Analog input 1
Analog input 0
A/D conversion...

 
3. Explanation of Operations 
 
3.  Explanation of Operations 
This chapter explains the operations of the 10-bit A/D converter. 
 
3.1 A/D conversion operation 
3.2  FIFO operations 
3.3  A/D comparison function 
3.4  Starting DMA 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  18-2: 10-bit  A/D Converter 
MN706-00002-1v0-E 
694 
MB9Axxx/MB9Bxxx  Series