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Fujitsu Series 3 Manual

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Page 321

 
4. Register List 
 
[bit9:8] QBIN1S : QBIN1S Input Select Bit Selects input for QPRC BIN1. 
bit9:8 Description 
Reading  Reads out the register value. 
Writing 00  Uses BIN1_0 at the input pin of QPRC-ch1’s BIN. [Initial value] 
Writing 01  Same as Writing 00. 
Writing 10  Uses BIN1_1 at the input pin of QPRC-ch1’s BIN. 
Writing 11 Uses BIN1_2 at the input pin of QPRC-ch1’s BIN. 
 
[bit7:6] QAIN1S : QAIN1S Input Select Bit  Selects input for QPRC AIN1. 
bit7:6 Description 
Reading  Reads out the...

Page 322

 
4. Register List 
 
4.17.  Extended Pin Function Setting Register 10 (EPFR10) 
The EPFR10 register assigns functions to external bus peripheral pins.   
 Register Configuration 
bit  31 30 29  28 27 26 25 24 
Field  UEA24EUEA23E UEA22E UEA21EUEA20E UEA19E UEA18E  UEA17E
Attribute R/W R/W R/W  R/W R/W R/W R/W R/W 
Initial value 1’b0 1’b0 1’b0  1’b0 1’b0 1’b0 1’b0 1’b0 
           
bit  23 22 21  20 19 18 17 16 
Field UEA16E UEA15E UEA14E UEA13EUEA12E UEA11E UEA10E  UEA09E
Attribute  R/W R/W R/W  R/W...

Page 323

 
4. Register List 
 
[bit28] UEA21E : UEA21E Output Select Bit Selects output for external bus Adress21. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD21. [Initial value] 
Writing 1 Produces output for user external bus MAD21. 
 
[bit27] UEA20E : UEA20E Output Select Bit  Selects output for external bus Adress20. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD20....

Page 324

 
4. Register List 
 
[bit22] UEA15E : UEA15E Output Select Bit Selects output for external bus Adress15. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD15. [Initial value] 
Writing 1 Produces output for user external bus MAD15. 
 
[bit21] UEA14E : UEA14E Output Select Bit  Selects output for external bus Adress14. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD14....

Page 325

 
4. Register List 
 
[bit16] UEA09E : UEA09E Output Select Bit Selects output for external bus Adress09. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD09. [Initial value] 
Writing 1 Produces output for user external bus MAD09. 
 
[bit15] UEA08E : UEA08E Output Select Bit  Selects output for external bus Adress08. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MAD08....

Page 326

 
4. Register List 
 
[bit10] UECS4E : UECS4E Output Select Bit Selects output for external bus CS4. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MCSX4. [Initial value] 
Writing 1 Produces output for  user external bus MCSX4. 
 
[bit9] UECS3E : UECS3E Output Select Bit  Selects output for external bus CS3. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MCSX3. [Initial...

Page 327

 
4. Register List 
 
[bit4] UEDQME : UEDQME Output Select Bit Selects output for external bus DQM. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus MDQM1or MDQM0. [Initial value] 
Writing 1  Produces output for user external bus MDQM1 and MDQM0. 
 
[bit3] UEWEXE : UEWEXE Output Select Bit  Selects output for external bus WEX. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not produce output for user external bus...

Page 328

 
4. Register List 
 
4.18.  Special Port Setting Register (SPSR) 
The SPSR register sets a pin as a signal pin of special functions. 
 Register Configuration 
bit  31 30 29  28 27 26 25 24 
Field Reserved 
Attribute - 
Initial value   
           
bit  23 22 21  20 19 18 17 16 
Field Reserved 
Attribute - 
Initial value   
           
bit  15 14 13  12 11 10  9 8 
Field Reserved 
Attribute - 
Initial value   
            
bit  7 6 5  4 3 2 1  0 
Field Reserved  USB0CReserved  SUBXC
Attribute -  R/W -...

Page 329

 
4. Register List 
 
[bit0] SUBXC : Sub Clock (Oscillation) Pin Setting Register This bit sets a pin as a sub clock (oscillation) pin. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not use two pins of X0A and X1A as sub clock (oscillation) pins but as 
digital input/output pins. 
Writing 1 Uses two pins of X0A and X1A as sub clock (oscillation) pins. [Initial value] 
(An I/O cell will be in a state of input direction, input cut-off, and pull-up 
disconnection.) 
 
 
Writin g...

Page 330

 
5. Usage Precautions 
 
5. Usage Precautions 
This section describes precautions for using this I/O board.   
 ON/OFF of the Pull-up Resistance When SPL=1 
SPL is a signal for turning a pin into Hi-Z state during standby mode.   
  When SPL=0  Normal operations   
   When SPL=1  Pin Hi-Z, input cut-off, pull-up disconnection   
However, the SPL bit cannot be used for setting external interrupts, NMIX, JTAG, or 
TRACE pins.   
For details of the SPL bit, see Chapter Low Power Consumption Mode.   
...
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