Fujitsu Series 3 Manual

 
4. Register List 
 
4.2.  Pull-up Setting Register (PCRx) 
The PCRx register sets pull-up of a pin. 
 List of PCR Register Configuration 
  31   16  15    0  Initial 
value  Attribute Support 
 Reserved  PCR0 0x001FR/W P0F to P00 
 Reserved  PCR1 0x0000 R/W P1F to P10 
 Reserved  PCR2 0x0000 R/W P2F to P20 
 Reserved  PCR3 0x0000 R/W P3F to P30 
 Reserved  PCR4 0x0000 R/W P4F to P40 
 Reserved  PCR5 0x0000 R/W P5F to P50 
 Reserved  PCR6 0x0000 R/W P6F to P60 
 Reserved  PCR7 0x0000 R/W P7F to P70 
...

 
4. Register List 
 
4.3.  Port input/output Direction Setting Register (DDRx) 
The DDRx register sets input/output direction of a pin.   
 List of DDR Register Configuration   
  31   16  15    0  Initial 
value  Attribute Support 
 reserved  DDR0 0x0000 R/W P0F to P00 
 reserved  DDR1 0x0000 R/W P1F to P10 
 reserved  DDR2 0x0000 R/W P2F to P20 
 reserved  DDR3 0x0000 R/W P3F to P30 
 reserved  DDR4 0x0000 R/W P4F to P40 
 reserved  DDR5 0x0000 R/W P5F to P50 
 reserved  DDR6 0x0000 R/W P6F to P60...

 
4. Register List 
 
4.4.  Port Input Data Register (PDIRx) 
The PDIRx register indicates input data of a pin.   
 List of PDIR Register Configuration 
  31   16  15    0  Initial 
value  Attribute Support 
 reserved  PDIR0 0x0000 R P0F to P00 
 reserved  PDIR1 0x0000 R P1F to P10 
 reserved  PDIR2 0x0000 R P2F to P20 
 reserved  PDIR3 0x0000 R P3F to P30 
 reserved  PDIR4 0x0000 R P4F to P40 
 reserved  PDIR5 0x0000 R P5F to P50 
 reserved  PDIR6 0x0000 R P6F to P60 
 reserved  PDIR7 0x0000 R P7F to...

 
4. Register List 
 
4.5.  Port Output Data Register x (PDORx) 
The PDORx register sets output data to a pin. 
 List of PDOR Register Configuration   
  31   16  15    0  Initial 
value  Attribute Support 
 reserved  PDOR0 0x0000 R/W P0F to P00 
 reserved  PDOR1 0x0000 R/W P1F to P10 
 reserved  PDOR2 0x0000 R/W P2F to P20 
 reserved  PDOR3 0x0000 R/W P3F to P30 
 reserved  PDOR4 0x0000 R/W P4F to P40 
 reserved  PDOR5 0x0000 R/W P5F to P50 
 reserved  PDOR6 0x0000 R/W P6F to P60 
 reserved  PDOR7...

 
4. Register List 
 
4.6.  Analog Input Setting Register (ADE) 
The ADE register sets a pin as an analog signal input pin of ADC. 
 Register Configuration 
bit  31    16  15    0 
Field reserved  ADE 
Attribute -  R/W 
Initial value -  0xFFFF 
 Register Function 
[bit31:16] res : Reserved Bit 
0xFFFF is read out from these bits. 
When writing these bits, set 0xFFFF to them. 
[bit15:0] ADE : Analog Input Setting Register  Sets as an analog signal input pin. 
bit15:0 Description 
Reading  Reads out the...

 
4. Register List 
 
4.7.  Extended Pin Function Setting Register (EPFRx) 
The EPFRx register assigns functions to a pin if there is more than one function. 
 List of EPFRx Register Configuration 
  31        0Initial value  Attribute  Support 
 EPFR00  0x00030000 R/W System function   
 EPFR01  0x00000000 R/W 
 EPFR02  0x00000000 R/W Multi-function timer 
 Reserved 
- -  - 
 EPFR04  0x00000000 R/W 
 EPFR05  0x00000000 R/W Base timer 
 EPFR06 
0x00000000 R/W External interrupt 
 EPFR07  0x00000000 R/W...

 
4. Register List 
 
4.8.  Extended Pin Function Setting Register 00 (EPFR00) 
The EPFR00 register assigns functions to a pin if there is more than one function. 
 Register Configuration 
bit  31 30  29 28 27 26  25 24 
Field Reserved  TRC1E TRC0E
Attribute -  R/W R/W 
Initial value   1’b0 1’b0 
            
bit  23 22  21 20 19 18  17 16 
Field Reserved 
JTAGEN1S JTAGEN0B
Attribute -  R/W R/W 
Initial value   1’b1 1’b1 
            
bit  15 14  13 12 11 10  9 8 
Field Reserved  USB0PE - 
Attribute -...

 
4. Register List 
 
[bit17] JTAGEN1S : JTAG Function Select Bit 1 Selects a function for TRSTX and TDI. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not use two pins of TRSTX and TDI. 
(A shared pin is available.) 
Writing 1 
Uses two pins of TRSTX and TDI. [Initial value] 
 
[bit16] JTAGEN0B : JTAG Function Select Bit 0  Selects a function for TCK, TMS, and TDO pins. 
bit Description 
Reading  Reads out the register value. 
Writing 0  Does not use three pins of TCK, TMS,...

 
4. Register List 
 
4.9.  Extended Pin Function Setting Register 01 (EPFR01) 
The EPFR01 register assigns functions to a pin of the multifunction timer Unit0. 
 Register Configuration 
bit  31 30 29  28 27 26 25 24 
Field IC03S  IC02S IC01S 
Attribute R/W  R/W R/W 
Initial value 3’b000  3’b000 3’b000 
           
bit  23 22 21  20 19 18 17 16 
Field IC01S  IC00S FRCK0S DTTI0S 
Attribute   R/W R/W R/W 
Initial value   3’b000  2’b00 2’b00 
           
bit  15 14 13  12 11 10  9 8 
Field Reserved...

 
4. Register List 
 
[bit28:26] IS02S : IC02 Input Select Bit Selects input for IC02. 
bit28:26 Description 
Reading  Reads out the register value. 
Writing 000  Uses IC02_0 at the input pin of the input capture IC02. [Initial value] 
Writing 001 Same as Writing 000. 
Writing 010  Uses IC02_1 at the input pin of the input capture IC02. 
Writing 011 Setting is prohibited. 
Writing 100  Uses internal macro MFSch.2LSYN for input of the input capture IC02. 
Writing 101 Uses internal macro MFSch.6LSYN for...