Fujitsu Series 3 Manual

 
5. Registers 
 
5.3.  Low-voltage Detection Interrupt Clear Register (LVD_CLR) 
The Low-voltage Detection Interrupt Clear Register (LVD_CLR) clears a low-voltage detection 
interrupt cause. 
 
Bit 7 6 5 4 3 2 1 0 
Field LVDCLReserved 
Attribute  R/W - -  - - -  - - 
Initial value 1 0 0  0 0 0 0 0 
 
[bit 7] LVDCL: Low-voltage detection interrupt clear bit 
Bit Description 
0  Clears the low-voltage detection interrupt bit of the Low-voltage Detection 
Interrupt Register (LVD_STR) to 0. 
1 
Has no...

 
5. Registers 
 
5.4.  Low-voltage Detection Voltage Protection Register (LVD_RLR)  
The Low-voltage Detection Voltage Protection Register (LVD_RLR) write-protects the 
Low-voltage Detection Voltage Control Register (LVD_CTL). 
 
Bit 31 30 29 28 27 2625242322212019 18 1716
Field LVDLCK[31:16] 
Attribute R/W 
Initial  value  0x0000 
 
Bit 15 14 13 12 11 109 8 7 6 5 4 3 2 1 0 
Field LVDLCK[15:0] 
Attribute R/W 
Initial  value  0x0001 
 
[bit 31:0] LVDLCK[31:0]: Low-voltage Detect ion Voltage Control...

 
5. Registers 
 FUJITSU SEMICONDUCTOR LIMITED 
Chapter: Low-voltage Detection 
FUJITSU SEMICONDUCTOR CONFIDENTIAL  16  
5.5.  Low-voltage Detection Circuit Status Register 
(LVD_STR2) 
The Low-voltage Detection Circuit Status Register (LVD_STR2) checks the operation status of 
a low-voltage detection interrupt. 
 
bit 7 6 5 4 3 2 1 0 
Field LVDIRDY Reserved 
Attribute  R - -  - - -  - - 
Initial value 0 1 0  0 0 0 0 0 
 
[bit7] LVDIRDY : Low-voltage detection interrupt status flag 
bit Description 
0...

 
 
 
 FUJITSU SEMICONDUCTOR LIMITED 
MN706-00002-1v0-E 
98 
MB9Axxx/MB9Bxxx  Series  

 
1. Overview of Low Power Consumption Mode 
 
Chapter: Low Power Consumption Mode 
This chapter describes the functions and operations of low power consumption mode. 
 
1.
 Overview of Low Power Consumption Mode 
2. Configuration of CPU Operation Modes 
3. Operations of Standby Modes 
4. Standby Mode Setting Procedure Examples 
5. List of Low Power Consumption Registers 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
CODE: 9BFLPMODE-E01.2 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  5: Low  Power...

 
1. Overview of Low Power Consumption Mode 
 
1.  Overview of Low Power Consumption Mode 
To reduce the power consumption, the system provides low power consumption mode, which 
enables the use of three types of standby modes: SLEEP, TIMER, and STOP modes. 
 Overview of CPU operation modes 
CPU operation modes are classified into the following types. 
  RUN modes 
  High speed CR run mode 
   Main run mode 
   PLL run mode 
   Low speed CR run mode 
   Sub run mode 
 SLEEP modes 
  High speed...

 
1. Overview of Low Power Consumption Mode 
 
 Overview of RUN mode 
RUN mode is defined with a clock selected as a mast er clock. The base clocks, which are obtained by 
dividing the master clock frequency, are supplied to CPU clock, AHB bus clock, and APB bus clock to run 
the CPU, buses, and most peripherals.   
The source clock frequency can be changed dynamically. When not using the main or sub oscillator, the 
source clock oscillator can be stopped. 
RUN mode is divided into the following modes...

 
1. Overview of Low Power Consumption Mode 
 
 Overview of SLEEP mode 
SLEEP mode is classified as one of standby modes. SLEEP mode is used to stop CPU clocks. This causes 
the CPU to be stopped, reducing the power consumption. The resources connected to the AHB and APB bus 
clocks continue operations. 
SLEEP mode is divided into the following modes depe nding on the clock selected as a master clock. 
 High speed CR sleep mode 
When the high speed CR oscillator clock is selected as a master clock, the...

 
1. Overview of Low Power Consumption Mode 
 
 Overview of TIMER mode 
TIMER mode is classified as one of standby modes. TIMER mode is used to stop supplying a base clock. 
This causes the CPU clock, AHB bus clock, and all APB bus clocks to be stopped, reducing the power 
consumption. In this case, all functions are stopped, excluding the oscillators, PLL, hardware watchdog 
timer, watch counter, clock failure detector, and Low Voltage Detection Circuit. 
TIMER mode is divided into the following modes...

 
1. Overview of Low Power Consumption Mode 
 
 Overview of STOP mode 
STOP mode is classified as one of standby modes. ST OP mode is used to stop all oscillating operations. 
Enabling this mode stops all functions, excluding the Lo w Voltage Detection Circuit. This therefore allows 
data to be held with the minimum power consumption. 
  Relationships between CPU operation modes and consumption current 
values. 
Figure 1-1  shows the relationships between CPU operation modes and consumption current...