Fujitsu Series 3 Manual

   1. Overview  FUJITSU SEMICONDUCTOR LIMITED 
Chapter: USB  Clock Generati on 
FUJITSU SEMICONDUCTOR CONFIDENTIAL   2 
Chapter: USB Clock Generation 
This chapter explains USB clock generation.  
 
1.
 Overview 
2. Configuration and Block Diagram 
3. Explanation of Operation 
4. Setup Procedure Example 
5. Register List 
6. Usage Precautions 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
CODE: 9BFUSBPRE -E01. 2 
CHAPTER  20-1: USB Clock  Generation 
MN706-00002-1v0-E 
1055 
MB9Axxx/MB9Bxxx  Series  

   1. Overview  FUJITSU SEMICONDUCTOR LIMITED 
Chapter: USB  Clock Generation  
FUJITSU SEMICONDUCTOR CONFIDENTIAL   3 
1. Overview  
This section provides an overview of the USB operating clock.  
The USB clock runs at 48 MHz and is used by USB macro for commu nication. 
An external 48 MHz clock can be used for the USB clock, or a 48 MHz clock can be generated with USB 
PLL.  
The USB clock generation unit is responsible for the following functions:  
⋅   Enables or stops output of the USB clock.  
⋅...

   2. Configuration and Block Diagram  FUJITSU SEMICONDUCTOR LIMITED 
Chapter: USB  Clock Generation  
FUJITSU SEMICONDUCTOR CONFIDENTIAL   4 
2. Configuration and Block Diagram  
This section explains the configuration and block diagram of the USB operating clock 
generation unit. 
Figure 2-1 Block diagram of USB operating clock generation unit  
 
 Operating Clock Control Register (UPLLEN)  
⋅  The control register can enable oscillation.  
 Input Clock Select Register (UPINC)  
⋅  Be sure to select...

   3. Explanation of Operation  FUJITSU SEMICONDUCTOR LIMITED 
Chapter: USB  Clock Generation  
FUJITSU SEMICONDUCTOR CONFIDENTIAL   5 
3. Explanation of Operation  
This section explains the operation of the USB operating clock generation unit.  
 Selecting the USB operating clock  
The following two types of clocks can be selected for the USB operating clock.  
 Selecting the main clock  
Select the main clock to use the main oscillation clock (CLKMO) directly as the USB clock. In this case, 
CLKMO...

   3. Explanation of Operation  FUJITSU SEMICONDUCTOR LIMITED 
Chapter: USB  Clock Generation  
FUJITSU SEMICONDUCTOR CONFIDENTIAL   6 
 USB- PLL macro oscillation stabilization wait settings  
  Oscillation stabilization wait time for USB -PLL can be specified  
After the main clock oscillation has been stabilized, the oscillation stabilization wait time for USB -P LL 
begins to be counted.  
Before enabling the USB -PLL oscillation, configure the oscillation stabilization wait time for USB -P LL a nd...

   4. Setup Procedure Example  FUJITSU SEMICONDUCTOR LIMITED 
Chapter: USB  Clock Generation  
FUJITSU SEMICONDUCTOR CONFIDENTIAL   7 
4. Setup Procedure Example  
This section explains an example of setting up the USB operating clock generation unit.  
Figure 4-1 shows an example of setting up the USB operating clock.  
Figure 4-1 USB operating clock generation procedure  
Start the register settings
Set UCEN = 0
Read the UCCR Register
Set UPINC
Set UPOWT = 1
Set UPLLK
Set UPLLN
Set UPCSE = 0
Set UPCSC...

   5. Register List  FUJITSU SEMICONDUCTOR LIMITED 
Chapter: USB  Clock Generation  
FUJITSU SEMICONDUCTOR CONFIDENTIAL   8 
5.  Register List 
This section explains the register list of the USB operating clock generation unit.  
 The register list of the USB operating clock generation unit.  
 
Abbreviation Register name See 
UCCR USB Clock Control Register 5.1 
UPCR1 USB-PLL Control Register-1 5.2 
UPCR2 USB-PLL Control Register-2 5.3 
UPCR3 USB-PLL Control Register-3 5.4 
UPCR4 USB-PLL Control...

   5. Register List  FUJITSU SEMICONDUCTOR LIMITED 
Chapter: USB  Clock Generation  
FUJITSU SEMICONDUCTOR CONFIDENTIAL   9 
5.1.  USB Clock Setup Register (UCCR) 
The UCCR selects the USB clock and enables/disables the USB clock output.  
 Register configuration 
bit 7 6 5 4 3 2 1 0 
Field Reserved UCSEL UCEN 
Initial value - 1'b0 1'b0 
Attribute - R/W R/W 
 
  Register functions  
[bit  7:2] res: Reserved bits  
"0b000000" is read from these bits . 
Set these bits to...

   5. Register List  FUJITSU SEMICONDUCTOR LIMITED 
Chapter: USB  Clock Generation  
FUJITSU SEMICONDUCTOR CONFIDENTIAL   10 
5.2.  USB-PLL Control Register-1 (UPCR1) 
The UPCR1 sets PLL for USB.  
 Register configuration 
bit 7 6 5 4 3 2 1 0 
Field Reserved UPINC UPLLEN 
Attribute - R/W R/W 
Initial value - 1'b0 1'b0 
 
  Register functions  
[bit  7:2] res: Reserved bits  
"0b000000" is read from these bits.  
Set these bits to "0b 000000" when writing.  
[bit 1] UPINC: PLL...

   5. Register List  FUJITSU SEMICONDUCTOR LIMITED 
Chapter: USB  Clock Generation  
FUJITSU SEMICONDUCTOR CONFIDENTIAL   11 
5.3.  USB-PLL Control Register-2 (UPCR2) 
The UPCR2 sets the oscillation stability wait time of PLL macro for USB.  
 Register configuration 
bit 7 6 5 4 3 2 1 0 
Field Reserved UPOWT 
Attribute - R/W 
Initial value - 3'b000 
 
  Register functions  
[bit  7:3] res: Reserved bits  
"0b000000" is read from these bits.  
Set these bits to "0b000000" when...