Acer Extensa 610 Service Guide

							2-84Service GuideTable 2-14NS87336VJG Pin Descriptions (continued)PinNo.I/ODescription/MSEN0
/MSEN1
(Normal Mode)50, 49IMedia Sense.  These pins are Media Sense input pins when bit 0 of
FCR is 0.  Each pin has a 10 KW internal pull-up resistor.  When bit 0
of FCR is 1, these pins are Data Rate output pins and the pull-up
resistors are disabled./MSEN0
/MSEN1
(PPM Mode)86, 84IMedia Sense.  These pins gives additional Media Sense signals for
PPM Mode and PNF = 0./MTR0
/MTR1
(Normal Mode)44, 41OFDC Motor Select 0, 1.  These are the motor enable lines for drives 0
and 1, and are controlled by bits D7-D4 of the Digital Output register.
They are active low outputs.  They are encoded with information to
control four FDDs when bit 4 of the Function Enable Register (FER)
is set.  MTR0 exchanges logical motor values with MTR1 when bit 4
of FCR is set./MTR1
(PMM Mode)82OFDC Motor Select 1.  This pin offers an additional Motor Select 1
signal in PPM mode when PNF = 0.  This pin is the motor enable line
for drive 1 when bit 4 of FCR is 0.  It is the motor enable line for drive
0 when bit 4 of FCR 1.  This signal is active lowPD43OFDC Power Down.  This pin is PD output when bit 4 of PMC is 1.  It is
/DR1 when bit 4 of PMC is 0.  PD is active high whenever the FDC is
in power-down state, either via bit 6 of the DSR (or bit 3 of FER, or bit
0 of PTR), or via the mode command.PD0-792-89,
87-84I/OParallel Port Data.  These bidirectional pins transfer data to and from
the peripheral data bus and the parallel port Data Register.  These
pins have high current drive capability.PE81IParallel Port Paper End.  This input is set high by the printer when it
is out of paper.  This pin has a nominal 25 KW pull-down resistor
attached to it.PNF47IPrinter Not Floppy.  PNF is the Printer Not Floppy pin when bit 2 of
FCR is 1.  It selects the device which is connected to the PPM pins.
A parallel printer is connected when PNF = 1 and a floppy disk drive
is connected when PNF = 0.  This pin is the DRV2 input pin when bit
2 of FCR is 0./RD17IRead.  Active low input to signal a data read by the microprocessor./RDATA
(Normal Mode)33IFDD Read Data.  This input is the raw serial data read from the
floppy disk drive./RDATA
(PPM Mode)89IFDD Read Data.  This pin supports an additional Read Data signal in
PPM Mode when PNF = 0. 
						

							Major Chips Description2-85Table 2-14NS87336VJG Pin Descriptions (continued)PinNo.I/ODescription/RI1
/RI268, 60IUARTs Ring Indicator.  When low, this indicates that a telephone ring
signal has been received by the modem.  The /RI signal is a modem
status input whose condition is tested by the CPU by reading bit 6
(RI) of the Modem Status Register (MSR) for the appropriate serial
channel.  Bit 6 is the complement of the RI signal.  Bit 2 ( TERI) of
the MSR indicates whether the RI input has changed from low to high
since the previous reading of the MSR.
NOTE:  When the TERI bit of the MSR is set and Modem Status
interrupts are enabled, an interrupt is generated./RTS1
/RTS272, 64OUARTs Request to Send.  When low, this output indicates to the
modem or data set that the UART is ready to exchange data.  The
RTS signal can be set to an active low by programming bit 1 (RTS) of
the Modem Control Register to a high level.  A Master Reset
operation sets this signal to its inactive (high) state.  Loop mode
operation holds this signal to its inactive state.SIN1
SIN273, 65IUARTs Serial Input.  This input receives composite serial data from
the communications link (peripheral device, modem, or data set).SIRQ1
SIRQ2
SIRQ458,
49,
47ISystem interrupt 1, 2, and 3.  This input can be routed to one of the
following output pins: IRQ3-IRQ7, IRQ9-IRQ12.  SIRQ12 and
SIRQ13 can be also routed to IRQ15.  Software configuration
determines to which output pin the input pin is routed to.
SIRQ1 is multiplexed with IRQ15, SRIQ12 is multiplexed with
DRATE1/MSEN1/CS0, and SIRQ3 is multiplexed with
DRV2/PNF/DR23.SLCT80IParallel Port Select.  This input is set high by the printer when it is
selected.  This pin has a nominal 25 KW pull-down resistor attached
to it./SLIN79I/OParallel Port Select Input.  When this signal is low, it selects the
printer.  This pin is in a tristate condition 10 ns after a 0 is loaded into
the corresponding Control Register bit.  The system should pull this
pin high using a 4.7 KW resistor.SOUT1
SOUT271, 63OUARTs Serial Output.  This output sends composite serial data to the
communications link (peripheral device, modem, or data set).  The
SOUT signal is set to a marking state (logic 1) after a Master Reset
operation./STB93I/OParallel Port Data Strobe.  This output indicates to the printer that a
valid data is available at the printer port.  This pin is in a tristate
condition 10 ns after a 0 is loaded into the corresponding Control
Register bit.  The system should pull high using a 4.7 KW./STEP
(Normal Mode)38OFDC Step.  This output signal issues pulses to the disk drive at a
software programmable rate to move the head during a seek
operation./STEP
(PPM Mode)79OFDC Step.  This pin gives an additional step signal in PPM Mode
when PNF = 0. 
						

							2-86Service GuideTable 2-14NS87336VJG Pin Descriptions (continued)PinNo.I/ODescriptionTC4ITerminal Count.  Control signal from the DMA controller to indicate
the termination of a DMA transfer.  TC is accepted only when FDACK
is active.  TC is active high in PC-AT and Model 30 modes, and
active low in PS/2 mode./TRK0
(Normal Mode)35IFDC Track 0.  This input indicates the controller that the head of the
selected floppy disk drive is at track zero./TRK0
(PPM Mode)91IFDC Track 0.  This pin gives an additional Track 0 signal in PPM
Mode when PNF = 0.VDDB, C48, 97Power Supply.  This is the 3.3V/5V supply voltage for the
PC87332VJG circuitry.VSSB-E40, 7,
88, 59Ground.  This is the ground for the PC87332VJG circuitry./WAIT82IEPP Wait.  This signal is used in EPP mode by the parallel port
device to extend its access cycle.  It is an active low signal./WDATA
(Normal Mode)37OFDC Write Data.  This output is the write precompensated serial data
that is written to the selected floppy disk drive.  Precompensation is
software selectable./WDATA
(PPM Mode)81OFDC Write Data.  This pin provides an additional Write Data signal in
PPM Mode when PNF=0.  (See PE.)/WGATE
(Normal Mode)36OFDC Write Gate.  This output signal enables the write circuitry of the
selected disk drive.  WGATE has been designated to prevent glitches
during power-up and power-down.  This prevents writing to the disk
when power is cycled./WGATE
(PPM Mode)80OFDC Write Gate.  This pin gives an additional Write Gate signal in
PPM mode when PNF = 0./WP
(Normal Mode)34IFDC Write Protect.  This input indicates that the disk in the selected
drive is write protected./WP
(PPM Mode)90IFDC Write Protect.  This pin gives an additional Write Gate signal in
PPM mode when PNF = 0./WR16IWrite.  An active low input to signal a write from the microprocessor
to the controller./WRITE93OEPP Write Strobe.  This signal is used in EPP mode as write strobe.
It is active low.X1/OSC5ICrystal1/Clock.  One side of an external 24 MHz/48 MHz crystal is
attached here.  If a crystal is not used, a TTL or CMOS compatible
clock is connected to this pin.X26OCrystal 2.  One side of an external 24 MHz/48 MHz crystal is attached
here.  This pin is left unconnected if an external clock is used./ZWS1OZero Wait State.  This pin is the Zero Wait State open drain output
pin when bit 6 of FCR is 0.  ZWS is driven low when the EPP or ECP
is written, and the access can be shortened. 
						

							Major Chips Description2-872.8Yamaha YMF715 Audio Chip
YMF715-S (OPL3-SA3) is a single audio chip that integrates OPL3 and its DAC, 16 bit Sigma-
delta CODEC, MPU401 MIDI interface, joystick with timer, and a 3D enhanced controller including
all the analog components which is suitable for multi-media application. This LSI is fully compliant
with Plug and Play ISA 1.0a, and supports all the necessary features, i.e. 16 bit address decode,
more IRQs and DMAs in compliance with PC96. This LSI also supports the expandability, i.e.
Zoomed Video, Modem and CD-ROM interface in a Plug and Play manner, and power
management (power down, power save, partial power down, and suspend/resume) that is
indispensable with power-conscious application.
2.8.1Features
· Built-in OPL3
· Supports Sound Blaster Game compatibility
· Supports Windows Sound System compatibility
· Supports Plug & Play ISA 1.0a compatibility
· Full Duplex operation
· Built-in MPU401 Compatible MIDI I/O port
· Built-in Joystick
· Built-in the 3D enhanced controller including all the analog components
· Supports multi-purpose pin function (Support 16-bit address decode, DAC interface for OPL4-
ML, Zoomed Video port, EEPROM interface, MODEM interface, IDE CD-ROM interface)
·  Hardware and software master volume control
· Supports monaural input
· 24 mA 1TL bus drive capability
· Supports Power Management(power down, power save, partial power down, and
suspend/resume)..
· +5V/ +3.3V power supply for digital, 5V power supply for analog.
· 100 pin SQFP package (YMF715-S) 
						

							2-88Service Guide2.8.2Pin DiagramFigure 2-17YMF715 Block Diagram 
						

							Major Chips Description2-892.8.3Pin Descriptions
Table 2-15YMF715 DescriptionsPin namePinsI/OTypeSizeFunctionISA bus interface: 36 pinsD7-08I/OTTL24mAData BusAl 1-012ITTL2mAAddress BusAEN1ITTL2mAAddress Bus Enable/IOW1
ISchmitt4mAWrite Enable/IOR1ISchmitt4mARead EnableRESET1ISchmitt4mAResetIRQ3,5,7,9,10,116TTTL12mAInterrupt requestDRQ0,1,33TTTL12mADMA Request/DACK0, 1,33ITTL2mADMA AcknowledgeAnalog Input & Output : 24 sinsOUTL1O--Left mixed analog outputOUTR1O--Right mixed analog outputVREFI1I--Voltage reference inputVREFO1O--Voltage reference outputAUXILlI--Left AUX1 inputAUX1RlI--Right AUX1 inputAIJX2LlI--Left AUX2 inputAUX2R1I--Right AUX2 inputLINEL1I--Left LINE inputLINER1I--Right LINE inputMIC1I--MIC inputMIN1I--Monaural inputTRECL1---Left Treble capacitorTRECR1---Right Treble-capacitorSBFLTL1---Left SBDAC filterSBFLTR1---Right SBDAC filterSYNSHL1---Left SYNDAC sample / hold capacitorSYNSHR1---Right SYNDAC sample / hold capacitorADFLTL1---Left input filterADFLTR1---Right input filterVOCOL1O--Left voice outputVOCORIO--Right voice outputVOCIL1I--Left voice inputVOCIR1I--Right voice input 
						

							2-90Service GuideTable 2-15YMF715 Descriptions (Continued)Pin namePinsI/OTypeSizeFunctionMulti-purpose Dins: 13 pinsSEL2-03I+CMOS2mARefer to “Multi-purpose pins” sectionMP9-0l0I+/OTTL4mARefer to “multi-purpose pins” sectionOthers: 27 pinsGPO - GP34IA--Game PortGP4- GP74I+Schmitt2mAGame PortRXD1I+Schmitt2rnAMIDI Data ReceiveTXD1OTTL4mAMIDI Data Transfer/VOLUP1I+Schmitt2mAHardware Volume (Up)/VOLDWlI+Schmitt2mAHardware Volume (Down)X3311ICMOS2mA33.8688 MHzX33O1OCMOS2mA33.8688 MHzX24I1ICMOS2mA24.576 MHzX24O1OCMOS2mA24.576 MHzAVDD2---Analog Power Supply (put on +5.0V)DVDD3---Digital Power Supply (put on +5.0 V or
+3.3V)AVSS2---Analog GNDDVSS4---Digital GNDNote:I+:             Input Pin with Pull up Resistor
Schmitt:  TTL-Schmitt input pin
T:  TTL-tri-state output pin
O+:  Output Pin with Pull up Resistor 
						

							Major Chips Description2-912.9T62.062.C Battery Charger
2.9.1Overview
Ambit T62.062.C.00 charger is designed exclusively for TI Extensa 610 notebook computer as a
power management and battery charger module which can charge a 9 cells Nickel-Metal Hydride
(NiMH) or 9 cells with 3’s parallel and 3’s serial Lithium Ion(LIB) Battery pack. When charging the
NiMH battery , the determination of the battery full capacity for the charger is based on zero delta
Voltage (0 V), temperature increment gradient (T/t), minus delta voltage (-V) and maximum
voltage (Max. V). On the other hand, if charging the LIB battery, constant current and constant
voltage the typical LIB battery charging mode will be applied precisely. It is important to notice that
every battery pack to be used must have a built-in 103AT-2 NTC thermistor (maximum 70thermal
breaker included for NiMH battery). Otherwise, most of the charger functions so as to be failed.
The charger permits a soft charging of NiMH battery to full capacity whereas over-charging is well
protected. Fast charge begins with the application of the external AC adapter or the replacement
of a new plugged in battery whichever NiMH or LIB battery. For safety, at the beginning of
charging, battery will not be charged until its temperature within a certain interval and if start
voltage is lower than another certain value, the charger module provides trickle charge current to
charge the battery which prevents fast charging could possibly damage the battery. In addition,
maximum temperature protection and safe timer is provided during quick charge. To maintain the
capacity once the NiMH reaches full energy level, trickle charge current will be continuously
provided to the battery by the charger.
2.9.2Features
· Designed for charging a 9 cells Nickle-Metal Hydride Battery pack or 9 cells (3 parallel,
3 serial) Lithium- Ion Battery pack
· Providing the basic power management for the main system
· System off time selectable : 50mS (software) / 2.5S (hardware)
· Providing charging function whenever system in use power or not
· Providing battery protections by constantly monitoring temperature, voltage and charging
time
· Compact size & low cost
· Determination of a NiMH battery full capacity against over-charging based on
·       0 DV (disabled when system sharing the power with the charger during charging)
·       - DV (disabled when system sharing the power with the charger during charging)
·       DT/Dt ( 3o
c/3min )
·       Max. V ( charge NiMH:16.2v )
· Charging LIB battery following the constant current then constant voltage mode
· Providing battery safety protections by:
·       Trickle current when battery voltage being very low 
						

							2-92Service Guide·       Max. T
·       Safety charging timer
·       Battery temperature constantly monitoring
·       Over voltage protect 13V
· Providing low battery warning signals when the system using battery as the main power
source
2.9.3Absolute Maximum Ratings
Table 2-16T62.062.C Absolute Maximum Ratings TableParameterMaximum RatingsSupply voltage ( Adapter)0V to +24VOutput current3ATotal sink current of all O/P pin
(output pin to DC/DC not included)15mACharge current1.9AOperating temperature0 to 60Storage temperature-10 to 852.9.4Electrical Characteristics
Table 2-17T62.062.C Electrical Characteristics TableParameterSymbolConditionMINTYPMAXUNITS INPUTExternal AdapterAC power*Note 1192021VDisable(High)
(Low)
(Supply current)DisableDelay about 10 ms3.5
-
3005
-
-5.25
0.7
-V
V
uASystem in use power
(High)
(Low)
(Supply current)S.I.U.
4.0
-
15
-
-5.25
2.0
-V
V
mA 
						

							Major Chips Description2-93Table 2-17T62.062.C Electrical Characteristics Table (Continued)ParameterSymbolConditionMINTYPMAXUNITS OUTPUTAC Source input Signal
           (Voltage)
           (Supply current)AD5VAC source voltage >
8V4.555.25
10V
mABattery in use  (High)
          (Low)
          (Supply current)BAT-IN-USE#@I load=100uA2.755.25
0.7
100V
V
uAPower OutputDCBAT OUT--3ACharge Indicator
           (High)
           (Low)
           (Supply current)BT-QCHGQuick
3.5
-
-5
-
-5.25
0.8
100V
V
uABattery Low 1
           (High)
           (Low)
           (Supply Current)BL1#@I load=100uA
2.7
-
-5
-
-5.25
0.7
100V
V
uABattery Low 2
           (High)
           (Low)
           (Supply Current)BL2#@I load=100uA
2.7
-
-5
-
-5.25
0.7
100V
V
uA BATTERY LOW VOLTAGE WARNING SIGNALBattery Low 1   (NiMH)
                (LIB)@25
TC125PPM/10.53
 8.5010.70
 8.6510.86
 8.80  VBattery Low 2   (NiMH)
                (LIB)@25
TC125PPM/10.19
 8.0810.35
 8.2310.50
 8.38  VBattery Low 3   (NiMH)
                (LIB)@25
TC125PPM/ 9.07
 7.58 9.22
 7.73 9.36
 7.88  VCHARGE PARAMETERExternal Adapter
Charge currentSystem not in use
System in use1.8
0.581.9
0.652.0
0.72A
ADC OPERATION   (@25 Vin=10.8V)Total Module Current
 Consumption
( output pin not
included)System on
System off2.3
150mA
uA