Acer Extensa 610 Service Guide
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2-54Service GuideTable 2-10C&T 65550 Pin Descriptions (continued)Pin#Pin NameTypeDescriptionPower / Ground and Standby Control (continued)66 63 89DCC DGND DGNDVCC GND GNDPower / Ground (Bus Interface) 5V±10% or 3.3V±0.3V.158 161 142 139 108 105MVCCA MGNDA MVCCB MGNDB MVCCC MGNDCPower / Ground (Bus Interface) 5V±10% or 3.3V±0.3V.FLAT PANEL DISPLAY INTERFACE (CONFIGURATION BY PANEL TYPES)Table 2-11Flat Panel Display Interface ConfigurationsMonoMonoMonoColorColorColorColor STNColorColorColorColor65550SSDDDDTFTTFTTFT HRSTN SSSTN SSSTN DDSTN DDSTN DDPin#Pin Name8-bit8-bit16-bit9/12/16 bit18/24 bit18/24 bit8-bit (X4bP)16-bit (4bP)8-bit (4bP)16-bit (4bP)24 bit71P0-UD3UD7B0B0B00R1R1UR1UR0UR072P1-UD2UD6B1B1B01B1G1UG1UG0UG073P2-UD1UD5B2B2B02G2B1UB1UB0UB074P3-UD0UD4B3B3B03R3R2UR2UR1LR075P4-LD3UD3B4B4B10B3G2LR1LR0LG076P5-LD2UD2G0B5B11G4B2LG1LG0LB078P6-LD1UD1G1B6B12R5R3LB1LB0UR179P7-LD0UD0G2B7B13B5G3LR2LR1UG181P8P0-LD7G3G0G00SHFCLKUB3-UG1UB182P9P1-LD6G4G1G01-R4-UB1LR183P10P2-LD5G5G2G02-G4-UR2LG184P11P3-LD4R0G3G03-B4-UG2LB185P12P4-LD3R1G4G10-R5-LG1UR286P13P5-LD2R2G5G11-G5-LB1UG287P14P6-LD1R3G6G12-B5-LR2UB288P15P7-LD0R4G7G13-R6-LG2LR290P16----R0R00----LG291P17----R1R01----LB292P18----R2R02----UR393P19----R3R03----UG394P20----R4R10----UB395P21----R5R11----LR396P22----R6R12----LG397P23----R7R13----LB370SHFCLKSHFCLKSHFCLKSHFCLKSHFCLKSHFCLKSHFCLKSHFCLKSHFCLKSHFCLKSHFCLKSHFCLKPixels / Clock:88161122-2/35-1/32-2/35-1/38
Major Chips Description2-55BUS OUTPUT SIGNAL STATUS DURING STANDBY MODETable 2-12Bus Output Signal Status During Standby Mode65550 Pin#Signal NameSignal Status53ACTI / A26Driven Low54EBABKL / A27Driven Low24LRDY# / RDYTri-Stated25LDEV#Tri-Stated51-44, 41-40, 38-33D0-15Tri-Stated20-13, 8-1D16-31Tri-StatedS/TS stands for Sustained Tri-state. These signals are driven by only one device at a time are driven high for one clock before released, and are not driven for at least one cycle after being released by the previous device. A pull-up provided by the bus controller is used to maintain an inactive level between transactions.
2-56Service Guide2.6TI PCI1131 CardBus Controller 2.6.1Overview The PCI1131 is a bridge between the PCI local bus and two PC Card sockets supporting both 16- bit and 32-bit CardBus PC Cards, and is compliant with the PCI Local Bus Specification Revision 2.1 and PCMCIAs 1995 PCI Card Standard. The PCI 1131 PC Card interface recognizes and identifies PC Cards installed at power-up, run-time, and switches protocols automatically to accommodate 16-bit and 32-bit cards. Support for new 1 6-bit PC Card features such as multi- function cards, 3.3V cards, and DMA, as well as backward compatibility to the PCMCIA Release 2.1-compliant PC Cards are included in the PCI1131. CardBus cards operating at up to 33MHz and with a 32-bit data path offer higher performance, and the PCI1131 allows applications to take full advantage of this bandwidth. The PCI1131 core is powered at 3.3V to provide low power dissipation, but can independently support either 3.3V or 5V signaling on the PCI and PC Card interfaces. Host software interacts with the PCI1131 through a variety of internal registers which provide status and control information about the PC Cards currently in use, and the internal operation of the PCI1131 itself. These internal registers are accessed by application software either through the PCI Configuration header, or through E programmable windows mapped into PCI memory or l/O address space. The concept of windows is also user by the PCI1131 to pass cycles between PCI and PC Card address spaces, and host software must program the location and size of these windows when the PCI1131 or PC Card is initialized. The PCI1131 also communicates via a three-line serial protocol to he TI TPS2206 Dual PCMCIA Power Switch. The TPS2206 switches Vcc and Vpp supply voltage to the two PC Card sockets independently. Host software has indirect control over the TPS2206 by writing to internal PCI1131 registers. In order to prevent damage to low-voltage CardBus PC Cards, the PCI1131 will allow only valid Vcc settings to be applied to such cards.The TPS2206 is the follow-on device to the TPS2202. The PCI1131 will also interface with the TPS2202. The PCI1131 can notify the host system via interrupts when an event occurs which requires attention from the host. Such events are either card status change events (CSC) or functional interrupts from a PC Card. CSC events occur within the PCI1131 or at the PC Card interface, and indicate a change in the status of the socket (i.e., card insertion or removal). Functional interrupts are interrupts which originate from the PC Card application itself, and are passed from the card to the host system. Both CSC and functional interrupts may be individual masked and routed to a variety of system interrupts. The PCI1131 can signal the system interrupt controll via PCI-style interrupts, ISA IRQs, or with the Serialized IRQ protocol. The following sections describe in greater detail how the PCI1131 interacts at an electrical, protocol, and software level at its PCI, PC Card, TPS2206, and interrupt interfaces
Major Chips Description2-572.6.2Architecture The Texas Instruments PCI1131 is a high-performance PCI-to-PC Card controller that supports two independent PC Card sockets compliant with the1995 PC Card Standard. The PCI1131 provides a rich set of features which make it the best choice for bridging between PCI and PC Cards in both notebook and desktop computers. The 1995 PC Card Standard retains the 16-bit PC Card specification defined in PCMCIA Release 2.1, and defines the new 32-bit PC Card, called CardBus, capable of full 32-bit data transfers at 33 MHz. The PCI1131 supports any combination of 16-bit and CardBus PC Cards in its two sockets powered at 5V or 3.3V as required. The PCI1131 is compliant with the PCI Local Bus Specification Revision 2.1, and its PCI interface can act as either a PCI master device or a PCI slave device. The PCI bus mastering is initiated during 16-bit PC Card DMA transfers or CardBus PC Card bus mastering cycles. All card signals are internally buffered to allow hot insertion and removal without external buffering. The PCI1131 is register compatible with the Intel 82365SL-DF ExCA controller. The PCI1131 internal data-path logic allows the host to access 8-, 16-, and 32-bit cards using full 32-bit PCI cycles for maximum performance. Independent, 32-bit write buffers allow fast posted writes to improve system-bus utilization. An advanced CMOS process is used to achieve low system power consumption while operating at PCI clock rates up to 33 MHz. Several low-power modes allow the host power management system to further reduce power consumption.All unused PCI1131 pins should be pulled high with 43k ohm pull-up resistors. 2.6.3Features · 3.3-V Core Logic With Universal PCI Interface Compatible and 3.3-V or 5-V PCI Signaling Environments · Supports PCI Local Bus Specification 2.1 · Mix and Match 5W3.3V PC Card16 Cards and 3.3V CardBus Cards · Supports Two PC Card ™ or CardBus Slots With Hot Insertion and Removal · 1995 PC Card Standard Compliant · Advanced Submicron, Low-Power CMOS Technology · Uses Serial Interface to Tl TPS2206A Dual Power Switch · System Interrupts may be Programmed as PCI-style or ISA IRQ-style Interrupts · ISA IRQ interrupts may be Serialized onto a Single IRQSER Pin · Programmable Output Select for CLKRUN# · Supports Burst Transfers to Maximize Data Through put on the PCI and CardBus Bus
2-58Service Guide· Packaged in a 208-pin TQFP · Multi-function PCI Device with Separate Configuration Spaces for each Socket · Five PCI Memory Windows and Two l/O Windows Available to each PC Card16 Socket · Two l/O Windows and Two Memory Windows Available to each CardBus socket · CardBus Memory Windows can be Individually selected prefetchable or non-prefetchable · ExCA™-Compatible Registers Are Mapped in Memory andfilO Space · Texas Instruments (TI™) Extension Registers Mapped in the PCI Configuration Space · Intel™ 82365SL-DF Register Compatible · Supports 16-bit Distributed DMA on Both PC Card Sockets · Supports PC/PCI DMA on Both PC Card · Supports ZOOM Video Mode Sockets · Supports Ring Indicate
Major Chips Description2-592.6.4Block DiagramFigure 2-11Functional Block Diagram - 16-bit PC Card Interface
2-60Service GuideFigure 2-12Functional block diagram - CardBus Card Interface
Major Chips Description2-612.6.5Pin DiagramFigure 2-13PCI-to-PC Card (16-bit) terminal assignments
2-62Service GuideFigure 2-14PCI-to-CardBus terminal assignments
Major Chips Description2-632.6.6Terminal Functions Table 2-13PCI1131 Pin DescriptionsTERMINALNAME NO.I/OTYPEFUNCTIONPCI System Terminals PCLK 165IPCI Bus clock. The PCI bus clock provides timing for all transactions on the PCI bus. All PCI signals are sampled at the rising edge of PCLK.RSTIN 166IPCI Reset. When the RSTIN signal is asserted low it causes the PCI1131 to tri-state all output buffers and reset all internal registers. When asserted, the 1131 device is completely nonfunctional. After deasserting RSTIN, the PCI1131 is in its default state. When the 1131 SUSPEND mode is enabled, the device is protected from any RSTIn reset (i.e., the 1131 internal register contents are preserved).PCI Address and Data TerminalsAD31 170 AD30 171 AD29 173 AD28 174 AD27 176 AD26 177 AD25 178 AD24 179 AD23 183 AD22 184 AD21 185 AD20 186 AD19 188 AD18 189 AD17 190 AD16 191 AD15 204 AD14 205 AD13 206 AD12 208 AD11 1 AD10 2 AD9 3 AD8 4 AD7 6 AD6 8 AD5 9 AD4 10 AD3 11 AD2 12 AD1 14 AD0 15I/OAddress/data bus. These signals are the multiplexed PCI address and data bus. During the address phase of a PCI cycle, AD31-0 contain a 32- bits address or other destination information. During the data phase, AD31-0 contain data.