Mitel SX-200 DIGITAL Pabx Engineering Information Manual

							Engineering Information 
Universal card contaipns one 8 bit MC68121 CPU supported by 4 kbytes 
of EPROM, which formats and controls the routirig of data between the 
system PCM bus and the console. 
8.08 On each analog trunk circuit card is an MC6802 CPU with up to 
4k bytes of PROM that controls functions such as seizing and 
releasing trunk circuits. 
Digital Switching 
8.09 The SX-200@ DIGITAL PABX uses a specially developed very 
large scale integrated (VLSI) circuit to implement the analog- 
to-digital and digital-to-analog conversion functions. The basis of this 
encode/decode process is the MT8960 Integrated PCM FilterKodec 
(commonly known as a CODEC), which is used throughout the system 
to convert analog to PCM and PCM to analog. The CODEC combines a 
low pass filter and an analog-to-digital PCM encoder in the transmit 
direction (i.e., towards the SX-200@ DIGITAL PABX) and a digital- 
to-analog decoder and low pass filter in the receive direction (i.e., 
towards the peripheral). 
8.10 The PABX uses another specially developed VLSI circuit as its 
main PCM switching matrix element - the 8 link x 32 channel 
MT8980 Digital Time/Space Crosspoint Switch (DX Chip)-. The DX chip 
is arranged with eight incoming links and eight outgoing links; each 
link comprising 32 channels. Under control of the main CPU, any 
channel of the incoming links can be connected to any channel of the 
outgoing links. Thus, one DX chip is equivalent to a 65,536 (256 x 256) 
crosspoint array. This chip type forms the Circuit Switch and Peripheral 
Switch Matrices on the Main Control card, and forms part of the 
interface between the digital PCM links and the analog speech paths in 
the analog bays. 
Analog Switching 
8.11 The system uses an established LSI circuit to implement a 
space-division switching matrix in the analog bays. The basis of 
this space division is the 4-by-8 bit MT8804 Analog Switch Array, 
which is used throughout the analog bays to connect any one of the 
32 analog speech paths to any one (or more) extension or trunk 
circuit(s). 
Analog Bay Interface 
8.12 The task of connecting the 32 digital PCM channels from the 
digital DX network to the 32 analog speech paths (junctors) in 
the analog bays is pet-formed by the JIC (Junctor Interface Circuit). The 
JIG converts the 4-wire (separate transmit and receive) signals from 
the CODEC to 2-wire junctor signals. 
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							Engineering Information 
, 
CONTROLLER 
3 DATA LINKS 
7877R’IEl 
Figure 8-1 SX-200” DIGITAL PABX System Architecture (480-Port Configuration) 
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							Engineering Information 
- 
0,4Y 1 AND BAY 2 - - -- 
-- 
-- 
MAIN CONTROL CARD --- 
MAINTENANCE 
TO/FROM 
PERIPHERAL 
DEVICES 
8 
VOICAW’~TA 
8 VOICE/DATA 
CARDS 
I 
KAOlBORlEl 
Figure 8-2 SX-ZOO@ DIGITAL PABX System Architecture (338-Port Configuration) 
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							Engineering Information 
% RAM SPACE 
70 
KA0051ROEO 
KA0052ROEI 
Figure 8-3 Memory Availability V.S. Number of Programmed Devices 
% RAM SPACE 
I 10 15 20 
25 30 
DIGITS (x.1000) 
Figure 8-4 Memory Availability V.S. Number of Abbreviated Dial Digits 
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							Engineering Information 
% RAM SPACE 
50 
40 
30 
20 
10 
5 10 
15 20 
25 30 
ARS DIGITS h1000) 
KA0053ROEC 
Figure 8-5 Memory Availability V.S. Number of ARS Digits 
_ 
NUMBER OF LINE APPEARANCES 
NOTE: All programmable SUPERSET key appearances take up space 
(Direct trunk select. Private line. Direct he select. Key he. 
Multiple call line, Personal outgoing line). 
KAOOSOROEI 
Figure 8-6 Memory Availability V.S. Number of SUPERSET@ Key Appearances 
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							Engineering Information 
ACCOUNT CODE DIGITS (x10001 
KAOO44ROEO 
Figure 8-7 Memory Availability V.S. Number of Account Code Digits 
Main Control Card 
8.13 The Main Control card is the highest level in the intelligence 
hierarchy of the SX-200@ DIGITAL PABX. It contains the follow- 
ing: 
l 
l 
Message interface (HDLC).  68000 CPU 
EPROM containing system power-up routines 
Dynamic RAM 
Flop.py disk interface circuitry for two 5.25 inch drives 
Two communication Ports (UARTs) 
Digital Signal Processor for tone generation/detection and con- 
ferencing 
DX module containing the Circuit Switch Matrix and the Periph- 
eral Switch 
Circuit Switch L 
8.14 The circuit switch matrix provides a nonblocking switching ma- 
trix which, in conjunction with the peripheral switch, intercon- 
nects the digital peripherals (i.e., digital lines and digital trunks) and the 
links from the analog bays. The matrix comprises four DX chips ar- 
ranged in tandem such that the matrix has 16 receive links and 16 
transmit links. The function of each link is outlined in Table 8-l. As a 
nonblocking matrix, the circuit switch matrix is fully switchable; i.e., all 
incoming links have access to all outgoing links. 
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							Engineering information 
Peripheral Switch 
8.15 The purpose of the peripheral switch is to concentrate the 
circuit switch links from up to 12 digital peripheral cards (and 
18 links) on one side, down to the six links provided by the circuit 
switch matrix on the other side. Note that only Bays 1 and 2 are 
switched through the peripheral switch. The peripheral switch com- 
prises three DX chips; one concentrates Bay 2 and two concentrate 
Bay 1. 
Message Subsystem 
8.16 The function of the message subsystem is to facilitate the 
transfer of control messages and program loading between the 
main control processor and lower node processors such as Digital 
Interface cards, SUPERSET@ sets and consoles. This transfer of in- 
formation occurs over the PCM links of the Circuit Switch Matrix (see 
Table 8-l). The protocol used in the message system is based on the 
09 (Open Systems Interconnection) widely used HDLC (High Level 
Datalink Control) protocol format. 
Peripheral Interface Cards 
8.17 Peripheral interface cards provide an interface between the ter- 
minations of the SX-200@ DIGITAL PABX (i.e., lines and trunks) 
and the circuit switch. The card type depends upon the type of periph- 
eral interfaced to the system; i.e., an E&M Trunk card caters to E&M 
trunks only. 
8.18 The number of interface circuits that each card provides varies 
with the type, complexity, and space requirements of the circuit. 
A list of peripheral interface cards and the number of circuits on each 
is provided in Table 8-2. 
8.19 The basic operation of th.e digital peripheral cards in bays 1 and 
2 is controlled by signals received from the peripheral switch or 
the Main Control card. Digital peripheral cards in Bays 3 and 4 are 
controlled by the Main Control card and Bay Control card. Operation of 
the analog peripheral cards is controlled by the Main Control card in 
conjunction with the Peripheral Control card and Digital Interface card 
in the associated cabinet. The clocks provided by the Main Control 
card for the digital peripheral cards and the Digital Interface cards are 
as follows: 
(a) Frame Pulse. This signal synchronizes the start of a PCM frame 
which consists of a complete sequence of 32 channels. It oc- 
curs every 125 microseconds. 
(b) 244 ns Clock (C244+). The positive going edge of each clock 
pulse is used to generate channel counting. 
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							Engineering Information 
TABLE 8-1 
SX-200@ PCM CIRCUIT SWITCH LINK ASSIGNMENTS 
iDLC message system 
Digital Signal Processor link 
Bay 3 voice link (lower shelf), ringing 
reference 
Bay 3 voice link (upper shelf), message 
link (HDLC) 
Bay 3 voice link (shared) 
Bay 4 voice link (lower shelf), ringing 
reference 
Bay 4 voice link (upper shelf), message 
link (HDLC) 
Bay 4 voice link (shared) 
Bay 1 voice link (lower shelf) 
Bay 1 voice link (lower shelf) 
Bay 1 voice link (upper shelf) 
Bay 1 voice link (upper shelf) 
Bay 2 voice link (shared) 
Bay 2 voice link (shared) 
dial tone, filter, codec, Bays 1 and 2 
ringing reference Digital Signal Processor link 
Bay 3 voice link 
Bay 3 message link (HDLC) 
Bay 4 voice link 
Bays 4 & 5 message link 
Bay 5 voice link 
Bay 1 voice link (lower shelf) 
Bay 1 voice link (lower shelf) 
Bay 1 voice link (upper shelf) 
Bay 1 voice link (upper shelf) 
Bay 2 voice link (shared) 
Bay 2 voice link (shared) 
dial tone, filter, codec, Bays 4 and 2 
ringing reference 
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							Engineering information 
TABLE 8-2 
PERIPHERAL INTERFACE CARDS 
control-over-voic 
Speech Path Accessing - Digital 
8.20 For each digital peripheral interface card, there are 1.5 PCM 
links allocated, connecting it to the circuit switch-matrix on the 
Main Control card. Under control of the Main Control card (via the 
message subsystem), the transmit and receive channels of an originat- 
ing circuit can be connected to the receive and transmit channels of 
any other circuit through the circuit switch matrix. See Appendix A for 
further details. 
Speech Path Accessing - Analog 
8.21 
Each speech path is directly wired to an MT88Q4 on each 
analog line and analog trunk circuit card in the system. Under 
control of the Peripheral Control card, any speech path may be con- 
nected to any of the circuits on the card. This is illustrated in Figure 
8-8. See Appendix A for further details. 
Dynamic RAM Allocation 
8.22 The SX-ZOO@ DIGITAL PABX has approximately 105 kbytes of 
memory space available for Customer Data Entry (CDE) pro- 
gramming. The most taxing of this CDE programming, in terms of 
dynamic memory usage, is; the number of devices (lines, trunks, etc.), 
ARS digit strings, account codes, abbreviated dial digit strings, and 
SUPERSET@ set key appearances. It is necessary therefore, to make 
trade-offs between these categories to best allocate the available RAM 
space. This can easily be done using the graphs in Figures 8-3 through 
8-7. 
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							Engineering Information 
LINE CARD 
NUMBER 1 
006 
EQUIPMENT 
NUMBER 0 
00s 1713ROE  1 
2 
3 
L-4 -5 
El= 6 
7 
e 8 
9 
10 
11 
- 
16 
17 
18 
19 
24 
25 
26 
29 
29 
30 
MUSIC 
ON HOLD SPEECH 
PATHS 
Figure 8-8 Analog Speech Paths 
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