Samsung Exynos 5 User Manual

Samsung Confidential  
Exynos 5250_UM 14 Serial Peripheral Interface 
 14-17  
14.5.1.10 SWAP_CFGn (n = 0 to 4) 
 Base Address: 0x12D2_0000 (SPI0) 
 Base Address: 0x12D3_0000 (SPI1) 
 Base Address: 0x12D4_0000 (SPI2) 
 Base Address: 0x131A_0000 (ISP-SPI0) 
 Base Address: 0x131B_0000 (ISP-SPI1) 
 Address = Base Address + 0x0028, Reset Value = 0x0 
Name Bit Type Description Reset Value 
RX_HWORD_SWAP [7] RW 0 = Off      
1 = Swap 0 
RX_BYTE_SW AP [6] RW 0 = Off        
1 = Swap 0 
RX_BIT_SW AP [5] RW...

Samsung Confidential  
Exynos 5250_UM 14 Serial Peripheral Interface 
 14-18  
14.5.1.11 FB_CLK_SELn (n = 0 to 4) 
 Base Address: 0x12D2_0000 (SPI0) 
 Base Address: 0x12D3_0000 (SPI1) 
 Base Address: 0x12D4_0000 (SPI2) 
 Base Address: 0x131A_0000 (ISP-SPI0) 
 Base Address: 0x131B_0000 (ISP-SPI1) 
 Address = Base Address + 0x002C, Reset Value = 0x0 
Name Bit Type Description Reset Value 
FB_CLK_SEL [1:0] RW 
In master mode, SPI uses a clock which is 
feedback from the SPICLK. The feedback clock is...

Samsung Confidential  
Exynos 5250_UM 15 Display Controller 
 15-1  
15 Display Controller 
15.1 Overview 
The display controller consists of logic to transfer image data from a local bus or a video buffer (located in system 
memory) to an internal LCD driver interface. The LCD driver interface supp15-1orts three kinds of interfaces: 
 RGB interface 
 Indirect-i80 interface 
 YUV interface for write-back  
NOTE: RGB interface and Indirect-i80 interface are not connected to LCD driver directly. They...

Samsung Confidential  
Exynos 5250_UM 15 Display Controller 
 15-2  
15.2 Features 
Features of the display controller are: 
Table 15-1 describes the features of display controller. 
Table 15-1   Features of the Display Controller 
Bus Interface AMBA AXI 64-bit Master/AHB 32-bit Slave 
Local Video Bus (YCbCr/RGB) 
Video Output Interface 
RGB Interface (24-bit Parallel) (Not used in Exynos 5250) 
Indirect i80 interface (Not used in Exynos 5250) 
Write-back interface (YUV444 24-bit) 
Dual Output Mode...

Samsung Confidential  
Exynos 5250_UM 15 Display Controller 
 15-3  
Transparent Overlay Supports Transparent Overlay 
Color Key (Chroma Key) Supports Color Key function 
Supports color key and blending function simultaneously 
Image Enhancement Supports color gain control 
 
  

Samsung Confidential  
Exynos 5250_UM 15 Display Controller 
 15-4  
15.3 Functional Description of Display Controller 
15.3.1 Sub-Block 
The display controller consists of:  
 VSFR: To configure the display controller, the VSFR contains i80 command register set (12 registers) and five 
256  32 palette memories.  
 VDMA: It is a dedicated display DMA that transfers video data in frame memory to VPRCS. By using this 
DMA, you can display video data on screen without CPU intervention. 
 VPRCS: It...

Samsung Confidential  
Exynos 5250_UM 15 Display Controller 
 15-5  
Figure 15-2 illustrates the data flow from system bus to output buffer. 
 
    Figure 15-2   Block Diagram of the Data Flow 
 Local Path 0
(YUV/RGB)
Local Path 1
(YUV/RGB)
Local Path 2
(YUV/RGB)
LIMITERLIMITERLIMITER
CSCCSCCSC
WIN0 (RGB)WIN1 (RGB)WIN2 (RGB)WIN3 (RGB)WIN4 (RGB)
BlendingColor Keying
BlendingColor Keying
BlendingColor Keying
BlendingColor Keying
Color Gain (RGB)
AXI
RGBe
YUV 444/ RGB888YUV 444/ RGB888YUV 444/ RGB888...

Samsung Confidential  
Exynos 5250_UM 15 Display Controller 
 15-6  
15.3.2.1 Interface 
The display controller supports three types of interfaces: 
 Conventional RGB: It uses RGB data, vertical/horizontal sync, data valid signal, and data sync clock. 
 Indirect i80: It uses address, data, chip select, read/ write control, and register/status indicating signal. The 
LCD driver using i80 Interface contains a frame buffer and can self-refresh, so the display controller updates 
one still image by writing...

Samsung Confidential  
Exynos 5250_UM 15 Display Controller 
 15-7  
15.3.3 Color Data  
15.3.3.1 RGB Data Format 
The display controller requests for the specified memory format of frame buffer.  
These tables describe examples of each display mode: 
 
15.3.3.1.1 25-bpp Display (A888) 
 
NOTE:  
1. AEN = specifies the transparency selection bit 
  AEN: 0 = selects ALPHA0 
  AEN: 1 = selects ALPHA1 
  When the per-pixel blending is set, it blends with the alpha value that AEN selects. 
  SFR selects the...

Samsung Confidential  
Exynos 5250_UM 15 Display Controller 
 15-8  
15.3.3.1.2 32-bpp (8888) Mode  
Pixel data contains alpha value. 
 
 
  000H
008H
010H
…
D[63:56]D[55:32]
ALPHA valueP1
ALPHA valueP3
ALPHA valueP5
( BYSWP=0, HWSWP=0, WSWP=0 )
( BYSWP=0, HWSWP=0, WSWP=1 )
ALPHA valueP2
ALPHA valueP4
ALPHA valueP6
D[31:24]D[23:0]
000H
008H
010H
…
ALPHA valueP2
ALPHA valueP4
ALPHA valueP6
ALPHA valueP1
ALPHA valueP3
ALPHA valueP5
D[63:56]D[55:32]D[31:24]D[23:0]