Samsung Exynos 5 User Manual
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Page 781
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-39 15.3.8 VTIME Controller VTIME comprises of two blocks, namely: VTIME_RGB_TV for RGB timing control VTIME_I80 for indirect i80 interface timing control 15.3.8.1 RGB Interface Controller VTIME generates control signals for the RGB interface: RGB_VSYNC RGB_HSYNC RGB_VDEN RGB_VCLK These control signals configure the VIDTCON0/1/2 registers in the VSFR register. The VTIME module generates programmable control...
Page 782
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-40 Table 15-6 describes the relation 16-bpp between VCLK and CLKVAL. Table 15-6 Relation 16-bpp between VCLK and CLKVAL (TFT, Frequency of Video Clock Source = 300 MHz) CLKVAL 300 MHz/X VCLK 2 300 MHz/3 100.0 MHz 3 300 MHz/4 75.0 MHz : : : 63 300 MHz/64 4.6875 MHz VSYNC, VBPD, VFPD, HSYNC, HBPD, HFPD, HOZVAL, and LINEVAL configure RGB_HSYNC and RGB_VSYNC signal. The frame rate is the frequency of RGB_VSYNC. The frame rate...
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Samsung Confidential Exynos 5250_UM 15 Display Controller 15-41 15.3.8.2 I80 Interface Controller VTIME_I80 controls display controller for CPU style LDI. It has the following functions: Generates I80 Interface Control Signals CPU style LDI Command Control Timing Control for VDMA and VDPRCS 15.3.8.3 Output Control Signal Generation VTIME_I80 generates SYS_CS0, SYS_CS1, SYS_WE, and SYS_RS control signals (For Timing Diagram, refer to Figure 15-19). Their timing parameters,...
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Samsung Confidential Exynos 5250_UM 15 Display Controller 15-42 15.3.9 Setting of Commands 15.3.9.1 Normal Command To execute Normal command, follow these steps: Put commands into LDI_CMD0 to 11 (maximum 12 commands). Set CMDx_EN in LDI_CMDCON0 to enable normal command (For example, if you want to enable command 4, you have to set CMD4_EN to 0x01). Set NORMAL_CMD_ST in I80IFCONB0/1. The display controller has the following characteristics for command operations: Normal command mode...
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Samsung Confidential Exynos 5250_UM 15 Display Controller 15-43 15.3.9.1.1 Indirect I80 Interface Trigger VTIME_I80 starts its operation when a software trigger occurs. There are two kinds of triggers. However, software trigger is generated by setting TRGCON SFR. 15.3.9.2 Interrupt Completion of one frame generates Frame Done Interrupt. 15.3.9.2.1 Indirect I80 Interface Output Mode The following table shows the output mode of Indirect i80 interface based on mode @ VIDCON0. Table 15-7...
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Samsung Confidential Exynos 5250_UM 15 Display Controller 15-44 15.3.10 Virtual Display The display controller supports horizontal or vertical scrolling of the hardware. When the screen scrolls, you should change values of LCDBASEU and LCDBASEL (refer to Figure 15-16 for more information). However, do not change the values of PAGEWIDTH and OFFSIZE. The size of video buffer that stores the image should be larger than the screen of the LCD panel. Figure 15-16 illustrates an example of scrolling...
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Samsung Confidential Exynos 5250_UM 15 Display Controller 15-45 15.3.11 RGB Interface Specification 15.3.11.1 Signals Table 15-8 describes the RGB I/F signal. Table 15-8 RGB I/F Signal Description Signal Input/Output Description LCD_HSYNC Output (Internal I/F) Horizontal Sync. Signal LCD_VSYNC Output (Internal I/F) Vertical Sync. Signal LCD_VCLK Output (Internal I/F) LCD Video Clock LCD_VDEN Output (Internal I/F) Data Enable LCD_VD[23:0] Output (Internal I/F) YCbCr Data Output...
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Samsung Confidential Exynos 5250_UM 15 Display Controller 15-46 15.3.11.3 Parallel Output (Internal I/F) This section describes general 24-bit output 15.3.11.3.1 General 24-bit Output Figure 15-18 illustrates the RGB interface timing (RGB parallel). Figure 15-18 RGB Interface Timing (RGB Parallel) InValid DataInvalid Data RGB_HSYNC RGB_VCLK RGB_DATA [23:16] RGB_VDEN HACTHFHBHS 1 Line Display N M R0 G0B0 Image data N M Image SourceOutput Parallel (general) R0 G0B0 InValid...
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Samsung Confidential Exynos 5250_UM 15 Display Controller 15-47 15.3.12 LCD Indirect i80 System Interface 15.3.12.1 Signals Signal Input/Output Description SYS_VD[17:0] Input/Output (Internal I/F) Video Data SYS_CS0 Output (Internal I/F) Chip select for LCD0 SYS_CS1 Output (Internal I/F) Chip select for LCD1 SYS_WE Output (Internal I/F) Write enable SYS_OE Output (Internal I/F) Output enable SYS_RS/SYS_ADD[0] Output (Internal I/F) Address Output SYS_ADD[0] is Register/ State select NOTE:...
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Samsung Confidential Exynos 5250_UM 15 Display Controller 15-48 15.3.12.2 Indirect i80 System Interface WRITE Cycle Timing Figure 15-19 Indirect i80 System Interface WRITE Cycle Timing LCD_CS_SETUP+1 LCD_WR_SETUP+1 LCD_WR_ACT+1 LCD_WR_HOLD+1 VCLK(internal) SYS_RS SYS_CSn SYS_WE SYS_VD LCD_CS_SETUP=0,LCD_WR_SETUP=0,LCD_WR_ACT=0,LCD_WR_HOLD=0
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