Samsung Exynos 5 User Manual
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Page 791
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-49 15.4 Programmers Model 15.4.1 Overview Registers to configure the display controller: 1. VIDCON0: Configures video output format and displays enable/disable 2. VIDCON1: Specifies the RGB I/F control signal 3. VIDCON2: Specifies the output data format control 4. VIDCON3: Specifies the image enhancement control 5. I80IFCONx: Specifies CPU interface control signal. 6. VIDTCONx: Configures video output timing and determines the...
Page 792
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-50 15.5 Register Description 15.5.1 Register Map Summary Base Address: 0x1440_0000 Register Offset Description Reset Value MIXER Registers VIDCON0 0x0000 Specifies the video control 0 register 0x0000_0000 VIDCON2 0x0008 Specifies the video control 2 register 0x0000_0000 VIDCON3 0x000C Specifies the video control 3 register 0x0000_0000 WINCON0 0x0020 Specifies the window control 0 register 0x0000_0000 WINCON1 0x0024 Specifies...
Page 793
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-51 Register Offset Description Reset Value VIDW02ADD0B0 0x00B0 Specifies the window 2 buffer start address register, buffer 0 0x0000_0000 VIDW02ADD0B1 0x00B4 Specifies the window 2 buffer start address register, buffer 1 0x0000_0000 VIDW02ADD0B2 0x20B0 Specifies the window 2 buffer start address register, buffer 2 0x0000_0000 VIDW03ADD0B0 0x00B8 Specifies the window 3 buffer start address register, buffer 0 0x0000_0000 VIDW03ADD0B1...
Page 794
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-52 Register Offset Description Reset Value W4KEYCON0 0x0158 Specifies the color key control register 0x0000_0000 W4KEYCON1 0x015C Specifies the color key value (transparent value) register 0x0000_0000 W1KEYALPHA 0x0160 Specifies the color key alpha value register 0x0000_0000 W2KEYALPHA 0x0164 Specifies the color key alpha value register 0x0000_0000 W3KEYALPHA 0x0168 Specifies the color key alpha value register 0x0000_0000 W4KEYALPHA...
Page 795
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-53 Register Offset Description Reset Value SHD_VIDW03ADD 0 0x40B8 Specifies the window 3 buffer start address register (shadow) 0x0000_0000 SHD_VIDW04ADD 0 0x40C0 Specifies the window 4 buffer start address register (shadow) 0x0000_0000 SHD_VIDW00ADD 1 0x40D0 Specifies the window 0 buffer end address register (shadow) 0x0000_0000 SHD_VIDW01ADD 1 0x40D8 Specifies the window 1 buffer end address register (shadow) 0x0000_0000...
Page 796
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-54 Base Address: 0x1440_0000 Register Start Offset End Offset Description Reset Value Palette Memory (PalRam) Win0 alRam 0x2400 0x27FC Specifies 0 to 255 entry palette data Undefined Win1 alRam 0x2800 0x2BFC Specifies 0 to 255 entry palette data Undefined Win2 alRam 0x2C00 0x2FFC Specifies 0 to 255 entry palette data Undefined Win3 alRam 0x3000 0x33FC Specifies 0 to 255 entry palette data Undefined Win4 alRam 0x3400 0x37FC...
Page 797
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-55 Register Offset Description Reset Value LDI_CMD1 0x0284 Specifies i80 interface LDI command 1. 0x0000_0000 LDI_CMD2 0x0288 Specifies i80 interface LDI command 2. 0x0000_0000 LDI_CMD3 0x028C Specifies i80 interface LDI command 3. 0x0000_0000 LDI_CMD4 0x0290 Specifies i80 interface LDI command 4. 0x0000_0000 LDI_CMD5 0x0294 Specifies i80 interface LDI command 5. 0x0000_0000 LDI_CMD6 0x0298 Specifies i80 interface LDI command 6....
Page 798
![Page 798
Samsung Confidential
Exynos 5250_UM 15 Display Controller
15-56
15.5.2 MIXER Register
15.5.2.1 VIDCON0
Base Address: 0x1440_0000
Address = Base Address + 0x0000, Reset Value = 0x0000_0000
Name Bit Type Description Reset Value
RSVD [31] –=Reserved (should be 0)=0=
I80_EN=[30]=–=
bnables=I80 interface.==
0 = Disables=
1 = Enables (i80 24-bit data=interface, SYS_ADD[1])=
0=
RSVD=[29:17]=–=Reserved (should be 0)=0=
CLKVALUP=[16]=RW=
Selects the CLKVAL_F update timing control.=
0 = Always=
1 =...](http://img.usermanuals.tech/thumb/66/99535/w300_exynos-5-user-manual-1509363421_d-797.png "Page 798
Samsung Confidential
Exynos 5250_UM 15 Display Controller
15-56
15.5.2 MIXER Register
15.5.2.1 VIDCON0
Base Address: 0x1440_0000
Address = Base Address + 0x0000, Reset Value = 0x0000_0000
Name Bit Type Description Reset Value
RSVD [31] –=Reserved (should be 0)=0=
I80_EN=[30]=–=
bnables=I80 interface.==
0 = Disables=
1 = Enables (i80 24-bit data=interface, SYS_ADD[1])=
0=
RSVD=[29:17]=–=Reserved (should be 0)=0=
CLKVALUP=[16]=RW=
Selects the CLKVAL_F update timing control.=
0 = Always=
1 =...")
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-56 15.5.2 MIXER Register 15.5.2.1 VIDCON0 Base Address: 0x1440_0000 Address = Base Address + 0x0000, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31] –=Reserved (should be 0)=0= I80_EN=[30]=–= bnables=I80 interface.== 0 = Disables= 1 = Enables (i80 24-bit data=interface, SYS_ADD[1])= 0= RSVD=[29:17]=–=Reserved (should be 0)=0= CLKVALUP=[16]=RW= Selects the CLKVAL_F update timing control.= 0 = Always= 1 =...
Page 799
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-57 controller without a reset.
Page 800
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Samsung Confidential
Exynos 5250_UM 15 Display Controller
15-58
15.5.2.2 VIDCON2
Base Address: 0x1440_0000
Address = Base Address + 0x0008, Reset Value = 0x0000_0000
Name Bit Type Description Reset Value
RSVD [31:14] –=Reserved(should=be 0)=0=
TVFORMATSEi=x13:12]=RW=
Specifies the output format of YUV data.=
00== Reserved= = = ==
01 = Reserved=
1x== YUV444=
0=
oSVa=[11:9]=–=Reserved=0=
OrgYCbCr=x8]=RW=
Specifies the order of YUV data.=
0 = Y-CbCr==
1 = CbCr-Y =
0=
YUVOrd=x7]=RW=
Specifies...](http://img.usermanuals.tech/thumb/66/99535/w300_exynos-5-user-manual-1509363421_d-799.png "Page 800
Samsung Confidential
Exynos 5250_UM 15 Display Controller
15-58
15.5.2.2 VIDCON2
Base Address: 0x1440_0000
Address = Base Address + 0x0008, Reset Value = 0x0000_0000
Name Bit Type Description Reset Value
RSVD [31:14] –=Reserved(should=be 0)=0=
TVFORMATSEi=x13:12]=RW=
Specifies the output format of YUV data.=
00== Reserved= = = ==
01 = Reserved=
1x== YUV444=
0=
oSVa=[11:9]=–=Reserved=0=
OrgYCbCr=x8]=RW=
Specifies the order of YUV data.=
0 = Y-CbCr==
1 = CbCr-Y =
0=
YUVOrd=x7]=RW=
Specifies...")
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-58 15.5.2.2 VIDCON2 Base Address: 0x1440_0000 Address = Base Address + 0x0008, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:14] –=Reserved(should=be 0)=0= TVFORMATSEi=x13:12]=RW= Specifies the output format of YUV data.= 00== Reserved= = = == 01 = Reserved= 1x== YUV444= 0= oSVa=[11:9]=–=Reserved=0= OrgYCbCr=x8]=RW= Specifies the order of YUV data.= 0 = Y-CbCr== 1 = CbCr-Y = 0= YUVOrd=x7]=RW= Specifies...
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