Acer Travelmate 7100 Service Guide
Have a look at the manual Acer Travelmate 7100 Service Guide online for free. It’s possible to download the document as PDF or print. UserManuals.tech offer 720 Acer manuals and user’s guides for free. Share the user manual or guide on Facebook, Twitter or Google+.
1-28Service Guide3. CD-ROM Reset [pin-U13 of U21(PX3_CDRST#) of PIIX4]. The reset pin is used to assert the hard reset needed for the CD-ROM during power up. The reset pin is asserted before CD-ROM power up and is deasserted after CD-ROM power up and before the buffer is enabled. · Floppy The floppy has two components involved in the process. The floppy drive and the controller imbedded in the 87338 super I/O chip. The FDC enable/disabled function is controlled by 87338 chip. In power saving mode, there are following condition happened to floppy drive: 1. External pin tri-state. Enabled whenever the floppy is turned off. This control signal is same to CD-ROM buffer enable pin[pin-M3 of U21(PX3_FDDBEN) of PIIX4], please see CD-ROM portion for details. 2. PLL disabled. Disabled whenever the floppy and both serial channels are inactive or disabled. 3. FDC power disable. Disables the active decode of the floppy unit. This control signal is same to CD-ROM power control[pin-T14 of U21(PX3_CD/FDPON) of PIIX4], please see CD-ROM portion for details. · Video The video controller has two interfaces for controlling power consumption. The sleep mode is controlled by software and is performed by BIOS calls. The suspend operation is controlled by a PX3_VDPD signal (pin-N1 of PIIX4). The video timer is not controlled or retriggered by video activity. Instead, the timer is retriggered by PS/2 mouse and keyboard activity. · Serial port The serial port is a UART1 and is contained within the 87368 super I/O chip. The UART1 operates off of a 14 MHz clock. The serial port also has a transceiver, a MAX211. Therefore, there are several steps to the power conservation of the serial port as below: 1. Disable the UART1 decode in the 87338 chip. 2. Tri-state the UART1 output pins. 3. Assert the Power Down pin[pin M4(PX3_SPPD#) of PIIX4] on the MAX3243 chip.The MAX3243 pin25-PX3-SPPD# of MAX3243 chip will still pass through the Ring Indicate signal even while in the power down mode(if the Resume On Modem Ring in BIOS Setup is set to enabled). . 4. Disable the 14MHz clock (If the floppy and the SIR are also disabled).If the 14MHz is disabled through the 87336 power down mode, then all serial and floppy functions will fail.
System Introduction1-29Recovery from power down is the opposite procedure. · SIR (UART) The FIR port is basically UART2. The UART operates off of a 14MHz clock. The IR port has a DA converter. The UART2 disable control circuit is within the 87338 chip. 1. Tri-state the UART2 output pins. 2. Disable the 14MHz clock (If the floppy and the serial port are also disabled).If the 14MHz is disabled through the National power down mode, then all serial and floppy functions will fail. Recovery from power down is the opposite procedure. · Parallel port Since there are no clock operations on the parallel port, the requirement to power down this area of the 87338 chip are less critical. Also, if the floppy is operated through the parallel port, the parallel port must be enabled to allow operation to continue. 1. Disable the parallel port decode. · · PCMCIA Thermal MD3_ATFINT# of U3(LM75 in media Board) · Modem Modem power enable. This pin[pin-43(SM5_MODPON#) of SMC] will control the power to all of the modem chips. Once powered down, the modem chip set has no means of recovery except through full software initialization.
1-30Service Guide· · CPU The CPU clock. The clock to the CPU can be physically stopped. The chip is static, so the current state is retained. During a clock stop state, the CPU is stopped and the internal cache and external bus signals are inoperative. Therefore, any bus master or DMA activity is halted as well. CPU thermal alarm. Thermal alarm is signaled by the assertion of the one control pin [pin4 of U7(PT3_ATFZNT#) from MMO module], will trigger a lower speed operation through clock throttling while the CPU temperature is higher than 80°C, shut down the system while higher than 95°C. The system returned to normal condition while the CPU temperature is lower to 75°C. · System The system can also be put into a low power state. However, this state can only be performed after the individually power managed components have achieved their low power state. The state where the system is put into lower power mode is termed static suspend (suspend-to- memory). System thermal alarm. System thermal rating is obtained by the a thermal sensor aside charger and signaled by the pin-64(SM5_THERM_SYS) of SMC. Full charge to battery is only available when the system temperature is less than 56°C while trickle charge higher than 58°C. System shutdown will be automatically executed while temperature is higher than 85°C. 1.6.7.3 Suspend There are two forms of suspend and resume on the notebook, static suspend(suspend-to-memory) and zero-volt suspend(suspend-to-disk). Zero-volt suspend is, as the name implies, an OFF condition. The entire computer state is saved to a disk file and the computer is turned off. In static suspend, all components are placed into an idle state and the clocks are stopped to the entire machine, except for the 32 kHz clock for memory refresh. In either case, all separate components in the system are put into their lowest power state at the start of either suspend process. 1. Devices turned off. The HDD(except for suspend-to-disk since the file goes there), CD-ROM, floppy are turned off at the start of any suspend. 2. Devices brought to a low power state. The audio, serial port transceiver (MAX213), FIR, keyboard controller, PCMCIA controller chip will be put into a low power state instantly through a pin asserting or prematurely expiring the device timer. 3. Devices zero-clocked. Since the remainder of the devices (video, CPU, IDE controller, ISA bus, 87338’s devices (serial and floppy)) are, by design, static devices, their lowest power states are achieved by removing the clock to the device. The very act of going into a suspend-to-memory means that the enable pin to the clock generator chip is deasserted, removing all but the 32 kHz signal from the board. This excludes, however, the clocks dedicated to the internal modem. They will remained powered and oscillating.
System Introduction1-31For suspend-to-disk, all devices are read, saved to local memory and the local memory, video memory are saved to a disk file which is created by SLEEP MANAGER utility. The machine is then commanded to an off state. · Resume events for zero-volt suspend(suspend-to-disk) The only resume event for zero-volt suspend is the raising of the lid of the computer. This electronically enables the power to the rest of the machine. · Resume events for static suspend (suspend-to-memory) 1.Resume on schedule. In BIOS Setup, this time field can be enabled then set to any value. It is possible to set it for a date and time in the past. In this case, the unit will resume at the next occurrence of the specified time, date ignorant. If a proper future date is specified, then the resume will only happen long enough to evaluate the date and the machine will re-suspend. After a successful resume has taken place, the resume on schedule field will automatically disable. . Enabling of this field will disable the suspend-to-disk function, except for battery very low. The auto-disable of resume on schedule still allows the unit to suspend to disk at the next occurrence of a suspend condition with the lid closed. 2.Lid switch. If the suspend-to-disk option is used, then the lid switch will turn the unit on, reboot and then resume to the application at the end of POST. If the suspend-to- memory option is in place, or a suspend-to-disk block is present, then the lid switch opening will resume the machine. 3.Keystroke. Any key use on the internal keyboard will wake up the system from static suspend. In addition, a keystroke from an external keyboard on the primary PS/2 port will also wake the system up. Mouse motion from any source will not wake the system up. 4.Battery very low. The SMC will wake the SMI if the battery reaches a very low condition during static suspend. 1.6.8 CPU Module Table 1-16CPU Module SpecificationsItemSpecificationCPU TypeTillamook-200,233PackageTCPModule replaceableYesWorking speed66MHzCPU voltage2.5V I/O and 1.8V core interfaceCache SRAM size512KBRemark: include North bridge(MTXC), voltage regulator and thermal sensor
1-32Service Guide1.6.9 BIOS Table 1-17BIOS SpecificationsItemSpecificationBIOS programming vendorAcerBIOS versionV3.0BIOS ROM typeIntel 28F002, Flash ROM with boot block protectionBIOS ROM size256KBBIOS ROM package type40-pin TSOPSame BIOS for TFT LCD typeYesBoot from CD-ROM featureYesSupport protocolPCI V2.1, APM V1.1, E-IDE and PnP(ESCD format) V1.0aBIOS flash security protectionProvide boot-block protection1 feature.Unlock BIOS featureIf user changes the BIOS Setup setting and causes the system cannot boot, press š before system turns-on till POST completed, then system will load BIOS Setup the default settings.1.6.10 System Memory Table 1-18System Memory SpecificationsItemSpecificationSIMM data bus width64-bitSIMM package144-pin, Small Outline Dual-In-line-Memory-Module (soDIMM)SIMM size8MB, 16MB, 32MB, 64MBSIMM speed60nsSIMM voltage3.3VSDRAM can be mixed with EDOYes 1 Boot-block is an area inside of BIOS with the program for system boot. Avoid this area to be modified while BIOS flash, then system still can boot even the BIOS flash process is not successful.
System Introduction1-331.6.10.1 SIMM Memory Combination List Table 1-19SIMM Memory Combination ListRAM SizeBank ABank B8MB8MB0MB8MB0MB8MB16MB8MB8MB16MB16MB0MB16MB0MB16MB24MB8MB16MB24MB16MB8MB32MB16MB16MB32MB32MB0MB32MB0MB32MB40MB8MB32MB40MB32MB8MB48MB16MB32MB48MB32MB16MB64MB32MB32MB64MB64MB0MB64MB0MB64MB72MB8MB64MB72MB64MB8MB82MB16MB64MB82MB64MB16MB96MB32MB64MB96MB64MB32MB128MB64MB64MB1.6.11 Video Memory Table 1-20Video Memory SpecificationItemSpecificationMemory size1.984MBMemory locationInside of graphic controller NMG2160
1-34Service Guide1.6.12 Video Display Modes Table 1-21Video Display SpecificationItemSpecificationChip vendorNeoMagicChip nameNMG2160Chip voltage3.3 VoltsZV port support (Y/N)YesGraph interface (ISA/VESA/PCI)PCI busMax. resolution (LCD)800x600 (16M colors) True ColorMax. resolution (Ext. CRT)1024x768 (64K colors) High Color1.6.12.1 External CRT Resolution Modes Table 1-22External CRT Resolution ModesResolution x Coloron Ext. CRTCRT Refresh RateSimultaneous onTFT LCDCRT onlySimultaneousSVGA640x480x25660,75,8560Y640x480x64K60,75,8560Y640x480x16M60,75,8560Y800x600x25660,75,8560Y800x600x64K60,75,8560Y800x600x16M60,75,8560Y1024x768x2566060Y1024x768x16M60,75,8560Y1.6.12.2 LCD Resolution Modes Table 1-23LCD Resolution ModesResolution x color on LCD onlySVGA TFT LCD640x480x256Y640x480x64KY640x480x16MY800x600x256Y800x600x64KY800x600x16MY1024x768x256Y1024x768x64KY
System Introduction1-351.6.13 Audio Table 1-24Audio SpecificationsItemSpecificationChipsetNeomagic-3097Audio onboard or optionalBuilt-inMono or stereostereoResolution16-bitCompatibilitySound Blaster Game, Windows Sound System, Plug&Play ISA 1.0aMusic synthesizer20-voice, 72 operator, FM music synthesizerMixed sound sourcesVoice, Synthesizer, Line-in, Microphone, CDVoice channel8-/16-bit, mono/stereoMPU1 -401 UART supportYesInternal microphoneYesInternal speakerYesInternal speaker enabled/disabled functionBy BIOS SetupMicrophone jackYes, left sideHeadphone jackYes, left sideSound Blaster PRO V3.01CompatibilityBase address (by BIOS Setup)220h / 230h / 240h / 250hMPU address (by BIOS Setup)300h / 310h / 320h / 330hIRQ setting (auto-allocation)IRQ10/ 9/ 7/ 5DMA channel (auto-allocation)DRQ0/ 1/ 31.6.14 PCMCIA Table 1-25PCMCIA SpecificationsItemSpecificationChipsetCirrus Logic CL-PD6832Supported card typeType-II / Type-III (include CardBus Card)Number of slotsTwo Type-II or one Type-IIIAccess locationLeft sideZV port supportYes 1 MPU-401 is a Roland MIDI standard that most game software use for audio.
1-36Service Guide1.6.15 Parallel Port Table 1-26Parallel Port SpecificationsItemSpecificationNumber of parallel ports1ECP/EPP supportYes (by BIOS Setup)ECP DMA channel (by BIOS Setup)DRQ1 or DRQ3Connector type25-pin D-typeConnector locationRear sideSelectable parallel port (by BIOS Setup)Parallel 1 (378h, IRQ7) or Parallel 2 (3BCh, IRQ7) or Parallel 3 (278h, IRQ5) or Disabled1.6.16 Serial Port Table 1-27Serial Port SpecificationsItemSpecificationNumber of serial ports116550 UART supportYesConnector type9-pin D-typeConnector locationRear sideSelectable serial port (by BIOS Setup)Serial 1 (3F8h, IRQ4) or Serial 2 (2F8h, IRQ3) or Serial 3 (3E8h, IRQ4) or Serial 4 (2E8h, IRQ3) or Disabled1.6.17 Touchpad Table 1-28Touchpad SpecificationsItemSpecificationVendor & model nameSynaptics TM1202SCPower supply voltage5VLocationPalm-rest centerInternal & external pointing device work simultaneouslyNoExternal pointing device (serial or PS/2 mouse) hot plugYes, (if it is enabled in BIOS Setup already)X/Y position resolution500 points/inchInterfacePS/2 (compatible with Microsoft mouse driver)
System Introduction1-371.6.18 SIR/FIR Table 1-29SIR/FIR SpecificationsItemSpecificationVendor & model nameIBM(31T1100A)Input power supply voltage5 VTransfer data rate115.2 Kbit/s(Max)(SIR)~4 Mbit/s(FIR)(Max)Transfer distance100cmCompatible standardIrDA (Infrared Data Association)Output data signal voltage level Active Non-active0.5 Vcc-0.5Angle of operation ±15°Number of IrDA ports116550 UART supportYesSIR locationRear sideSelectable serial port (by BIOS Setup)2F8h, IRQ3 or Disabled1.6.19 LCD Table 1-30LCD SpecificationsItemSpecificationVendor & Model NameIBM ITSV50D1Mechanical SpecificationsDiagonal LCD display area12.1”Display technologyTFTResolutionSVGA (800x600)Supported colors262,144 colorsOptical SpecificationContrast ratio100 (typ.)Brightness (cd/m2 )70 (typ.)Brightness controlkeyboard hotkeyContrast controlnoneElectrical SpecificationSupply voltage for LCD display3.3 (typ.)Supply voltage for LCD backlight (Vrms)1500 (typ.)