NEC Neax 2400 Imx System Operations And Maintenance Manual
Here you can view all the pages of manual NEC Neax 2400 Imx System Operations And Maintenance Manual. The NEC manuals for Communications System are available online for free. You can easily download all the documents as PDF.
Page 81
CHAPTER 3 NDA-24238 Pag e 5 4 Revision 3.0 SYSTEM MESSAGES This message displays when link information cannot be written into the switch memory of the TSW card in one of the dual systems. ➀TSW system in which a fault is detected ➁ Status at the time of fault detection ➂ Data Analyzed by NEC Engineers Reference: See Chapter 5, Section 5.4, for the repair procedure. 1: XXXX XXXX XXXX XXXX 2: 0000 0000 0000 0000 3: 0000 0000 0000 0000 ➀ ➁ ➂ 4: 0000 0000 0000 0000 5: 0000 0000 0000 0000 6: 0000 0000 0000...
Page 82
NDA-24238 CHAPTER 3 Page 55 Revision 3.0 SYSTEM MESSAGES This message displays when the link information cannot be written into the switch memory of the TSW in both systems. ➀TSW system in which a fault is detected ➁ ➂ Data Analyzed by NEC Engineers Reference: See Chapter 5, Section 5.2 and Section 6.2, for the repair procedure. 1: XXXX XXXX XXXX XXXX 2: 0000 0000 0000 0000 3: 0000 0000 0000 0000 ➀ ➁ ➂ 4: 0000 0000 0000 0000 5: 0000 0000 0000 0000 6: 0000 0000 0000 0000 7: 0000 0000 0000 0000 8: 0000...
Page 83
CHAPTER 3 NDA-24238 Pag e 5 6 Revision 3.0 SYSTEM MESSAGES This message displays when the link information cannot be written into the switch memory of the TSW card in one of the dual systems. ➀TSW system in which a fault is detected ➁ Status at the time of fault detection ➂ Data Analyzed by NEC Engineers Reference: See Chapter 5, Section 5.2, Section 5.4, and Section 6.2, for the repair procedure. 1: XXXX XXXX XXXX XXXX 2: 0000 0000 0000 0000 3: 0000 0000 0000 0000 ➀ ➁ ➂ 4: 0000 0000 0000 0000 5: 0000...
Page 84
NDA-24238 CHAPTER 3 Page 57 Revision 3.0 SYSTEM MESSAGES This message displays when the system detects a clock failure, such as TSW internal clock down or Frame Head down, in both systems. ➀TSW card in which a fault is detected ➁ Clock status of No. 0 TSW ➂ Clock status of No. 1 TSW Note:Refer to the meaning of ➁. Reference: See Chapter 5, Section 5.3, for the repair procedure. 1: XXXX XX00 0000 0000 2: 0000 0000 0000 0000 3: 0000 0000 0000 0000 ➀ ➁ ➂ 4: 0000 0000 0000 0000 5: 0000 0000 0000 0000 6:...
Page 85
CHAPTER 3 NDA-24238 Pag e 5 8 Revision 3.0 SYSTEM MESSAGES This message displays when the system detects a clock failure, such as TSW internal clock down or Frame Head down, in one of the dual systems. ➀TSW card in which a fault is detected ➁ Clock status of No. 0 TSW ➂ Clock status of No. 1 TSW Note:Refer to the meaning of ➁. Reference: See Chapter 5, Section 5.4, for the repair procedure. 1: XXXX XX00 0000 0000 2: 0000 0000 0000 0000 3: 0000 0000 0000 0000 ➀ ➁ ➂ 4: 0000 0000 0000 0000 5: 0000 0000...
Page 86
NDA-24238 CHAPTER 3 Page 59 Revision 3.0 SYSTEM MESSAGES This message displays when the system detects a fault, such as input clock all down or output clock down in the PLO cards, at both sides. ➀ Detected PLO number ➁ Valid Information bit for Scan Data 1 ➂ Valid Information bit for Scan Data 2 Reference: See Chapter 4, Section 2.3.2 and Section 2.3.4, for the circuit card replacement procedure. 1: XXXX XXXX XX00 0000 2: 0000 0000 0000 0000 3: 0000 0000 0000 0000 ➀ ➁ ➂ ➃ ➄ 4: 0000 0000 0000 0000 5:...
Page 87
CHAPTER 3 NDA-24238 Pag e 6 0 Revision 3.0 SYSTEM MESSAGES ➃ Scan Data 1: Current Status of PLO card ➄ Scan Data 2: Current Status of PLO card b7 b6 b5 b4 b3 b2 b1 b0 b7 b4 b1 b0 b0: Clock status at time of detection 0/1 = STBY/ACT b1: Circuit Card status at time of detection 0/1 = PLO synchronizing/PLO self running or drift abnormal b2: 0/1 = -/Input clock down b3, b4: Route of Input clock b5: 0/1 = -/PLO input all down b6: 0/1 = -/PLO output down b7: 0/1 = -/Drifting b4b3DCS Input RouteRoute Of...
Page 88
NDA-24238 CHAPTER 3 Page 61 Revision 3.0 SYSTEM MESSAGES This message displays when the system detects all the failures concerned with input clock down or output clock down in the PLO card at the ACT side. When this message is indicated, the PLO card changeover executes. Note:The No. 0 PLO card automatically changes over to No. 1. The changeover of No. 1 to No. 0 is not automatic. ➀ Self-CPU Restart Information ➁ Valid Information bit for Scan Data 1 ➂ Valid Information bit for Scan Data 2 Reference:...
Page 89
CHAPTER 3 NDA-24238 Pag e 6 2 Revision 3.0 SYSTEM MESSAGES ➃ Scan Data 1: Status of PLO card ➄ Scan Data: Status of PLO card b7 b6 b5 b4 b3 b2 b1 b0 b7 b4 b1 b0 b0: Clock status at time of detection 0/1 = STBY/ACT b1: Circuit card at time of detection 0/1 = PLO synchronizing/PLO self running or drifting b2: 0/1 = -/Input clock down b3, b4: Route of Input clock b5: 0/1 = -/PLO input all down b6: 0/1 = -/PLO output down b7: 0/1 = -/Drifting b4b3DCS Input RouteRoute Of Input Clock 00 0 0 01 1 1 10 - 2 11 -...
Page 90
NDA-24238 CHAPTER 3 Page 63 Revision 3.0 SYSTEM MESSAGES This message displays when a fault of the speech path system has occurred in a specific Module Group. The specific Module Group is placed into make-busy state. ➀ MG number of fault detection ➁ Kind of failure ➂ Speech Path/Clock System Reference: See Chapter 4, Section 2.3.2, for the circuit card replacement procedure. 1: XXXX XX00 0000 0000 2: 0000 0000 0000 0000 3: 0000 0000 0000 0000 ➀ ➁ ➂ 4: 0000 0000 0000 0000 5: 0000 0000 0000 0000 6: 0000...