Acer Extensa 390 Service Guide

							Date:   August  5, 1997Sheet   23of   23
SizeDocument NumberREV
A396183SD
Title
390 ACERNOTE LIGHT      PORT REPLICATOR ACER TAIPEI TAIWAN R.O.C
33
181818 14,15,23 14,15,23
14 14
3
1818
18 14,15,2314 14
14
  1  3  5  7  9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99101103105107109111113115117119
 2 4 6 8101214161820222426283032343638404244464850525456586062646668707274767880828486889092949698100102104106108110112114116118120
CN5
BERG-CONN120  12
R229
100R3   12R221
100R3
PDCD1#
PSTROB#PAUTOFD#PPD0PERROR#PPD1PINIT#PPD2
NTSC/PAL#OP_HP_INLINE_OUT_LLINE_IN_LMIC_INLINE_OUT_RLINE_IN_R
TV_EN
$STANDBY#DOCK_IN1#
DOCK+5VDOCK+5V3BUFFER_EN
10
22
DC_IN10
10
1013 13
14,15,23 14,15,23
14,15,23
1414
14
14 14
1414 15
EXT_FDD_SMI#
MSCLKMSDATAKBCLKKBDATA
PSLCTIN#PPD3PPD4PPD5PPD6PPD7PACK#PBUSYPPEPSLCTPRI1#PDTR1#PCTS1#PSOUT1#PRTS1#PSIN1PDSR1#RDATA#WRTPRT#TRK0#
$DOCK_R$DOCK_GDOCK_DDC_DATADOCK_HSYNCDOCK_VSYNC$DOCK_B
$VGA14M
DC_INDC_IN8
1410
1013,22 13,22
14,15,23 14,15,23
1414
14 14
14
C240
SCD1UC241
SC1KP1
2
RX26
47KR3
DOCK+5V
3,4,163,16 14
14
14 1414
10 10 14
  12
R212
100KR3GND   1
IN   2
IN   3EN#  4OUT 8
OUT 7
OUT 6
OUT 5
U15
TPS2013D
C250
SCD1U
1
2
C244
ST10U16VBM USBPWR1
+5V
3,4,163 14
14
14
14
14
  12R166
47KR3
C188
SCD1U  9
 8 1
4
7
U8D
SSHCT14
  12D4
S1N4148  5 6 1
4
7
U8C
SSHCT14
$USBP01$USBP00
WGATE#HDSEL#STEP#FDIR#WDATA#DSKCHG#MTR1#DR1#INDEX#DOCK_VSW1DOCK_DDC_CLKDOCK_VSW3USB_OUT/IN
3MODE#
+5V+5V
CRT_GND
3
10
16  12R55
100R3
  12
R43
100R3
USBPWR1
EXT_FDD_5V_ON
USBPWR1
DOCK_IN2# DOCK_OK
 12
 1311 1
4
7
U40D
SSHCT32  12R277
1KR3
  12
R146
1KR31
2
R147
100KR3 1
2R278
100KR3
DOCK_IN2# DOCK_IN1#
+5V
+5V+5V
  3 4 1
4
7
U8B
SSHCT14   12R167
100KR3
C191
SCD1U
C110
SCD1U  12D14
S1N4148
DOCK_IN_SMI#DOCK_OK
+5VNEAR 120 PIN CONN
NEAR TP2013
31
2
C32
ST4D7U
DOCK_IN_SMI# 
						

							A  p  A  p  p  e  n  d    p  e  n  d   i  x     E  i  x     E
BIOS POST CheckpointsBIOS POST CheckpointsE-1This appendix lists the POST checkpoints of the notebook BIOS.
Table E-1POST Checkpoint ListCheckpointDescription04h
· Dispatch Shutdown Path
Note:At the beginning of POST, port 64 bit 2 (8042 system flag) is read to determine
whether this POST is caused by a cold or warm boot.  If it is a cold boot, a
complete POST is performed.  If it is a warm boot, the chip initialization and
memory test is eliminated from the POST routine.08h
· Reset PIE, AIE, UIE
Note:These interrupts are disabled in order to avoid any incorrect actions from
happening during the POST routine.09h
· Initialize m15310Ah
· Initialize m1533
· Initialize m710110h
· DMA(8237) testing & initialization14h
· System Timer(8254) testing & initialization18h
· DRAM refresh cycle testing
· Set default SS:SP= 0:4001Ch
· CMOS shutdown byte test, battery, and check sum
Note:Several parts of the POST routine require the system to be in protected mode.
When returning to real mode from protected mode, the processor is reset,
therefore POST is re-entered.  In order to prevent re-initialization of the system,
POST reads the shutdown code stored in location 0Fh in CMOS RAM.  Then it
jumps around the initialization procedure to the appropriate entry point.
The CMOS shutdown byte verification assures that CMOS 0Fh area is fine to
execute POST properly.
· Initialize default CMOS setting if CMOS bad
· Initialize RTC time base
Note:The RTC has an embedded oscillator that generates a 32.768 KHz frequency.  To
initialize the RTC time base, turn on this oscillator and set a divisor to 32768 so
that the RTC can count time correctly1Dh, 1Eh
· DRAM type determination2Ch
· 128K base memory testing
· Set default SS:SP= 0:400
Note:The 128K base memory area is tested for POST execution.  The remaining
memory area is tested later. 
						

							E-2Service GuideTable E-1POST Checkpoint ListCheckpointDescription20h
· KB controller(8041/8042) testing
· KB type determination
· Write default command byte upon KB type24h
· PIC(8259) testing & initialization30h
· System Shadow RAM34h
· DRAM sizing3Ch
· Initialize interrupt vectors4Bh
· Identify CPU brand and type35h
· PCI pass 040h
· Assign I/O if device request41h
· Assign Memory if device requested44h
· Assign IRQ if device request45h
· Enable command byte if device is OK50h
· Initialize Video display52h
· Download keyboard matrix4Ch
· ChipUp initialization for CPU clock checking54h
· Process VGA shadow region58h
· Set POST screen mode(Graphic or Text)
· Display Acer(or OEM) logo if necessary
· Display Acer copyright message if necessary
· Display BIOS serial number59h
· Hook int vector 1ch for POST quiet boot5Ch
· Memory testing5Ah
· SMRAM test and SMI handler initialization4Eh
· Audio initialization60h
· External Cache sizing
· External Cache testing(SRAM & Controller)
· Enable internal cache if necessary
· Enable external cache if necessary64h
· Reset KB device
· Check KB status
Note:The keyboard LEDs should flash once.7Ch
· Reset pointing device
· Check pointing device70h
· Parallel port testing74h
· Serial port testing78h
· Math Coprocessor testing 
						

							BIOS POST CheckpointsE-3 Table E-1POST Checkpoint ListCheckpointDescription80h
· Set security status84h
· KB device initialization
· Enable KB device6Ch
· FDD testing & parameter table setup
Note:The FDD LED should flash once and its head should be positioned88h
· HDD testing & parameter table setup89h
· Get CPU MUX
Note:This routine is to identify the user-set CPU frequency, not CPU-required frequency90h
· Display POST status if necessary93h
· Rehook int1c for quiet boot94h
· Initialize I/O ROMA4h
· Initialize security featureA8h
· Setup SMI parametersA0h
· Initialize Timer counter for DOS useACh
· Enable NMI
· Enable parity checking
· Set video modeB0h
· Power-on password checking
· Display configuration table
· Clear memory buffer used for POST
· Select boot device