Acer Extensa 390 Service Guide

							Major Chips Description2-45 Table 2-5M1533 Numerical Pin ListNo.NameTypeNo.NameTypeR20GPO13/IRQ1OOV7LA22I/OR19GPO14/IRQ12OOT7LA23I/OR18GPO15/IRQ0OM19LBJIR17GPO16APICCSJOM20LIDIR16GPO17/APICGNTJOK16LLBJIP17GPO18/BIOSA16OV6M16JI/OP16GPO19/BIOSA17OW9MEMRJI/OTable 2-5M1533 Numerical Pin ListNo.NameTypeNo.NameTypeNo.NameTypeT10MEMWJI/OV5SA2I/OA11SIDED10I/OK4MSCLK/GPI11OY4SA3I/OD12SIDED11I/OK5MSDATA/IRQ12II/OW4SA4I/OB12SIDED12I/OF18NMIOV4SA5I/OE13SIDED13I/OM4NOWSJIY3SA6I/OC13SIDED14I/OU6OSC14MIW3SA7I/OA13SIDED15I/ON19OSC32KIIV3SA8I/OA14SIDEAKJON18OSC32KIIIW2SA9I/OE14SIDEDRQIN20OSC32KOOV2SA10I/OB14SIDERDYID6PARI/OW1SA11I/OC14SIDEIORJOE10PCICLKIU1SA12I/OD14SIDEIOWJOD4PCIRSTJOT2SA13I/ON16SIRQIIC10PHLDAJIR2SA14I/ON17SIRQIIIB10PHOLDJOR4SA15I/OH19SMBCLKI/OD19PIDEA0OP1SA16I/OH18SMBDATAI/OD18PIDEA1OP3SA17ON3SMEMRJOD20PIDEA2OP5SA18ON5SMEMWJOE18PIDECS1JON2SA19OF19SMIJOE19PIDECS3JOW6SBHEJI/OV13SPKROC20PIDED0I/OM2SD0/GPIO0I/OW13SPLEDOC18PIDED1I/OM3SD1/GPIO1I/OA5STOPJI/OB19PIDED2I/OM5SD2/GPIO2I/OH17STPCLKJOA18PIDED3I/OL1SD3/GPIO3I/OL17SUSTAT1JOC17PIDED4I/OL3SD4/GPIO4I/OV1SYSCLKOC16PIDED5I/OK1SD5/GPIO5I/OU5TCOA16PIDED6I/OK3SD6/GPIO6I/OY16THRMJIE16PIDED7I/OJ1SD7/GPIO7I/OC5TRDYJI/O 
						

							2-46Service GuideTable 2-5M1533 Numerical Pin ListNo.NameTypeNo.NameTypeNo.NameTypeD16PIDED8I/OV10SD8I/OF1USBCLKIB16PIDED9I/OY10SD9I/OG2USBP0+I/OA17PIDED10I/OU11SD10I/OG1USBP0-I/OB17PIDED11I/OW11SD11I/OH2USBP1+I/OD17PIDED12I/OU12SD12I/OH1USBP1-I/OB18PIDED13I/OV12SD13I/OF14VCCPB20PIDED14I/OW12SD14I/OF15VCCPC19PIDED15I/OY12SD15I/OF6VCCPE17PIDEAKJOE6SERRJIG15VCCPG16PIDEDRQIW16SETUPJIG6VCCPG17PIDEIORJOD15SIDEA0OP6VCCPF16PIDEIOWJOE15SIDEA1OP15VCCPF17PIDERDYIC15SIDEA2OR14VCCPM16PWGIB15SIDECS1JOR15VCCPL18PWRBTNJIA15SIDECS3JOR7VCCPT1REFSHJI/OB13SIDED0I/OR6VDD5PH20RIID13SIDED1I/ON15VDD5SPT12ROMKBCSJOA12SIDED2I/OU14XD0I/OM18RSMRSTJIC12SIDED3I/OV14XD1I/OJ2RSTDRVOE12SIDED4I/OW14XD2I/OT13RTCASOB11SIDED5I/OY14XD3I/OU13RTCDSOD11SIDED6I/OU15XD4I/OT14RTCRWOA10SIDED7I/OV15XD5I/OY5SA0I/OE11SIDED8I/OW15XD6I/OW5SA1I/OC11SIDED9I/OY15XD7I/O 
						

							Major Chips Description2-47 2.3 FDC37C672
The FDC37C672 is a 100-pin enhanced super l/O controller with Fast IR.
2.3.1 Features
· 5 Volt Operation
· PC97 Compliant
· ISA Plug and Play Compatible Register Set
· Intelligent Auto Power Management
· Shadowed Write-only Registers for ACPI Compliance
· System Management Interrupt, Watchdog Timer
· 2.88MB Super l/O Floppy Disk Controller
· Licensed CMOS 765B Floppy Disk Controller
· Software and Register Compatible with SMCs Proprietary 82077AA Compatible Core
· Supports Two Floppy Drives Directly
· Configurable Open Drain/Push-pull Output Drivers
· Supports Vertical Recording Format
· 16yte Data FIFO
· 100% IBM2 Compatibility
· Detects All Overrun and Underrun Conditions
· Sophisticated Power Control Circuitry {PCC} Including Multiple Power-down Modes for
Reduced Power Consumption
· DMA Enable Logic
· Data Rate and Drive Control Registers
· 480 Address, Up to Eight IRQ and Three DMA Options
· Floppy Disk Available on Parallel Port Pins
· Enhanced Digital Data Separator
· 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates
· Programmable Precompensation Modes
· Keyboard Controller
· 8042 Software Compatible
· 8it Microcomputer
· 2k Bytes of Program ROM
· 256 Bytes of Data RAM 
						

							2-48Service Guide· Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface
· Asynchronous Access to Two Data Registers and One Status Register
· Supports Interrupt and Polling Access
· 8it Counter Timer
· Port 92 Support
· 8042 P12 and P16 Outputs
· Serial Ports
· Two Full Function Serial Ports
· High Speed NS16C550 Compatible UARTs with Send/Receive 16yte FlFOs
· Supports 230k and 460k Baud Programmable Baud Rate Generator Modem Control
Circuitry
· 480 Address and Eight IRQ Options
· Infrared Port
· Multiprotocol Infrared Interface
· 128yte Data FIFO
· IrDA 1.1 Compliant
· TEMIC/HP Module Support * Consumer IR
· SHARP ASK IR
· 480 Address, Up to Eight IRQ and Three DMA Options
· Multi-modeä Parallel Port with ChiProtectä
· Standard Mode IBM PC/XTâ
 PC/ATâ
, and PS/2ä^ Compatible Bidirectional Parallel Port
· Enhanced Parallel Port {EPP) Compatible EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant)
· IEEE 1284 Compliant Enhanced Capabilities Port (ECP)
· ChiProtect Circuitry for Protection Against Damage Due to Printer Power-on
· 480 Address, Up to Eight IRC1 and Three DMA Options
· ISA Host Interface
· 16it Address Qualification
· 8it Data Bus * IOCHRDY for ECP and Fast IR
· Three 8it DMA Channels
· Eight Direct Parallel IRQs and Serial IRQ Option Compatible with Serialized IRQ Support
for PCI Systems
· 100 Pin OFP and TQFP Package 
						

							Major Chips Description2-49 2.3.2 General Description
The FDC37C67x with Consumer IR and IrDA v 1.1 support incorporates a keyboard interface,
SMCs true CMOS 765B floppy disk controller, advanced digital data separator, two 16C550
compatible UARTs, one Multi-Mode parallel port which includes ChiProtect circuitry plus EPP and
ECP, on-chip 24 mA AT bus drivers, two floppy direct drive support, Intelligent power management
and SMI support. The true CMOS 765B core provides 100% compatibility with IBM PC/XT and
PC/AT architectures in addition to providing data overflow and underflow protection. The SMC
advanced digital data separator incorporates SMCs patented data separator technology, allowing
for ease of testing and use. Both on-chip UARTs are compatible with the NS16C550. The parallel
port is compatible with IBM PC/AT architecture, as well as IEEE 1284 EPP and ECP. The
FDC37C67x incorporates sophisticated power control circuitry (PCC). The PCC supports multiple
low power down modes.
The FDC37C67x supports the ISA Plug-and-Play Standard (Version 1.0a) and provides the
recommended functionality to support Windows 95. The l/O Address, DMA Channel and Hardware
IRQ of each logical device in the FDC37C67x may be reprogrammed through the internal
configuration registers. There are 480 I/O address location options, 8 parallel IRQs, an optional
Serialized IRQ interface, and three DMA channels.
The FDC37C67x does not require any external filter components and is therefore easy to use and
offers lower system costs and reduced board area. The FDC37C67x is software and register
compatible with SMCs proprietary 82077AA core 
						

							2-50Service Guide2.3.3 Pin ConfigurationFigure 2-4FDC37C67 (TQFP) Pin Diagram 
						

							Major Chips Description2-51Figure 2-5FDC37C67 (QFP) Pin Diagram 
						

							2-52Service Guide2.3.4 Pin Descriptions
Table 2-6FDC37C67 Pin DescriptionsPin No./QFPPin NameTypeSymbolBuffer TypeProcessor / Host Interface (34)E37:40, 42:45System Data Bus8SD[0:7]IO2420:3011-bit System Address Bus11SA[0:10]I31Chip select/SA11 (Note 1)1nCS/SA11I36Address Enable1AENI55I/O Channel Ready1IOCHRDYOD2446ISA Reset Drive1RESET_DRVIS33Serial IRQ/Parallel IRQ_31SER_IRQ/IRQ3IO24/O24/D24(Note
0)32PCI Clock for Serial IRQ (33
MHz/30MHz)/Parallel IRQ_41PCI_CLK/IRQ4IO24/O24/D24(Note
0)50DMA Request 11DRQ1O2448DMA Request 21DRQ2O2452DMA Request 3/8042 P121DRQ3/P12O24/IO2447DMA Acknowledge 11nDACK1I49DMA Acknowledge 21nDACK2I51DMA Acknowledge 3/8042 P161nDACK3/P16I/IO2454Terminal Count1TCI34I/O Read1nIORI35I/O Write1nIOWIClocks(1)1914.318MHz Clock Input1CLOCKIICLKInfrared Interface (2)61Infrared Rx1IRRX162Infrared Tx1IRTXO24Power Pins (8)18,53,65,93PowerVCC7,41,60, 76GroundVSSFDD Interface (16)16Read Disk Data1nRDATAIS11Write Gate1nWGATEO224/OD2410Write Disk Data1nWDATAO224/OD2412Head Select1nHDSELO224/OD248Step Direction1nDIRO224/OD249Step Pulse1nSTEPO224/OD2417D3k _ha_1nDSKCHGIS5Dr we 58SM O1nDS0O224/OD244Drive Select 11nDS1O224/OD24 
						

							Major Chips Description2-53 Table 2-6FDC37C67 Pin DescriptionsPin No./QFPPin NameTypeSymbolBuffer Type3Maor On D1nMTR0O224/OD246Motor On 11nMTR1O224/OD2415Write Protected1nWRTPRTIS14Track O1nTRKOIS13Index Pulse Input1nINDEXIS1Drive Density Select O1DRVDENOO224/OD242Drive Density Select 1 /IR Mode
Select/lRRX31DRVDEN1/IR
MODE/ IRRX3O224/OD24/O24/ISerial Port 1 Interface(8)84Receive Serial Data 11RXD1I85Transmit Serial Data 11TXD1O487Request to Send 11nRTS1/SYSOPO4/I88Clear to Send 11nCTS 1I89Data Terminal Ready 11nDTR 1O486Data Set Ready 11nDSR 1I91Data Carrier Detect 11nDCD1I90Ring Indicator 11nRI1ISerial Port 2 Interface (8)95Receive Serial Data 2/lnfrared Rx1RXD2/lRRXI96Transmit Serial Data 2/lnfrared
Tx1TXD2/lRTXO2498Request to Send 2/Sys Addr 12/
Parallel IRQ 51nRTS2/SA12/
IRQ5O4/I/O24/OD24(Note0
)99Clear to Send 2/Sys Addr 13/
Parallel IRQ 61nCTS2/SA 13/
IRQ6I/I/O24/OD24(Note0)100Data Terminal Ready/Sys Addr
14/ Parallel IRQ 71nDTR2/SA 14/
IRQ7O4/I/O24/OD24(Note0
)97Data Set Ready 2/Sys Addr 15/
Parallel IRQ 1 O/nSMI1nDSR2/SA1 5/
IRQ10/nSMII/I/O24/OD24(Note0)94Data Carrier Detect 2/8042 P12/
Parallel IRQ 1 11nDCD2/P12/
IRQ11I/IO24/O24(Note0)92Ring Indicator 2/8042 P1
6/Parallel IRQ 121nRI2/P16/ IRQ12I/IO24/O24/OD24
(Note0)Parallel Port Interface {17)68:75Parallel Port Data Bus8PD[0:7]IO2467Printer Select1nSLCTINOD24/O2466Initiate Output1nlNITOD24/O2482Auto Line Feed1nALFOD24/O2483Strobe Signal1nSTROBEOD24/O2479Busy Signal1BUSYI80Acknowledge Handshake1nACKI 
						

							2-54Service GuideTable 2-6FDC37C67 Pin DescriptionsPin No./QFPPin NameTypeSymbolBuffer Type78Paper End1PEI77Printer Selected1SLCTI81Error at Printer1nERRORIKeyboard/Mouse Interface (6)56Keyboard Data .1KDATIOD16P57Keyboard Clock1KCLKIOD16P58Mouse Data1MDATIOD16P59Mouse Clock1MCLKIOD16P63Keyboard Reset1KBDRST(Note 3)O464Gate A201A20MO4Note 0:  The interrupt request is output on one of the IRQx signals as an 024 buffer type. If EPP or ECP
Mode is enabled, this output is pulsed low, then released to allow sharing of interrupts. In this case, the
buffer type is OD24. Refer to the configuration section for more information.
Note 1:  For 1 2it addressing, SAO:SA11 only, nCS should be tied to GND. For 1 6it external address
qualification, address bits SA11:SA15 can be ORed together and applied to nCS. The nCS pin functions
as SA11 in full 1 6it Internal Address Qualification Mode.CR24.6 controls the FDC37C67x addressing
modes.
Note 2:  The n as the first letter of a signal name indicates an Active Low signal.
Note 3:  KBDRST is active low.BUFFER TYPE DESCRIPTIONS· IInput, TTL compatible.
· ISInput with Schmitt trigger.
· IOD16PInput/Output, 1 6mA sink, 90uA pullup.0
· IO24Input/Output, 24mA sink, 1 2mA source.
· IO4Input/Output, 4mA sink, 2mA source.
· O4Output, 4mA sink, 2mA source.
· O24Output, 24mA sink, 1 2mA source.
· OD24Output, Open Drain, 24mA sink.
· ICLKClock Input