Acer Extensa 390 Service Guide

							Major Chips Description2-55 2.3.5 Description of Multifunction Pins
Table 2-7FDC37C67 Multifunction Pin DescriptionsPin No./QFPOriginal FunctionAlternate Function 1Alternate Function 2Default2DRVDEN1IR MODEIRRX3DRVDEN1Controlled by IRMODSEL(LD8:CRC0.0) and IRRX3SEL(LD8:CRC0.4)32PCICLKIRQ4PCICLK33SERIRQIRQ3SERIRQControlled by SERIRQSEL(LD8:CRCO.2)51nDACK38042 P16nDACK352DRQ38042 P12DRQ3Controlled by DMA3SEL(LD8:CRCO.1)92nR128042 P16IRQ12nR1294nDCD28042 P12IRQ11nDCD2Controlled by 8042COMSEL(LD8:CRCO.3) and SERIRQSEL(LD8:CRCO.2)95RXD2IRRXRXD296TXD2IRTXTXD2Controlled by IR Option Register(LD5:CRF1.6)97nDSR2SA15IRQ10nDSR298nRTS2SA12IRQ5nRTS299nCTS2SA13IRQ6nCTS2100nDTR2SA14IRQ7nDTR2Controlled by 16 bit Address Qual.(CR24.6) and SERIRQSEL(LD8:CRC0.2) 
						

							2-56Service Guide2.3.6 Block DiagramFigure 2-6FDC37C67 Block Diagram 
						

							Major Chips Description2-57 2.4 65555
2.4.1 Features
· Highly integrated design Flat Panel and CRT GUI Accelerator & Multimedia Engine,
Palette/DAC, and Clock Synthesizer
· Hardware Windows Acceleration
· 64-bit Graphics Engine
- System-to-Screen and
- Screen-to-Screen BitBLT
- 3-Operand Raster-Ops
- 8/16/24 Color Expansion
· Transparent BLT
- Optimized for Windowsä BitBLT format
· PCI Bus with Burst Mode capability and BIOS ROM support
· Flexible Memory Configurations
· 64-Bit memory interface for EDO
· Two, four, or eight 256Kx 16 DRAMs ( I MB, 2MB, 3MB, or 4MB)
· One or two 512Kx32 DRAMs (2MB or 4MB)
· Four 256Kx16 plus two 128Kx32 (3MB)
· Two 128Kx32 DRAMs (IMB)
· Four 128Kx16 DRAMs (IMB)
· High Performance:
· Deep write buffers
· CRT Support
· 135 MHz RAMDAC
· Hardware Multimedia Support
· Zoom Video port
· YUV input from System Bus or Video Port
· YUV-RGB Conversion
· Capture / Scaling
· Video Zoom up to 8x
· Vertical interpolation of video data up to 720 pixels wide.
· Double Buffered Video
· Horizontal Interpolation 
						

							2-58Service Guide· Display centering and stretching features for optimal fit of V(iA graphics and text on 800x600
and 1024x768 panels
· Simultaneous Hardware Cursor and Pop-up Window
· 64x64 pixels by 4 colors
· 128x128 pixels by 2 colors
· Game Acceleration
· Source Transparent BLT
· Destination Transparent BLT
· Double buffer support for YUV and 15/16bpp Overlay Engine
· Instant Full Screen Page Flip
· Read back of CRT Scan line counters
· Optimized for High-Performance Flat Panel Display at 3.3V
· 640x480 x 24bpp
· 800x600 x 24bpp
· 1024x768 x 24bpp
· 1280 x 1024 x 24bpp
· 36-bit direct interface to color and monochrome, single drive (SS), and dual drive (DD), STN &
TFT panels
· Flexible On-chip Activity Timer facilitates ordered shutdown of the display system
· Advanced Power Management feature minimizes power usage in:
· Normal operation
· Standby (Sleep) modes
· Panel-Off Power-Saving Mode
· VESA Standards supported
· VAFC Port for display of Live Video
· DPMS for CRT power-down (required for support of EPA Energy-Star program)
· DDC for CRT Plug-Play & Display Control
· Composite NTSC / PAL Support
· Flicker Reduction Circuitry
· Power Sequencing control outputs regulate application of bias voltage, +5V to the panel and
+12V to the inverter for backlight operation
· 3.3V Operation, 5.0V tolerant 1/O
· Fully Compatible with IBMâ
 VGA 
						

							Major Chips Description2-59 2.4.2 Software Support Features
· Drivers Features
· High Performance Accelerated drivers
· Compatible across HiQVideoä family
· Auto Panning Support
· LCD/CRT/Simultaneous Mode Support
· Auto Resolution Change
· HW Stretching/Scaling
· Double Buffering
· Internationalization
· ChipsCPL (Control Panel Applet)
· DirectDraw support
· Games SDK support
· Dynamic Resolution Switching
· VGA Graphics applications in Windows
· VESA DDC extensions
· VESA DPMS extensions
· Property Sheet to change Refresh/Display
· Seamless Windows Support
· Boot time resolution adjustment
· DIVE, EnDlVE
· DCAF
· Multimedia Software
· Video Port Mana8er for ZV Port
· PCVideo DLL plus Tuner with DK Board
· Software Utilities
· DebugVGA
· Auto testing of all video modes
· ChipsVGA
· ChipsEXT
· Software Documentation
· BIOS OEM Reference Guide
· Display Driver Users Guide
· Utilities Users Guide
· Release Notes for BIOS, Drivers, and Utilities 
						

							2-60Service Guide· Software Support
· Dedicated Software Applications Engineer
· BBS Support for Software Updates
· BIOS Features
· VGA Compatible BIOS
· PCI Bus Support
· PnP Support
· VESA VBE 2.0 (incl. DPMS)
· DDC 1, DDC 2AB
· Text and Graphics Expansion
· Auto Centering
· 44 (40) K BIOS
· CRT, LCD, Simultaneous display modes
· Auto Resolution Switch
· Multiple Refresh Rates
· NTSC/PAL support
· Extended Modes
· Extended BIOS Functions
· 1024x768 TFT, DSTN Color Panels
· Multiple Panel Support ( 8 panels built in)
· Get Panel Type Function
· HW Popup Interface
· Monitor Detect
· Pop Up Support
· SMI and Hot Key support
· System BIOS Hooks
· Set Active Display Type
· Save/Restore Video State
· Setup Memory for Save/Restore
· SMI Entry Point
· Int 15 Calls after POST, Set Mode
· Mixed Voltage 3.3V/5V Support
· BIOS Modify Program (BMP)
· Clocks
· Mode support 
						

							Major Chips Description2-61 · Panel Tables
· Voltage Switching
· Int 15 Hooks
· Monitor Sensing
2.4.3 Introduction / Overview
The HiQVideoä family of high performance multimedia flat panel/CRT GUI accelerators extend
CHIPS offering of high performance flat panel controllers for full-featured notebooks and sub--
notebooks. The HiQVideo family offers 64-bit high performance and new hardware multimedia
support features.
2.4.3.1 HiQColorä ä Technology
The 65555 integrates CHIPS breakthrough HiQColor technology. Based on a new proprietary
TMED (Temporal Modulated Energy Distribution) algorithm, HiQColor technology is a unique
process that enables the display of 16.7M colors on STN panels without dithering. TMED reduces
the need for panel turning associated with current FRC-based algorithms.
Independent of panel response times, the TMED algorithm eliminates all flaws such as shimmer,
Mach banding and crawling currently seen on STN panels. Combined with the new fast response
high contrast and low-crosstalk technology found in new STN panels. HiQColor technology enables
TF^T quality viewing on an STN panel. The 65555 provides the best color fidelity for the widest
variety of active and passive panels in the market.
2.4.3.2 Reduced Flicker Output Television
The television output circuitry supports both NTSC and PAL television formats. The 65555
provides filtering circuitry to reduce the flicker circuitry to reduce the flicker seen when displaying
CRT resolution images on television screens. The television circuitry scales images to fit both PAL
and NTSC televisions.
2.4.3.3 ZV Port Input
The 65555 supports the ZV port PCMCIA standard for video input. The ZV port video data is fed
directly to the graphics memory to reduce traffic on the PCI Bus.
2.4.3.4 Hardware Multimedia Support
The HiQVideoä family uses independent multimedia capture and display systems on-chip. The
capture system places data in display memory (usually off screen) and the display system places
the data in a window on the screen.
The capture system can receive data from either the system bus or from the ZV enabled video
port in either RGB or YUV format. The input data can also be scaled down before storage in
display memory. Capture of input data may also be double buffered for smoothing and to prevent
image tearing. 
						

							2-62Service GuideThe display system can independently place either RGB or YUV data from anywhere in display
memory into an on-screen window which can be any size and located at any pixel boundary (YW
data is converted to RGB on-the-fly on output). Non-rectangular windows are supported via color
keying. The data can be fractionally zoomed on output up to 8x to fit the onscreen window and can
be horizontally and vertically interpolated. Interlaced and non-interlaced data are supported in both
capture and display systems.
2.4.3.5 Video Acceleration
When the system writes to the video YW memory, the 65555 uses its PCI Bust Mode capabilities
to allow for a higher frame rate. Video capture input through the ZV port is scaled and stored into
memory allowing frame capture for video conferencing. In addition, the 65555 will use vertical
interpolation of video data up to 720 pixels wide to enable smooth zooming to full screen MPEG II
video. Double buffering is used to prevent image tearing.
2.4.3.6 Versatile Panel Support
The HiQVideo family supports a wide variety of monochrome and color Single-Panel, Single-Drive
(SS) and Dual-Panel, Dual Drive (DD) standard and high-resolution passive STN and acfive matrix
TFT/MIM LCD, and EL panels. For monochrome panels, up to 64 gray scales are supported. With
the help of HiQColor Technology, STN panels can afford 256 gray shades per primary resulting in
16M colors for an improved image representation. Additionally, the HiQVPro also supports TFT
panels up to 36-bit interface. The HiQVideo family offers a variety of programmable features to
optimize display quality. Vertical centering and stretching are provided for handling modes with
less than 480 lines on 480line panels. Horizontal and vertical stretching capabilities are also
available for both text and graphics modes for optimal display of VGA text and graphics modes on
800x600 and 1024x768 panels. Three selectable color-to-gray scale reduction techniques and
SMARTMAP are available for improving the ability to view color applications on monochrome
panels.
2.4.3.7 Low Power Consumption
The HiQVideo family uses a variety of advanced power management features to reduce power
consumption of the display sub-system and to extend battery life. Although optimized for 3.3V
operation, the HiQVideo controllers internal logic, memory interface, bus interface, and panel
interfaces can be independently configured to operate at either 3.3V or 5V.
2.4.3.8 Software Compatibility/Flexibility
The HiQVideo controllers are fully compatible with VGA at the register, and BIOS levels. CHIPS
and third-party vendors supply fully VGA-compatible BIOS, end-user utilities and drivers for
common application programs such as Microsoft Windows and OS/2.
The 65555 BIOS and drivers are an evolutionary step from the 65554 software. The Windows
drivers provided for the 65555 are compliant with both Microsoft WHQL and PC97 standards.
2.4.3.9 Display Memory Size Requirements
The 65555 supports the following 32-bit wide and 64-bit wide memory configuration show below: 
						

							Major Chips Description2-63The 64-bit wide memory configurations have double the memory
bandwidth of the 32-bit wide configurations.
The figure below shows the display memory configurations using and external STN-DD buffer:· Some of the 32-bit configurations allow an additional 256K x 16
device to be used for an external 16-bit wide STN-DD buffer, as
shown above.
· The 65555 supports both video capture/playback and external
STN-DD buffer at the same time
2.4.4 Pin Descriptions
2.4.4.1 Introduction
The following pages contain the BGA ball assignments and a list of all the pins for the 65555 GUI
Accelerator. The pins are divided into the following groups:
· PCI Bus 
						

							2-64Service Guide· Display Memory Interface
· Flat Panel Display Interface
· CRT Interface Power / Ground and Standby Control
· Video Interface; Miscellaneous
Pin name in parentheses(... ) indicate alternate functions.
2.4.4.2 Top View: BGA Ball AssignmentsFigure 2-765555 BGA Ball Assignments (Top View)