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Toshiba Strata Dk14, Dk40i, Dk424 Installation And Maintenance Manual

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Page 701

Strata AirLink Systems
RWIU System Installation
Strata DK I&M 5/9916-49
Strata AirLink Systems
3. Press t until SYSTEM 
CONFIG.
 
displays
...or 
 + )&1.
4. Press 
)&1.
5. Enter the proper System ID 
(SID).
NoteThe SID must match the data entered in the system 
settings.
6. Press 
&/5to make 
corrections.
7. Press 
t.
8. Enter the handset ID (four 
digits) for the system ID 
entered in Substep 5.
9. Press 
t for other systems.
10. Repeat Substeps 5~7 to enter 
all the system and handset 
IDs...

Page 702

Strata AirLink Systems
RWIU Additional Information
16-50Strata DK I&M 5/99
RWIU Additional Information
The following paragraphs describe:
©RWIU/WWIS interface unit
©Changing the initial configuration
©Changing the communications port
©Checking the RWIU and Base Station software versions
©Viewing log messages
©Resetting the Base Stations and RWIU
©Upgrading the RWIU and Base Stations
©Changing the Base Station number
RWIU/WWIS Interface Unit
The Strata AirLink Wireless System interfaces to Strata DK16,...

Page 703

Strata AirLink Systems
RWIU Additional Information
Strata DK I&M 5/9916-51
Strata AirLink Systems
The WWIS has four Base Station interface connectors (J1~J4).
Figure 16-29 Top and Side View of the RWIU
The CPU addresses come from three octal latches that are also address buffers while the data bus 
addresses are buffered by a pair of bi-directional octal transceivers connected to the various 
peripheral devices.
There are eight external interrupt signals:
©INT0 – connects to the data highway receive (RX)...

Page 704

Strata AirLink Systems
RWIU Additional Information
16-52Strata DK I&M 5/99
The WWIS PCB (see Figure 16-30) has the following components:
©Four E1 transceivers with crystals, line transformers, protectors, and electronic circuit 
breakers
©Two LEDS for each transceiver
©Eight elastic buffers, two for each E1 interface
©Surface Mount Technology (SMT) resistors and capacitors
Figure 16-30 Top and Side View of WWIS
The thickness of the RWIU is 1.6 mm and the maximum distance between the WWIS PCB 
(including...

Page 705

Strata AirLink Systems
RWIU Additional Information
Strata DK I&M 5/9916-53
Strata AirLink Systems
©PHCLK - 2.048 MHz clock input
©4MCLK - 4.096 MHz clock input
The interface with the voice channel has the following signals:
©PCM matrix memory time switch device
©Digital I/O buffers (output enable)
The PHOUT connects to the matrix PCM input signal using a digital input buffer. The PHIN 
connects to the output signal using a digital output buffer. It is enabled only during the 
transmission phase of the...

Page 706

Strata AirLink Systems
RWIU Additional Information
16-54Strata DK I&M 5/99
Timing and Synchronization
To comply with FCC part 15D clock and frame synchronization requirements, the clock and frame 
frequency accuracy must be ± 10 parts per million (ppm). To meet this requirement without adding 
cost, the system uses the Strata DK system as the primary clock source. The analog, digital, and 
Stratum 3 trunks were considered as possible configurations.
To continue using only one single interface between the...

Page 707

Strata AirLink Systems
RWIU Additional Information
Strata DK I&M 5/9916-55
Strata AirLink Systems
The four primary access transceivers (U7, U13, U25, and U35) use the E1 (31 B + D) interface to 
each Base Station. Not all of the 32 time slots of the E1 (32 B + D) frame are used. The format is 
called 8 B + D and organized as follows:
©Time slot N0 – synchronization time slot
©Time slots N1~N8 – voice channels time slots
©Time slots N9~N15 – idle (free) time slots
©Time slot N16 – signaling CCS time slot...

Page 708

Strata AirLink Systems
RWIU Additional Information
16-56Strata DK I&M 5/99
The E1 devices receive each processed (but not formatted) 31 B + D frame from the CPU and 
transmits it (after formatting) to its Base Station through its TX line transformer. The same is true 
from the receiving side. The CPU performs the protocol conversion. Both TX and RX transfers are 
actuated in DMA mode by the CPU.
The E1 device connects to the matrix using four internal 2048 kbs synchronous PCM buses with 
the following...

Page 709

Strata AirLink Systems
RWIU Additional Information
Strata DK I&M 5/9916-57
Strata AirLink Systems
Ring Back Tones Generator
The RWIU PCB incorporates a 32KB EPROM that generates:
©440 Hz ring back tone, modulated at 480 Hz
©2400 Hz busy override tone
©4 tone channels for the U.S.
Each tone generates 800 bytes every 125 ms. The bytes are sent on a specific time slot of the 
matrix and to the related time slot of the PHIN output.
Serial Line Interface
There is a six-pin serial line interface (J7) that...

Page 710

Strata AirLink Systems
RWIU Additional Information
16-58Strata DK I&M 5/99
©System parameters
©UTAM activation
The software is built in layers, each implementing a different function. Each layer gets input from 
the layer below and provides services to the layer above. The hardware drivers layer uses 
interrupts and API calls interface with the layers above.
The operating system is totally independent of the hardware configuration and uses API calls to 
interface with the other layers. All other layers...
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