Panasonic Va-208 Key Telephone System Installation Manual

							CONTENTS 
BLOCKDIAGRAM ............................................................. 1 
EXPLANATION OF CIRCUIT OPERATION (KSU) 
.................................... 2 
1. 
2. 
3. 
4. 
5. 
6. 
7. 
8. 
9. 
10. 
11. COLCircuit ............................................................... 2 
Relay Operation Circuit. ...................................................... 3 
Hold Tone Transmit Circuit 
.................................................... 4 
RAM Hold Circuit 
..................................... 1 .................... 5 
WDCircuit ............................................................... 6 
Power Failure Detect Circuit. 
................................................... 7 
TONECircuit ........................................ ..................... 8 
LinkICCircuit ............................................................. 9 
Data Communication between TEL and KSU (I) ...................................... 11 
Data Communication between TEL and KSU (2) ...................................... 12 
IC Port Explanation 
......................................................... 13 
EXPLANATION OF CIRCUIT OPERATION (KEY TELEPHONE) 
........................ 16 
1. Conversation.. ............................................................ 16 
2. Functional Operation Circuit 
................................................... 17 
3. Power Supply for TEL. 
....................................................... 18 
4. A-K Communication 
......................................................... 19 
TROUBLE SHOOTING GUIDE .................................................... 20  
						

							q BLOCK DIAGRAM 
To SLT ADPT 
From CO 
- To Tel No2 KSU (VA-208101 
--_-_____ -_-___---_--A---- --- 
COL BLOCK 1 
r~-------_7 I 
t 
r_-----__-_--- 
t 
I 
I 
, TONE 
LEiZ!5_-________ 
r ____----__ --- 
I 
I BUS 1 CPU 
I I POW SEN I I 
BAT ALM I 
! NPU BLOCK - 
I- 
L____----------- 
SYMBOL DESCRIPTION SYMBOL DESCRIPTION SYMBOL DESCRIPTION 
KSU Key Service Unit ICSD COL Detection Circuit DSR Data Transmission and Receive 
TX Central Line Transmit Tone Switch CLLC COL Loop Circuit XP Speech Path Switch 
PBS PB Dial Sender PAD COL Pad PS Power Supply 
MOH Hold-on Music Source csc Current Supply Circuit 
BATT Battery PAGE Paging 
POW Power Transformer RGT Ringer Tone 
TONE1.2 Intercom Signal Tone  
						

							.- 
I 
TEL (VA-20820) 
a,S------ 
l---u 
csc 
- 
I 
. RVC 
17 
x P I 
‘.. 
I I I i 1NT-j X P 1 
I I 
I I 
HS2 
2 
-4 
- 
- 
- b 
& 
PS 
DSR  
						

							C603 T61 
V GND C42 
--I R43 (7 
_I6 3 
Y - COL 1 - 
COL 24 
COL 3.5 L” 82 
R42 $ 
ROW 1 ‘4 
I i 
1 I & 
IC12 b IC5 
IC4 
(3) DTMF signal sending operation 
COL COL COL 123 
I 
IC12 
,Example) 
ilVhen the telephone is dialed No. 1, the 
pin No.3 and pin No. 14 of ICI2 is turne 
to 03 status 
When the DTMF signal is dialed on Key Telephone, ICI 2 generates desired DTMF signal according to the dialed 
telephone number, and amplified it by iC25 to send it to CO line via IC23 and T61. 
Besides, the signal sending circuit is formed with @ status on IC23 (Analog switch) pin No.6 when the signal is 
sending, and rQ5r is close during the dialing to send the DTMF signal to the CO line. 
R605 
ICI1 
C603 
T61 PAD SW 
l------ ---- 
7 
PAD circuit 
In case of the line resistance from the CO line is less than 300 ohms, the sound quality will be corrected by the 
PAD switch which the switch turned to ON (Insert R610, R611) side to function as attenuator, and it is 
connected in series to the CO line. 
Mute circuit 
To reduce dial signal tone level to the hand set during the dial signal send, r1/50 operates to insert R605 and 
R606 as a attenuator.  
						

							n EXPLANATION 
OF CIRCUIT OPERATION 
1. COL Circuit 
WW 
1.1 COL incoming call detector circuit 
I. 
PH61 
To COL call (answering) 
_ circuit 
ZNR 
601 
DE62 
ZNR 
602 
Ro 
Incoming call from COL is full wave rectified by DB62, and the rectified signal is sent to PH61 photo coupler. 
PH61 photo coupler is synchronised to the incoming call signal and generates switched DC pulse. Then send it 
to IC4 pin No. 40 to identify if the signal is incoming COL call or not. (RLI operates when the power supply 
is ON, dot line side on the above figure). 
1.2 COL call (answering) circuit 
. ./:_:.- ;_ . ,A’. ‘... 
.,: : :::; 
-. ,. ,, 
’ ‘..F ,. ., ‘. 
To 
ZNR 
601 
DB61 
rlllo C601 R601 y------y 
C603 II * _ 
u 
1 Tone si! 
I 
ZNR 
602 
Ro I 
7 
rP 30 I 
I 
I 1 I ! 
; - - ; -  _“_ 
(I) Forming of the DC loop 
When operates COL call (answering) on Key Telephone, RLI relay operates (Refer to relay operation circuit) 
to form approx. 200 ohms DC loop by 0601 and R604 against to the CO line. 
(2) Dial pulse signal sending operation 
When the DP signal is dialed on Key Telephone, rQ3e(Refer to relay circuit operation) operates intermittently 
according to the incoming dial pulse, and rQ61 (Refer to relay operation circuit) is close during the dialing to 
send dial pulses to the CO line. 
-2-  
						

							2. Relay Operation Circuit 
. 
c13 
RLll 
+ 
RLIO 
t 1 I  
RL6 i 
Q13 D27 
 
i 
 
RLI : 
RL2 : 
RL3 : 
RL4 : 
RL5 : 
RL6 : 
RL7 : 
RL IO : 
RLII : 
IC4 
32 
84 
85 
@state on idle condition 
Operates when the COL 1 line is seized. 
Operates when the COL 2 line is seized. 
Operates when the dial signal sending to COL 1 line (by Di relay). 
Operates when the dial signal sending to COL 2 line (by Di relay). 
Operates when the dial signal sending and the COL 1 line holding (DS relay). 
Operates when the dial signal sending and the COL 2 line holding (DS relay). 
Power supply to TEL. 
Cut through at the power failure condition for TEL 1. 
Cut through at the power failure condition for TEL 2. 
-3-  
						

							3. Hold Tone Transmit Circuit 
C603 
ZD602 
’ IC4 
+12v 
MOH 
IA R501 
c35 R93 D3 
R96 
C36 
r--- -- 91 
L__-_-. Q16 
c 
a- 
( 
R508 ‘f 
When the incoming call is hold at Key Telephone, 0 status is output on IC4-I36 (pin No. 24) by turn the SW2 
switch to RI side and SW1 switch is break. 
Then reverse it with IC24 to supply the base bias ON for 016, and IC31 (Hold tone memory IC) is actuated. 
Generated memory output on IC31 pin No. 5 and 6 is sent to IC27 and IC25 (Amplifier), and transmit it to 
CO line via IC23 and T61. 
Besides, when SW1 is in holding condition, @ status is supplied to IC23 (Analog switch), and formed the 
melody tone transmit circuit. Simultaneously, formed the CO line loop with rf51 contact operation by SW2 
switch ON. 
NOTES: 
l When the SW2 is in EXT position, the external hold tone is sent from MOH terminal to the circuit. 
0 SW1 is selection switch of music IC. 
-4-  
						

							4. RAM Hold Circuit 
L 
RI5 ZD 1 
87 25 (1 
RlB 
R14 
Q2 Q3 
IC1 @ 
R16 
24 
1 L: RAM disable 
vcc. = _L 
q : c4 
+ 
6RD 12’ I 0 
c3 
Rl9 
R21 
L+ 
R20 
---l-- 
I 
RAM 
HOLD 
SW 
In case of the power failure, +3V DC voltage is supplied to IC2-Vcc (pin No. 24) from backup battery to 
prevent erasure of memorised program in RAM. 
At the normal operation (AC power ON), the battery idle condition formed by @ status on IC5-B7 (pin 
No. 25), and the operation flow is as following sequence: 
02 
[OFFI -+ 03 [ONI + 04 [ON] -+ Supplied +5V DC to IC2 -Vcc (pin No. 24) and Q2 [OFF] + Q3 
[ON] + Q5[ON] + 
QG[OFF] 
In case of the power failure, Q6 is turned to ON condition by R22, and the backup battery is connected to 
IC2-Vcc (pin No. 24) for supply +5V DC voltage to the circuit. 
At the moment of the power failure, the transient time of switching over from AC mains to backup battery 
is backed up by C3 capacitor. 
In case of the main battery (Ni-Cd 12V) voltage drops below zener voltage of ZDI diode (Approx. 4.3V), 
instantaneously Q3 turned OFF + 04 and 05 [OFF], and the circuit condition turned to as same as power 
failure condition. 
-5-  
						

							5. WD Circuit 
Cl5 .- 
RlO R12 
1 
IC4 @-+ C6 R5 
Id 
IC6 @ --&” 
D18 
i 
I__ 
07 L-__ 
; Q8 
J 
Cl7 
IC 
(R eset state = 2 to 3 sec. Q 
) 
l When the WD circuit detects abnormal condition on data communication between TEL and Link switch 
address output, the WD circuit executes system reset with sending out @ status on ICI-FIST (pin No.26) 
- 
and IC4 to 6-RST 
l WD circuit is monitor the status of data communication Inh signal of IC4 and address output of IC6 all 
times, in case of either signals are stop, and the circuit executes system reset with a following operation 
sequence: 
ICI9 (pin No. 12or 13) is@+ ICI9 (pin No. 11) is@ -+ ICI9 (pin No. 10) is@ + Qi’ 
[OFF1 -08 [ONI 
-+ 
ICI9 (pin No, 4) is @ + ICI9 (pin No. 3) is 0 + ICI (pin No. 26) is RST. 
-6-  
						

							6. Power Failure Detect Circuit 
+12v 
0 Q 
IC4 ( i state on BATT alarm) 
0 IC4 
( #I$ state on power failure) 
t 0 
c BATT 12V 
F3 (2A) 
ti rP90 
b e t 12v 
R40 R55 
I 
‘I 
. 
- 
,52 Dll R54 
L J ---- 
‘L 06 D5lL 
D7 I 
I 
I ---1 
( 
I ’ I 
I 
I 350 
--- A 
010 
rQ--7 I 
IC7 
5V SW Regulator rl r’ 1 
013 R59 D12 
Power 
Source 
+ 
c99 
E, 
When AC power is failed, RL 9 relay operates by the voltage detection circuit, and change over the power 
source circuit to Battery circuit. Under the above condition, COL call originate and answer function can be 
maintain only TEL 1 and 2. 
When AC power is failed, the detector circuit condition changes from 1) to 2) as follow: 
1) Normal condition: 
@status on IC8 (pin No. 2) by 011 ON. 
2) When AC power is failed: 
Drops down the output of IC29 (pin No. 2) + Qll [OFFI when the voltage drops below the zener 
voltage of ZD3 (Approx. IOV) + @status on IC8 (pin No.2). 
The power source circuit is changed over to the Battery circuit by the following sequence: 
Voltage comparator IC8 (pin No. 8) is @ + 09 
[ONI -+ R l-9 [ON] and switch over to the battery circuit. 
Battery alarm shall be emitted from TEL1 and 2 when the battery voltage drop down to +l’fV or less, and 
the operation executes by the following sequence: 
@status on IC8(pin No. 8)+ Battery alarm signal send to NPU. 
When the battery voltage drops to less than +I 0.5V, IC8 (pin No.2) turned to @ status, and RL9 resets the 
battery circuit [OFF] to prevent over discharge of the battery. 
NOTE: At the moment of power failure, the switch over transient shall be backed up by the discharge of 
C54. and maintain the voltage to +12V. 
-7-