Motorola Astro Digital Mobile Radio Xtl5000 Detailled 6881096c74 B Manual

							6881096C74-BMay 25, 2005
Theory of Operation: Frequency Generation Unit (FGU) 3-55
3.7.3.1  Reference Oscillator
The radios frequency stability and accuracy is derived from the 16.8 MHz reference oscillator 
(Y5750). The 16.8 MHz reference oscillator circuitry provides a 16.8 MHz reference to the LV Frac-N 
(U5752), receiver back-end IC (U5002), and the controller section of the XTL 5000 radio. The 
reference oscillator circuitry consists of the reference oscillator Y5750 and the inverter/buffer circuitry 
containing the active device U5751. Y5750 is a voltage-controlled, temperature-compensated crystal 
oscillator (VCTCXO). Circuitry internal to Y5750 compensates for frequency error over temperature. 
Warping of the oscillator on frequency is accomplished via a programmable DAC in the LV Frac-N. 
The warp voltage is present at pin 25 (WARP) of U5752 and is applied to pin 1 of Y5750. The 
16.8 MHz output frequency of Y5750 is capacitor-coupled to pin 23 of the LV Frac-N (U5752) and 
also to the inverter/buffer stage U5751. L5753 and C5768 at the output of U5751 filter the 16.8 MHz 
signal, and R5768 along with C5763 set the appropriate amplitude of the signal for the receiver back-
end and controller sections.
3.7.3.2  LV Frac-N Synthesizer IC
The LV Frac-N IC (U5752) functions include frequency synthesis, modulation control, voltage 
multiplication and filtering, and auxiliary logic outputs for VCO selection.
U5752 is a mixed-mode IC containing digital and analog circuits. Separate power supply inputs are 
used for the various functional blocks on the IC. Inductors L5755 and L5756 provide isolation 
between supply pin 20 (AVDD - analog supply input) and pin 36 (DVDD - digital supply input) 
connected to F3.0v. This 3.0 V DC supply is provided by U5750, a 3-V regulator IC.
All programmable variables on the synthesizer IC, such as the synthesizer frequency; reference- 
oscillator warping; adapt-timer duration; modulation-attenuator setting; and auxiliary-control outputs, 
which select one of five voltage-controlled oscillators, can be programmed through a serial 
peripheral interface (SPI). The SPI is connected to the controller microcomputer via three 
programming lines, namely the data (pin 7), clock (pin 8), and the chip enable (pin 9) of U5752 
(Figure 3-40).
Figure 3-40.  Waveform Representation During Programming of the LV Frac-N IC (UHF Range 2)
3.7.3.3  Voltage Multiplier
Pin 12 (VMULT3) and pin 11 (VMULT4) of U5752, together with diode arrays D5750 and D5751 and 
their associated capacitors C5775, C5776, C5777 and C5778, form the voltage multiplier. The 
voltage multiplier generates 13.4 Vdc from the 5.0-V supply to supply the phase detector and 
charge-pump output stage at pin 47 (VCP) of U5752. This voltage multiplier is basically a stacked, 
multiple-diode capacitor network driven by two 1.05 MHz, 180 degrees out of phase signals from 
pins 12 and 11 of U5752.
Pin 9 (Chip Select)
Pin 7 (Data)
Pin 8 (Clock)
MAEPF 2 80 O 
						

							May 25, 20056881096C74-B
3-56Theory of Operation: Frequency Generation Unit (FGU)
3.7.3.4  Superfilter
The superfilter is an active filter that provides a low-noise supply for the VCOs, receiver and 
transmitter injection amplifiers. Regulator U0950, located in the controller section, supplies 9.3 Vdc 
to the FGU section thru the filtering network consisting of L5750, C5751, C5753, and C5755. This 
voltage is applied to pin 30 (SFIN) of U5752 and the emitter of Q5752. The output is a superfiltered 
8.2 Vdc at the junction of pin 28 (SFOUT) of U5752 and the collector of Q5752. Filtering is 
accomplished with capacitors C5766, C5769, and C5772 at the output of this circuit and C5770 at 
pin 26 of U5752.
3.7.3.5  Modulation
To support many voice, data, and signaling protocols, XTL 5000 radios must modulate the 
transmitter carrier frequency over a wide audio-frequency range, from less than 10 Hz up to more 
than 6 kHz. The LV Frac-N IC supports audio frequencies down to zero Hz by using dual-port 
modulation. The audio signal at pin 10 (MODIN) is internally divided into high- and low-frequency 
components, which modulate both the synthesizer dividers and the external VCOs through signal 
MODOUT (pin 41). The IC is adjusted to achieve flat modulation frequency response during 
transmitter modulation balance calibration using a built-in modulation attenuator.
The Digital-to-Analog Converter (DAC) IC (U0900), and switched-capacitor filter (SCF) IC (FL0900) 
form the interface between the radios DSP and the analog input of the LV Frac-N IC.
3.7.3.6  Charge Pump Bias
External circuitry connected to pin 39 (Bias 2) and pin 40 (Bias 1) of U5752 determine the current 
that is applied to the charge-pump circuitry. During receive mode, resistors R5754, R5759, and 
R5765 set the current supplied to pin 40 (Bias 1). Transistor Q5750 and resistors R5752, R5753, 
and capacitor C5759 form a circuit that momentarily increases the current to pin 40 (Bias 1) during 
receiver programming of U5752. This circuit is activated by pin 46 (ADAPTSW) of U5752 during the 
transition of programming U5752 to frequency and effectively decreases the length of time for the 
synthesizer to lock on frequency. Similarly, during transmitter mode, resistors R5764, R5759, and 
R5753 set the current supplied to pin 39 (Bias 2). Transistor Q5752 and resistors R5767, R5764, 
and capacitor C5762 form a circuit that momentarily increases the current to pin 39 (Bias 2) during 
transmitter programming of U5752.
3.7.3.7  Loop Filter
The loop filter operates in synchronization with the phase detector of U5752 in two modes, normal 
and adapt. In normal mode, the loop filter forms a third-order loop filter consisting of components 
R5772, R5774, R5775, C5781 to C5787, C5790 to C5792, and C5809 to C5812.
Pin 43 (IOUT) of U5752 provides the charge-pump current for steering of the control voltage line to 
the VCOs. During normal mode, pin 45 (IADAPT) is set to a high impedance and has no effect on the 
loop filter. When U5752 is programmed to a new frequency, the IC is initially operated in adapt mode. 
In this mode the loop filter is reconfigured for a wider bandwidth allowing the synthesizer to lock 
faster. The charge-pump output is supplied through pin 45 (IADAPT) in this mode, and this 
reconfigures the loop filter to behave like a second-order filter.
3.7.3.8  Lock Detect
Lock status of the synthesizer loop is provided to the microprocessor by pin 4 (LOCK) of U5752. A 
high level (3.0 Vdc) indicates that the loop is stable. A low voltage indicates that the loop is not 
locked and will result in a Fail 001 to be displayed on the control head display. 
						

							6881096C74-BMay 25, 2005
Theory of Operation: Frequency Generation Unit (FGU) 3-57
3.7.3.9  Transmitter Injection
The transmit (TX) injection string consists of three amplifier stages (Q5828, Q5829, and Q5501) 
whose main purpose is to maintain a constant output to drive the RF power amplifier chain and 
supply the TX feedback signal to the FGU synthesizer loop. The first two stages are powered by the 
superfiltered 8.2 Vdc, which is decreased by 0.7 Vdc via the dual diode D5833, resulting in a 7.5 Vdc 
supply. The third stage is powered by the keyed 9.1 Vdc and the TX injection string is on only with 
keyed 9.1 Vdc activated during transmit mode.
The output of the second stage amplifier Q5829 is tapped via capacitor C5863 to supply the TX 
feedback signal to the synthesizer prescalar via the amplifier Q5755.
3.7.3.10 Receiver Injection
The receiver (RX) injection string is a four-stage amplifier that supplies the RX feedback signal to the 
FGU synthesizer loop and supplies the first local oscillator (LO) signal to the RX front-end mixer. 
Each RX VCO output is attenuated via resistive pads to increase isolation. The VCO signals are 
buffered by the RX injection amplifier string Q5904, Q5902 and Q5906. The output of Q5906 is 
tapped via C5957 and fed back to the synthesizer prescaler through amplifier Q5755. The main path 
at the output of Q5906 is amplified by U5303 to a level of 24 dBm to provide the first LO signal to the 
RX front end mixer in the receiver chain.
3.7.3.11 Transmitter VCOs
Transmitter frequencies are generated from two VCOs, Q5825 and Q5826.
• Q5826 supplies frequencies in the range 450 MHz up to (but not including) 485 MHz.
• Q5825 supplies frequencies in the range from 485 MHz to 520 MHz.
3.7.3.12 Receiver VCOs
Receiver first local-oscillator frequencies are generated from three VCOs, Q5901, Q5903 and 
Q5905. 
• Q5905 supplies frequencies in the range 559.65 MHz up to (but not including) 582.65 MHz.
• Q5903 supplies frequencies in the range 582.65 MHz up to (but not including) 605.65 MHz.
• Q5901 supplies frequencies in the range 605.65 MHz up to 629.65 MHz.
The RX VCOs operate at frequencies which are 109.65 MHz higher than the radio channel selected 
frequency since the receiver is high side injected, and the first IF frequency is 109.65 MHz.
The five VCOs are selected by the following pattern of logic levels on the AUX pins from the 
synthesizer chip U5752 (Table 3-12):
Table 3-12.  VCO AUX Pin Logic UHF Range 2
VCOAUX1AUX2AUX3
RX VCO Q5905001
RX VCO Q5903110
RX VCO Q5901010
TX VCO Q5826100
TX VCO Q5825000 
						

							May 25, 20056881096C74-B
3-58Theory of Operation: Frequency Generation Unit (FGU)
3.7.3.13 Prescaler Feedback 
RF feedback for the synthesizer loop is provided by prescaler amplifier Q5755. Feedback from both 
the transmitter and receiver injection strings are coupled to this amplifier through capacitors C5863 
and C5957. The output of Q5755 is coupled to U5752 at pin 32 (PREIN), which is the prescaler input 
for the synthesizer.
3.7.4 700–800 MHz Band
The FGU (Figure 3-41) provides the XTL 5000 radio with a 16.8 MHz reference frequency, receiver 
1st local oscillator, and a modulated transmitter RF carrier that is further amplified by the power 
amplifier section of the radio.
The FGU consists of the following:
• Reference oscillator (Y6750)
• Low-voltage Fractional-N (LV Frac-N) synthesizer (U6751)
• Two receiver voltage-controlled oscillators (VCOs) contained in U6755
• Two transmitter VCOs contained in U6754
• Two receiver LO amplifiers (Q6762 and Q6763)
• Three transmitter injection amplifiers (Q6764, Q6765 and Q6766)
Figure 3-41.  Frequency Generation Unit Block Diagram (700–800 MHz)
Bias 1 3.0V3.0V
3.0V
3.0V
8.2V8.2V 8.2V
Q6753
Q6755
Q6756
Q6760
Lock Detect
to ControllerPrescaler Input
Q6761RF
FeedbackRX
INJECTIONTX
INJECTION
RX
InjectionTX
Injection Keyed
9.1V
U6754
U6755
8.2V C6783LOOP
FILTER
Bias 2
9.3V9.3V
SFIN
SFBASE
SFOUTLock PREINAUX4AUX3 Mod OutIADAPTIOUT AUX2AUX1 VMULT4 VMULT3 5.0V16.8MHz Reference
to Controller and
Receiver Back End
VOLTAGE
MULTIPLIER
D6751 and
D6752 16.8MHz OSC
8.2V
Super Filter
Q67598.2V SW
8.2V SW8.2V SW
8.2V SW U6752
U6751 3.0V
Regulator
U6750
PHASE
DETECTOR BIAS
Q6757 RX and
Q6758 TXCLOCK
SYN_SEL
D ATA
MOD_IN From
Controller
MAEPF-27804-O 
						

							6881096C74-BMay 25, 2005
Theory of Operation: Frequency Generation Unit (FGU) 3-59
3.7.4.1  Reference Oscillator
The radios frequency stability and accuracy is derived from the 16.8 MHz reference oscillator 
(Y6750). The 16.8 MHz reference oscillator circuitry provides a 16.8 MHz reference to the LV Frac-N 
(U6751), receiver back-end IC (U6000), and the controller section of the XTL 5000 radio. The 
reference oscillator circuitry consists of the reference oscillator Y6750 and the inverter/buffer circuitry 
containing the active device U6752. Y6750 is a voltage-controlled, temperature-compensated crystal 
oscillator (VCTCXO). Circuitry internal to Y6750 compensates for frequency error over temperature. 
Warping of the oscillator on frequency is accomplished via a programmable DAC in the LV Frac-N. 
The warp voltage is present at pin 25 (WARP) of U6751 and is applied to pin 4 of Y6750. The 
16.8 MHz output frequency of Y6750 is capacitor-coupled to pin 24 of the LV Frac-N (U6751) and 
also to the inverter/buffer stage U6752. L6756 and C6755 at the output of U6752 filter the 16.8 MHz 
signal, and R6757 along with C6759 set the appropriate amplitude of the signal for the receiver back-
end and controller sections.
3.7.4.2  LV Frac-N Synthesizer IC
The LV Frac-N IC (U6751) functions include frequency synthesis, modulation control, voltage 
multiplication and filtering, and auxiliary logic outputs for VCO selection.
U6751 is a mixed-mode IC containing digital and analog circuits. Separate power supply inputs are 
used for the various functional blocks on the IC. Inductors L6752 and L6753 provide isolation 
between supply pin 20 (AVDD - analog supply input) and pin 36 (DVDD - digital supply input) 
connected to F3.0v. This 3.0 V DC supply is provided by U6750, a 3-V regulator IC.
All programmable variables on the synthesizer IC, such as the synthesizer frequency; reference- 
oscillator warping; adapt-timer duration; modulation-attenuator setting; and auxiliary-control outputs, 
which select one of four voltage-controlled oscillators, can be programmed through a serial 
peripheral interface (SPI). The SPI is connected to the controller microcomputer via three 
programming lines, namely the data (pin 7), clock (pin 8), and the chip enable (pin 9) of U6751 
(Figure 3-42).
Figure 3-42.  Waveform Representation During Programming of the LV Frac-N IC
3.7.4.3  Voltage Multiplier
Pin 12 (VMULT3) and pin 11 (VMULT4) of U6751, together with diode arrays D6751 and D6752 and 
their associated capacitors C6763, C6766, C6769 and C6771, form the voltage multiplier. The 
voltage multiplier generates 12.0 Vdc from the 3.0-V supply to supply the phase detector and 
charge-pump output stage at pin 47 (VCP) of U6751. This voltage multiplier is basically a stacked, 
multiple-diode capacitor network driven by two 1.05 MHz, 180 degrees out of phase signals from 
pins 12 and 11 of U6751.
Pin 9 (Chip Select)
Pin 7 (Data)
Pin 8 (Clock)
MAEPF-27805-O 
						

							May 25, 20056881096C74-B
3-60Theory of Operation: Frequency Generation Unit (FGU)
3.7.4.4  Superfilter
The superfilter is an active filter that provides a low-noise supply for the VCOs, receiver and 
transmitter injection amplifiers. Regulator U0950, located in the controller section, supplies 9.3 Vdc 
to the FGU section thru the filtering network consisting of L6755, C6806, C6807, and C6818. This 
voltage is applied to pin 30 (SFIN) of U6751 and the emitter of Q6759. The output is a superfiltered 
8.2 Vdc at the junction of pin 28 (SFOUT) of U6751 and the collector of Q6759. Filtering is 
accomplished with capacitors C6808, C6790, and C6791 at the output of this circuit and C6775 at 
pin 26 of U6751. 
3.7.4.5  Modulation
To support many voice, data, and signaling protocols, XTL 5000 radios must modulate the 
transmitter carrier frequency over a wide audio-frequency range, from less than 10 Hz up to more 
than 6 kHz. The LV Frac-N IC supports audio frequencies down to zero Hz by using dual-port 
modulation. The audio signal at pin 10 (MODIN) is internally divided into high- and low-frequency 
components, which modulate both the synthesizer dividers and the external VCOs through signal 
MODOUT (pin 41). The IC is adjusted to achieve flat modulation frequency response during 
transmitter modulation balance calibration using a built-in modulation attenuator.
The Digital-to-Analog Converter (DAC) IC (U0900), and switched-capacitor filter (SCF) IC (FL0900) 
form the interface between the radios DSP and the analog input of the LV Frac-N IC.
3.7.4.6  Charge Pump Bias
External circuitry connected to pin 39 (Bias 2) and pin 40 (Bias 1) of U6751 determine the current 
that is applied to the charge-pump circuitry. During receive mode, resistors R6768, R6769, and 
R6766 set the current supplied to pin 40 (Bias 1). Transistor Q6757 and resistors R6763, R6762, 
and capacitor C6795 form a circuit that momentarily increases the current to pin 40 (Bias 1) during 
receiver programming of U6751. This circuit is activated by pin 46 (ADAPTSW) of U6751 during the 
transition of programming U6751 to frequency and effectively decreases the length of time for the 
synthesizer to lock on frequency. Similarly, during transmitter mode, resistors R6768, R6769, and 
R6768 set the current supplied to pin 39 (Bias 2). Transistor Q6758 and resistors R6770, R6767, 
and capacitor C6794 form a circuit that momentarily increases the current to pin 39 (Bias 2) during 
transmitter programming of U6751.
3.7.4.7  Loop Filter
The loop filter operates in synchronization with the phase detector of U6751 in two modes, normal 
and adapt. In normal mode, the loop filter forms a third-order loop filter consisting of components 
R6764, R6765, R6761, C6776 to C6779, and C6785 to C6789.
Pin 43 (IOUT) of U6751 provides the charge-pump current for steering of the control voltage line to 
the VCOs. During normal mode, pin 45 (IADAPT) is set to a high impedance and has no effect on the 
loop filter. When U6751 is programmed to a new frequency, the IC is initially operated in adapt mode. 
In this mode the loop filter is reconfigured for a wider bandwidth allowing the synthesizer to lock 
faster. The charge-pump output is supplied through pin 45 (IADAPT) in this mode, and this 
reconfigures the loop filter to behave like a second-order filter.
3.7.4.8  Lock Detect
Lock status of the synthesizer loop is provided to the microprocessor by pin 4 (LOCK) of U6751. A 
high level (3.0 Vdc) indicates that the loop is stable. A low voltage indicates that the loop is not 
locked and will result in a Fail 001 to be displayed on the control head display. 
						

							6881096C74-BMay 25, 2005
Theory of Operation: Frequency Generation Unit (FGU) 3-61
3.7.4.9  Transmitter Injection
The transmit (TX) injection string consists of three amplifier stages (Q6764, Q6765, and Q6766) 
whose main purpose is to maintain a constant output to drive the RF power amplifier and supply the 
TX feedback signal to the FGU synthesizer loop. The first two stages are powered by the 
superfiltered 8.2 Vdc, which is decreased by 0.7 Vdc via the dual diode D6750, resulting in a 7.5 Vdc 
supply. The third stage is powered by the keyed 9.1 Vdc and the TX injection string is on only with 
keyed 9.1 Vdc activated during transmit mode. The TX VCO output is attenuated 3 dB via resistors 
R6829 through R6831. This output is coupled to the first-stage amplifier Q6764, further attenuated 
3 dB via resistors R6809 through R6811, and then coupled to the second-stage amplifier Q6765. 
This output is tapped to supply the TX feedback signal to the synthesizer prescalar, and the balance 
is further attenuated 3 dB via resistors R6816 through R6818. This output is coupled to the third- 
stage amplifier Q6766, further attenuated 3 dB via resistors R6825 through R6827, and coupled to 
the input of the RF power amplifier section. The four sets of resistive attenuators provide increased 
isolation between the TX VCO and RF power amplifier.
3.7.4.10 Receiver Injection
The receiver (RX) injection string is a two-stage amplifier that supplies the RX feedback signal to the 
FGU synthesizer loop and supplies the first local oscillator (LO) signal to the RX front-end mixer. The 
RX VCO output is attenuated 6 dB via resistors R6793 through R6795 to increase isolation. This 
buffered signal is amplified by the first-stage amplifier Q6762, which is supplied by the 8.2-V 
superfilter for a gain of approximately 10 dB. Resistors R6789, R6790, and R6796 through R6798 
bias Q6762 to approximately 5 V and 35 mA. L6757 serves as a choke inductor; C6819 and C821 
are added for filtering. The output of Q6762 is split into two paths. The first path feeds back to the 
synthesizer prescaler through blocking capacitor C6822. The second path, which supplies the LO 
signal to the RX front-end mixer, is attenuated 3 dB via resistors R6799, R6800, and R6824 to 
increase isolation. This buffered signal is amplified by the second-stage amplifier Q6763, which is 
supplied by the 9.3-V regulator for a gain of approximately 15 dB. Resistor R6801 biases Q6763 to 
approximately 4.5 V (±1 V, due to possible part variations). L6758 serves as a choke inductor; 
C6823, C6824, and C6826 are added for filtering. The output of Q6763 is passed through blocking 
capacitor C6825 and attenuated 3 dB via resistors R6802 through R6804 to increase isolation and 
supply approximately 15.5 dBm to the LO port of the mixer.
3.7.4.11 Transmitter VCOs
Transmitter frequencies are generated from two VCOs contained in U6754. U6754 is not serviceable 
and should be replaced if it is determined to be non-functional. Transmitter frequencies in the range 
of 764 to 776 MHz (repeater talkaround) and 794 to 
						

							May 25, 20056881096C74-B
3-62Theory of Operation: Controller Section
3.7.4.12 Receiver VCOs
Receiver first local-oscillator frequencies are generated from two VCOs in U6755. U6755 is not 
serviceable and should be replaced if determined to be non-functional. For receiver frequencies in 
the range of 764 to 776 MHz, high-side, first local-oscillator injection of 837.35 to 849.35 MHz (Fc + 
73.35 MHz) is generated when Aux3 (pin 2) of U6751 is active high (3.0 Vdc). This 3.0 volts is 
applied to transistor switch Q6756 allowing the superfiltered 8.2-V supply to be connected to pin 2 
(SWBPOSC1), bias for the first VCO of U6755. For receiver frequencies in the range of 851 to 
870 MHz, low-side, first LO injection of 777.65 to 796.65 MHz (Fc - 73.35 MHz) is generated when 
Aux4 (pin 3) of U6751 is active high (3.0 Vdc). This 3.0 volts is applied to transistor switch Q6760 
allowing the superfiltered 8.2-V supply to be connected to pin 17 (SWBPOSC2), bias of the second 
VCO of U6755. Pin 20 (RFOUT) of U6755 is common to both oscillators and couples the oscillator’s 
output signal to the first stage of the receiver injection string. Frequency steering is accomplished 
through pin 8 (CONT_V) of U6755.
3.7.4.13 Prescaler Feedback 
RF feedback for the synthesizer loop is provided by prescaler amplifier Q6761. Feedback from both 
the transmitter and receiver injection strings are coupled to this amplifier through resistor networks 
that both balance and attenuate the levels prior to amplification by Q6761. The output of Q6761 is 
coupled to U6751 at pin 32 (PREIN), which is the prescaler input for the synthesizer.
3.8 Controller Section
The controller section consists of a daughtercard module and associated circuitry to which it 
interfaces. It is the central interface between the various subsystems of the radio. Its main task is to 
interpret user input, provide user feedback, and schedule events in the radio operation, which 
include programming ICs, performing digital signal processing (DSP) on baseband audio and data, 
and sending messages to the control head display. Figure 3-43 on page 3-63 illustrates the 
components of the controller section.
The DSP section of the microprocessor performs digital vocoder (voice coder-decoder) functions 
previously performed by analog circuitry. This includes all tone signaling, trunking signaling, and 
conventional analog voice processing.
All analog signal processing is accomplished digitally using the Patriot IC microprocessor (U100). 
This microprocessor consists of a microcontroller, as well as a DSP. In addition, it provides a digital 
voice plus data capability utilizing IMBE voice-compression algorithms. Vocoder is the general term 
used to refer to these DSP-based systems. 
						

							6881096C74-BMay 25, 2005
Theory of Operation: Controller Section3-63
Figure 3-43.  XTL 5000 Controller Section
The controller consists of digital logic comprised of a microprocessor (the Patriot IC, U100) and 
memory consisting of a 512K x 16 SRAM (U103) and a 4M x 16 FLASH ROM (U102). The 
microprocessor is a dual-core processor that contains a DSP56600 core and an MCORE 
microcontroller with custom peripherals. The term, MCU, refers to the MCORE controller section of 
the Patriot IC. The FLASH ROM contains the programs that the Patriot microprocessor executes and 
is used to store customer-specific information and radio-personality features that, together, 
constitute the codeplug. It allows the controller firmware to be reprogrammed for future software 
upgrades or feature enhancements. The SRAM is used for scratchpad memory during program 
execution.
The controller performs the programming of all peripheral ICs. This is done via a serial peripheral 
interface (SPI) bus and through General-Purpose Input/Outputs (GPIO) from the Patriot IC. ICs 
programmed through this interface include the LVFrac-N synthesizer, ABACUS III IC, D/A converter 
(DAC), A/-D converter (ADC), and volume digital potentiometer.
In addition to the SPI bus, the controller also maintains two asynchronous serial busses: the SB9600 
bus and an RS-232/USB serial bus. The SB9600 bus interfaces the controller section to different 
hardware accessories, some of which may be external to the radio, including the control head. The 
RS-232/USB bus is used as a common data interface for external devices and for programming/
flashing the radio.
User input is from the control head and is sent to the controller through the SB9600 bus. Feedback to 
the user is provided by the control-head display.
The controller schedules the activities of the DSP, including setting operational modes and 
parameters. The DSP section of the processor contains an 84K x 24 program RAM, 2K x 24 program 
ROM, and 62K x 16 data RAM, which are all integrated into the Patriot IC. The vocoder subsystem 
consists of this DSP core, the modulation DAC (U0900), and the voice CODEC (U0200).
From ABACUS  (U6000)
To TX Modulation DAC (U0900)
To ABACUS  (U6000),
LV-FRAC-N (U6751),
DAC (U0959), ADC (U0953)BBP TX 2.4MHz CLK: 48kHz FS BBP RX 1.2MHz CLK: 20kHz FS
SPI (CLK, MOSI, MISO) 512kHz CLK, 8kHz FSSAP SSI Digital Audio
Encryption Connector
Keyfail
AUDIO
CODEC
U0200
Volume POT
U02061.8V
To Memory1.55V
To PATRIOT CORE SB9600
(UART B)USB/RS232
(UART A)
5V SWB+ A+
MicSpeaker
Control Head Rear Accessory Connector
VIP’s
EMERG,
PTT*,
IGNITIONSB9600
CircuitRS232
XCVR
U0305USB
XCVR
U0304
RS232 (12V)
SB9600 (5V)SWB+
RS232 (4-wire)
USB 2.85V
To Audio,  PATRIOT,
Power Control, UART
XCVRs, Secure
PATRIOT1.55V
2.85V
From RF Ref. Oscillator16.8MHz
32kHz
1.8V
1.8V
56600 DSP
DSP RAM
MCORE
EIM
I/O,
UART’s8MB
FLASH
512kB
SRAMSW_B+SW_A+9V
Regulator
LM2941T
9.3V
5VTo SB9600
and VIP Circuitry
2.85V
Regulator
LP29511.8V
Regulator
LP29511.55V
Regulator
LP2951
AUDIO PA
U02045V
Regulator
MC78M05
Speaker
PGA’s
U0201, U0202
MAEPF-27893-O 
						

							May 25, 20056881096C74-B
3-64Theory of Operation: Controller Section
In receive mode, the ABACUS III IC provides data samples directly to the DSP for processing. In 
transmit mode, the DAC provides a serial D/A converter. The data generated by the DSP is filtered 
and reconstructed as an analog signal to present a modulation signal to the VCO (voltage-controlled 
oscillator) at the LV Frac-N synthesizer. Both the transmit and receive digital data paths between the 
DSP and the CODEC are through the Patriot IC BBP (Baseband Interface Port) SSI port.
The CODEC provides A/D conversion of the analog microphone signal and D/A conversion of the 
analog speaker output. During transmit, the microphone audio is passed through the gain/filtering 
analog circuitry to the CODEC, which translates the analog waveform to serial SSI data. This data is 
made available to the DSP through the Serial Audio Port (SAP) of the Patriot IC. Conversely, the 
DSP writes speaker data samples to the D/A in the CODEC through the SAP port. The CODEC 
provides an analog speaker output audio signal to the audio power amplifier, U0204.
3.8.1 Daughtercard Module
The daughtercard module (Figure 3-44) contains the central processing unit (CPU) of the radio. This 
module interfaces with other parts of the main board. This module primarily contains three sections:
• Microprocessor (Patriot IC: U100): consists of a controller and a DSP whose functions are 
described above in “3.8. Controller Section” on page 3-62.
• FLASH IC (U102): the firmware storage IC
• SRAM IC (U103): used by the microprocessor to perform its memory operations
NOTE:The three sections of the daughtercard module are highly susceptible to ESD and moisture 
damage. Extreme care is advised when handling or servicing the main board.
Figure 3-44.  XTL 5000 Daughtercard Module
SAP Digital Audio
SPI BBP RX
BBP TX
PATRIOT
56600 DSP
MCORE
EIM
I/O,
UART’s
VDD_CORE
VDD_EIM
VDD_I/O
CKIH
CKIL
16-bit3.0V 1.5V
1.8V
16.8MHz, 1.5V p-p sinewave
32kHz, 2.85V p-p sinewave
8MB
FLASH
1M
SRAM
To Codec
To ABACUS,  LV-FRAC-N,
DAC, ADC, Volume POT From ABACUS
To DAC
GPIO
SB9600
(UART B)USB/RS232
(UART A)
DSP RAM
MAEPF-27819-O