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Motorola Astro Digital Mobile Radio Xtl5000 Detailled 6881096c74 B Manual

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    							6881096C74-BMay 25, 2005
    Theory of Operation: Frequency Generation Unit (FGU) 3-45
    Protection Mechanisms
    Final-stage temperature is sensed in the RFPA resulting in VTEMP, which is proportional to 
    temperature. VTEMP is compared against a reference voltage TEMP_1 (U0959, pin 9) via U0957-1. 
    When VTEMP exceeds TEMP_1, the U0957-1, pin 1, voltage increases and forward biases one of 
    the D0951 diodes, which cuts back power. Power continues to cut back with rising temperature until 
    the voltage level at the junction of R0978 and R0983 is high enough to forward bias D0952, thus 
    clamping the cut back so that the radio meets its duty cycle specification while providing protection 
    against high-temperature conditions. The clamping level is set via TEMP_2 (U0959, pin 10) and 
    U0957-2. U0957-3 is used to sense if a high A+ battery voltage condition exists and, if it does, the 
    Q0955 gate is biased on, which increases the clamp voltage allowing for additional power cutback 
    for a high A+, high temperature condition.
    Final-stage current is also monitored via VCURRENT, which is proportional to current. VCURRENT 
    is compared against a reference CURR_LIM_SET (U0959, pin 1) which is tuned after power 
    characterization. If VCURRENT exceeds CURR_LIM_SET, then U0957-4, pin 14, voltage rises and 
    forward biases one of the D0951 diodes, which limits power.
    Finally, control voltage is limited by U0956-4 and D0950. RFPA_CNTRL can rise to the control 
    voltage limit set by R0942-4.
    3.7 Frequency Generation Unit (FGU)
    This section of the theory of operation provides a detailed circuit description of the frequency 
    generation unit (FGU).
    3.7.1 VHF (136-174 MHz) Band
    The FGU (Figure 3-35 on page 3-46) provides the XTL 5000 radio with a 16.8 MHz reference 
    frequency, receiver 1st local oscillator, and a modulated transmitter RF carrier that is further 
    amplified by the power amplifier section of the radio.
    The FGU consists of the following:
    • Reference oscillator (Y3750)
    • Low-voltage Fractional-N (LV Frac-N) synthesizer (U3751)
    • Two transmitter VCOs
    • Three transmitter buffer/amplifier stages
    • Two Receiver VCOs
    • Three receiver buffer/amplifier stages 
    						
    							May 25, 20056881096C74-B
    3-46Theory of Operation: Frequency Generation Unit (FGU)
    Figure 3-35.  Frequency Generation Unit Block Diagram (VHF)
    3.7.1.1  Reference Oscillator
    The radios frequency stability and accuracy is derived from the 16.8 MHz reference oscillator 
    (Y3750). The 16.8 MHz reference oscillator circuitry provides a 16.8 MHz reference to the LV Frac-N 
    (U3751), receiver backend IC (U3000), and the controller section of the XTL 5000 radio. The 
    reference oscillator circuitry consists of the reference oscillator Y3750 and the inverter/buffer circuitry 
    containing the active device U3752. Y3750 is a voltage-controlled, temperature-compensated crystal 
    oscillator (VCTCXO). Circuitry internal to Y3750 compensates for frequency error over temperature. 
    Warping of the oscillator on frequency is accomplished via a programmable DAC in the LV Frac-N. 
    The warp voltage is present at pin 25 (WARP) of U3751 and is applied to pin 1 of Y3750. The 
    16.8 MHz output frequency of Y3750 is capacitor-coupled to pin 23 of the LV Frac-N (U3751) and 
    also to the inverter/buffer stage U3752. L3754and C3824 at the output of U3752 filter the 16.8 MHz 
    signal, and R3768 along with C3830 set the appropriate amplitude of the signal for the receiver back-
    end and controller sections.
    3.7.1.2  LV Frac-N Synthesizer IC
    The LV Frac-N IC (U3751) functions include frequency synthesis, modulation control, voltage 
    multiplication and filtering, and auxiliary logic outputs for VCO selection.
      		
    	
    	
    
    	
    	
    
    
    
    
    
    
    
    
     
      
    
    
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    							6881096C74-BMay 25, 2005
    Theory of Operation: Frequency Generation Unit (FGU) 3-47
    U3751 is a mixed-mode IC containing digital and analog circuits. Separate power supply inputs are 
    used for the various functional blocks on the IC. Inductors L3757 and L3756 provide isolation 
    between supply pin 20 (AVDD - analog supply input) and pin 36 (DVDD - digital supply input) 
    connected to F3.0v. This 3.0 V DC supply is provided by U3750, a 3-V regulator IC.
    All programmable variables on the synthesizer IC, such as the synthesizer frequency; reference- 
    oscillator warping; adapt-timer duration; modulation-attenuator setting; and auxiliary-control outputs, 
    which select one of four voltage-controlled oscillators, can be programmed through a serial 
    peripheral interface (SPI). The SPI is connected to the controller microcomputer via three 
    programming lines, namely the data (pin 7), clock (pin 8), and the chip enable (pin 9) of U3751 
    (Figure 3-36).
    Figure 3-36.  Waveform Representation During Programming of the LV Frac-N IC (VHF)
    3.7.1.3  Voltage Multiplier
    Pin 12 (VMULT3) and pin 11 (VMULT4) of U3751, together with diode arrays D3757 and D3758 and 
    their associated capacitors C3763, C3764, C3765 and C3767, form the voltage multiplier. The 
    voltage multiplier generates 12.0 Vdc from the 3.0-V supply to supply the phase detector and 
    charge-pump output stage at pin 47 (VCP) of U3751. This voltage multiplier is basically a stacked, 
    multiple-diode capacitor network driven by two 1.05 MHz, 180 degrees out of phase signals from 
    pins 12 and 11 of U3751.
    3.7.1.4  Superfilter
    The superfilter is an active filter that provides a low-noise supply for the VCOs, receiver and 
    transmitter injection amplifiers. Regulator U0950, located in the controller section, supplies 9.3 Vdc 
    to the FGU section thru the filtering network consisting of L3752, C3811, C3751, and C3820. This 
    voltage is applied to pin 30 (SFIN) of U3751 and the emitter of Q3756. The output is a superfiltered 
    8.2 Vdc at the junction of pin 28 (SFOUT) of U3751 and the collector of Q3756. Filtering is 
    accomplished with capacitors C3821, C3753, and C3752 at the output of this circuit and C3823 at 
    pin 26 of U3751.
    3.7.1.5  Modulation
    To support many voice, data, and signaling protocols, XTL 5000 radios must modulate the 
    transmitter carrier frequency over a wide audio-frequency range, from less than 10 Hz up to more 
    than 6 kHz. The LV Frac-N IC supports audio frequencies down to zero Hz by using dual-port 
    modulation. The audio signal at pin 10 (MODIN) is internally divided into high- and low-frequency 
    components, which modulate both the synthesizer dividers and the external VCOs through signal 
    MODOUT (pin 41). The IC is adjusted to achieve flat modulation frequency response during 
    transmitter modulation balance calibration using a built-in modulation attenuator.
    The Digital-to-Analog Converter (DAC) IC (U0900), and switched-capacitor filter (SCF) IC (FL0900) 
    form the interface between the radios DSP and the analog input of the LV Frac-N IC.
    Pin 9 (Chip Select)
    Pin 7 (Data)
    Pin 8 (Clock)
    MAEPF-27805-O 
    						
    							May 25, 20056881096C74-B
    3-48Theory of Operation: Frequency Generation Unit (FGU)
    3.7.1.6  Charge Pump Bias
    External circuitry connected to pin 39 (Bias 2) and pin 40 (Bias 1) of U3751 determine the current 
    that is applied to the charge-pump circuitry. During receive mode, resistors R3778, R3763, and 
    R3758 set the current supplied to pin 40 (Bias 1). Transistor Q3755 and resistors R3779, R3756, 
    and capacitor C3808 form a circuit that momentarily increases the current to pin 40 (Bias 1) during 
    receiver programming of U3751. This circuit is activated by pin 46 (ADAPTSW) of U3751 during the 
    transition of programming U3751 to frequency and effectively decreases the length of time for the 
    synthesizer to lock on frequency. Similarly, during transmitter mode, resistors R3778, R3763, and 
    R3776 set the current supplied to pin 39 (Bias 2). Transistor Q3750 and resistors R3759, R3776, 
    and capacitor C3825 form a circuit that momentarily increases the current to pin 39 (Bias 2) during 
    transmitter programming of U3751.
    3.7.1.7  Loop Filter
    The loop filter operates in synchronization with the phase detector of U3751 in two modes, normal 
    and adapt. In normal mode, the loop filter forms a third-order loop filter consisting of components 
    R3765, R3773, R3770, C3833, C3810, C3834, C3855 to C3861 and C3881 to C3883.
    Pin 43 (IOUT) of U3751 provides the charge-pump current for steering of the control voltage line to 
    the VCOs. During normal mode, pin 45 (IADAPT) is set to a high impedance and has no effect on the 
    loop filter. When U3751 is programmed to a new frequency, the IC is initially operated in adapt mode. 
    In this mode the loop filter is reconfigured for a wider bandwidth allowing the synthesizer to lock 
    faster. The charge-pump output is supplied through pin 45 (IADAPT) in this mode, and this 
    reconfigures the loop filter to behave like a second-order filter.
    3.7.1.8  Lock Detect
    Lock status of the synthesizer loop is provided to the microprocessor by pin 4 (LOCK) of U3751. A 
    high level (3.0 Vdc) indicates that the loop is stable. A low voltage indicates that the loop is not 
    locked and will result in a Fail 001 to be displayed on the control head display.
    3.7.1.9  Transmitter Injection
    The transmit (TX) injection string consists of three amplifier stages (Q3760, Q3759, and Q3758) 
    whose main purpose is to maintain a constant output to drive the RF power amplifier and supply the 
    TX feedback signal to the FGU synthesizer loop. The first two stages are powered by the 
    superfiltered 8.2 Vdc, which is decreased by 0.7 Vdc via the dual diode D3750, resulting in a 7.5 Vdc 
    supply. The third stage is powered by the keyed 9.1 Vdc and the TX injection string is on only with 
    keyed 9.1 Vdc activated during transmit mode. The TX VCO output is attenuated 3 dB via resistors 
    R3840, R3833, and R3839. This output is coupled to the first-stage amplifier Q3760, further 
    attenuated 3 dB via resistors R3803, R3809, and R3803, and then coupled to the second-stage 
    amplifier Q3759. This output is tapped to supply the TX feedback signal to the synthesizer prescaler, 
    and the balance is further attenuated 5 dB via resistors R3818, R3823, and R3824. This output is 
    coupled to the third- stage amplifier Q3758, further attenuated 3 dB via resistors R3858, R3863, and 
    R3859, routed to the 7-pole Cow Chebychev low-pass filter C3917 through C3921, L3785, and 
    L3787 in order to attenuate harmonics. The output is, again, attenuated 3 dB via resistors R3842, 
    R3834, and R3841 and coupled to the input of the RF power amplifier section. The five sets of 
    resistive attenuators provide increased isolation between the TX VCO and RF power amplifier. 
    						
    							6881096C74-BMay 25, 2005
    Theory of Operation: Frequency Generation Unit (FGU) 3-49
    3.7.1.10 Receiver Injection
    The receiver (RX) injection string is a three-stage amplifier that supplies the RX feedback signal to 
    the FGU synthesizer loop and supplies the first local oscillator (LO) signal to the RX front-end mixer. 
    The RX VCO output is attenuated 3 dB via resistors R3825 through R3827 to increase isolation. This 
    buffered signal is amplified by the first-stage amplifier Q3761, which is supplied by the 8.2-V 
    superfilter for a gain of approximately 6 dB. Resistors R3790, R3798, R3800, and R3801 bias 
    Q3761. L3774 serves as a choke inductor; C3779 and C3868 are added for filtering. The output of 
    Q3761 is attenuated 9.5 dB via resistors R3854, R3865, and R3855. This output is coupled to 
    Q3769 which gain of approximately 3 dB. The output of Q3769 is split into two paths. The first path 
    feeds back to the synthesizer prescaler through blocking capacitor C3913. The second path, which 
    supplies the LO signal to the RX front-end mixer, is attenuated 3 dB via resistors R3857, R3864, and 
    R3856 to increase isolation. This buffered signal is amplified by the second-stage amplifier Q3762, 
    which is supplied by the 9.3-V regulator for a gain of approximately 15 dB. Resistors R3843, R3851, 
    and R3852 biases Q3762. L3783 serves as a choke inductor; C3873, C3870, and C3925 are added 
    for filtering. The output of Q3762 is passed through blocking capacitor C3759, then, routed to C3804, 
    L3781, C3786, and L3782 which form a low pass filter and attenuated 1 dB via resistors R3821, 
    R3794, and R3802 to increase isolation and supply approximately 20 dBm to the LO port of the 
    mixer.
    3.7.1.11 Transmitter VCOs
    Transmitter frequencies are generated from two external, discrete, Colpits VCOs, low band (136-
    155 MHz) and high band (155-174 MHz), based on Q3753 and Q3754 respectively. The VCOs are 
    switched On and Off by transistors Q3765 and Q3763, which are controlled by the Frac-N outputs 
    AUX1 and AUX2 respectively when turned high.
    3.7.1.12 Receiver VCOs
    The receiver first local oscillator frequencies are generated from two external, discrete, Colpits 
    VCOs, low band (245.65-264.65) and high band (264.65-283.65), based on Q3751 and Q3752 
    respectively. The VCOs are switched On and Off by transistors Q3766 and Q3764, which are 
    controlled by the Frac-N outputs AUX3 and AUX4 respectively when turned high.
    3.7.1.13 Prescaler Feedback
    RF feedback for the synthesizer loop is provided by prescaler amplifier Q3757. Feedback from both 
    the transmitter and receiver injection strings are coupled to this amplifier through resistor networks 
    that both balance and attenuate the levels prior to amplification by Q3757. The output of Q3757 is 
    coupled to U3751 at pin 32 (PREIN), which is the prescaler input for the synthesizer.
    3.7.2 UHF Range 1 (380–470 MHz) Band
    The FGU (Figure 3-37 on page 3-50) provides the XTL 5000 radio with a 16.8 MHz reference 
    frequency, receiver 1st local oscillator, and a modulated transmitter RF carrier that is further 
    amplified by the power amplifier section of the radio.
    The FGU consists of the following:
    • Reference oscillator (Y5750)
    • Low-voltage Fractional-N (LV Frac-N) synthesizer (U5752)
    • Three receiver voltage-controlled oscillators (VCOs) 
    • Two transmitter VCOs
    • Three receiver LO amplifiers (Q5904, Q5902 and Q5906)
    • Two transmitter injection amplifiers (Q5828, and Q5829) 
    						
    							May 25, 20056881096C74-B
    3-50Theory of Operation: Frequency Generation Unit (FGU)
    Figure 3-37.  Frequency Generation Unit Block Diagram (UHF Range 1)
    3.7.2.1  Reference Oscillator
    The radios frequency stability and accuracy is derived from the 16.8 MHz reference oscillator 
    (Y5750). The 16.8 MHz reference oscillator circuitry provides a 16.8 MHz reference to the LV Frac-N 
    (U5752), receiver back-end IC (U5002), and the controller section of the XTL 5000 radio. The 
    reference oscillator circuitry consists of the reference oscillator Y5750 and the inverter/buffer circuitry 
    containing the active device U5751. Y5750 is a voltage-controlled, temperature-compensated crystal 
    oscillator (VCTCXO). Circuitry internal to Y5750 compensates for frequency error over temperature. 
    Warping of the oscillator on frequency is accomplished via a programmable DAC in the LV Frac-N. 
    The warp voltage is present at pin 25 (WARP) of U5752 and is applied to pin 1 of Y5750. The 
    16.8 MHz output frequency of Y5750 is capacitor-coupled to pin 23 of the LV Frac-N (U5752) and 
    also to the inverter/buffer stage U5751. L5753 and C5768 at the output of U5751 filter the 16.8 MHz 
    signal, and R5768 along with C5763 set the appropriate amplitude of the signal for the receiver back-
    end and controller sections.
    3.7.2.2  LV Frac-N Synthesizer IC
    The LV Frac-N IC (U5752) functions include frequency synthesis, modulation control, voltage 
    multiplication and filtering, and auxiliary logic outputs for VCO selection.
    U5752 is a mixed-mode IC containing digital and analog circuits. Separate power supply inputs are 
    used for the various functional blocks on the IC. Inductors L5755 and L5756 provide isolation 
    between supply pin 20 (AVDD - analog supply input) and pin 36 (DVDD - digital supply input) 
    connected to F3.0v. This 3.0 V DC supply is provided by U5750, a 3-V regulator IC.
    Bias 1 3.0V3.0V
    3.0V
    3.0V
    8.2VLock Detect
    to ControllerPrescaler Input
    Q5755RF
    Feedback 8.2V Bias 2
    9.3VSFIN
    SFBASE
    SFOUTLock PREINAUX4AUX3
    Mod OutIADAPTIOUT AUX2AUX1 VMULT4 VMULT3 5.0V16.8MHz Reference
    to Controller and
    Receiver Back End
    VOLTAGE
    MULTIPLIER
    D5750 and
    D5751 16.8MHz OSC
    8.2V
    Super Filter
    Q5752U5751
    U5752 3.0V
    Regulator
    U5750 
    PHASE
    DETECTOR BIAS
    Q5750 RX and
    Q5751  TXCLOCK
    SYN_SEL
    D ATA
    MOD_IN From
    Controller
    NCAX0
    X1
    X2
    X3
    X4 B
    C7.5V 8.2V
    Q5706
    Q5707
    Q5708
    Q5709RX
    INJECTIONTX
    INJECTION
    RX
    InjectionTX
    Injection Keyed
    9.1V
    C5779
    C5780LOOP
    FILTER8.2V SW
    8.2V SW8.2V SW
    8.2V SW
    Q5825
    Q5826
    Q5901
    Q5903
    Q5905
    U5753
    Q57108.2V SW 
    						
    							6881096C74-BMay 25, 2005
    Theory of Operation: Frequency Generation Unit (FGU) 3-51
    All programmable variables on the synthesizer IC, such as the synthesizer frequency; reference- 
    oscillator warping; adapt-timer duration; modulation-attenuator setting; and auxiliary-control outputs, 
    which select one of five voltage-controlled oscillators, can be programmed through a serial 
    peripheral interface (SPI). The SPI is connected to the controller microcomputer via three 
    programming lines, namely the data (pin 7), clock (pin 8), and the chip enable (pin 9) of U5752 
    (Figure 3-38).
    Figure 3-38.  Waveform Representation During Programming of the LV Frac-N IC (UHF Range 1)
    3.7.2.3  Voltage Multiplier
    Pin 12 (VMULT3) and pin 11 (VMULT4) of U5752, together with diode arrays D5750 and D5751 and 
    their associated capacitors C5775, C5776, C5777 and C5778, form the voltage multiplier. The 
    voltage multiplier generates 13.4 Vdc from the 5.0-V supply to supply the phase detector and 
    charge-pump output stage at pin 47 (VCP) of U5752. This voltage multiplier is basically a stacked, 
    multiple-diode capacitor network driven by two 1.05 MHz, 180 degrees out of phase signals from 
    pins 12 and 11 of U5752.
    3.7.2.4  Superfilter
    The superfilter is an active filter that provides a low-noise supply for the VCOs, receiver and 
    transmitter injection amplifiers. Regulator U0950, located in the controller section, supplies 9.3 Vdc 
    to the FGU section thru the filtering network consisting of L5750, C5751, C5753, and C5755. This 
    voltage is applied to pin 30 (SFIN) of U5752 and the emitter of Q5752. The output is a superfiltered 
    8.2 Vdc at the junction of pin 28 (SFOUT) of U5752 and the collector of Q5752. Filtering is 
    accomplished with capacitors C5766, C5769, and C5772 at the output of this circuit and C5770 at 
    pin 26 of U5752.
    3.7.2.5  Modulation
    To support many voice, data, and signaling protocols, XTL 5000 radios must modulate the 
    transmitter carrier frequency over a wide audio-frequency range, from less than 10 Hz up to more 
    than 6 kHz. The LV Frac-N IC supports audio frequencies down to zero Hz by using dual-port 
    modulation. The audio signal at pin 10 (MODIN) is internally divided into high- and low-frequency 
    components, which modulate both the synthesizer dividers and the external VCOs through signal 
    MODOUT (pin 41). The IC is adjusted to achieve flat modulation frequency response during 
    transmitter modulation balance calibration using a built-in modulation attenuator.
    The Digital-to-Analog Converter (DAC) IC (U0900), and switched-capacitor filter (SCF) IC (FL0900) 
    form the interface between the radios DSP and the analog input of the LV Frac-N IC.
    Pin 9 (Chip Select)
    Pin 7 (Data)
    Pin 8 (Clock)
    MAEPF-27805-O 
    						
    							May 25, 20056881096C74-B
    3-52Theory of Operation: Frequency Generation Unit (FGU)
    3.7.2.6  Charge Pump Bias
    External circuitry connected to pin 39 (Bias 2) and pin 40 (Bias 1) of U5752 determine the current 
    that is applied to the charge-pump circuitry. During receive mode, resistors R5754, R5759, and 
    R5765 set the current supplied to pin 40 (Bias 1). Transistor Q5750 and resistors R5752, R5753, 
    and capacitor C5759 form a circuit that momentarily increases the current to pin 40 (Bias 1) during 
    receiver programming of U5752. This circuit is activated by pin 46 (ADAPTSW) of U5752 during the 
    transition of programming U5752 to frequency and effectively decreases the length of time for the 
    synthesizer to lock on frequency. Similarly, during transmitter mode, resistors R5764, R5759, and 
    R5753 set the current supplied to pin 39 (Bias 2). Transistor Q5752 and resistors R5767, R5764, 
    and capacitor C5762 form a circuit that momentarily increases the current to pin 39 (Bias 2) during 
    transmitter programming of U5752.
    3.7.2.7  Loop Filter
    The loop filter operates in synchronization with the phase detector of U5752 in two modes, normal 
    and adapt. In normal mode, the loop filter forms a third-order loop filter consisting of components 
    R5772, R5774, R5775, C5781 to C5787, C5790 to C5792, and C5809 to C5812.
    Pin 43 (IOUT) of U5752 provides the charge-pump current for steering of the control voltage line to 
    the VCOs. During normal mode, pin 45 (IADAPT) is set to a high impedance and has no effect on the 
    loop filter. When U5752 is programmed to a new frequency, the IC is initially operated in adapt mode. 
    In this mode the loop filter is reconfigured for a wider bandwidth allowing the synthesizer to lock 
    faster. The charge-pump output is supplied through pin 45 (IADAPT) in this mode, and this 
    reconfigures the loop filter to behave like a second-order filter.
    3.7.2.8  Lock Detect
    Lock status of the synthesizer loop is provided to the microprocessor by pin 4 (LOCK) of U5752. A 
    high level (3.0 Vdc) indicates that the loop is stable. A low voltage indicates that the loop is not 
    locked and will result in a Fail 001 to be displayed on the control head display.
    3.7.2.9  Transmitter Injection
    The transmit (TX) injection string consists of three amplifier stages (Q5828, Q5829, and Q5501) 
    whose main purpose is to maintain a constant output to drive the RF power amplifier chain and 
    supply the TX feedback signal to the FGU synthesizer loop. The first two stages are powered by the 
    superfiltered 8.2 Vdc, which is decreased by 0.7 Vdc via the dual diode D5833, resulting in a 7.5 Vdc 
    supply. The third stage is powered by the keyed 9.1 Vdc and the TX injection string is on only with 
    keyed 9.1 Vdc activated during transmit mode.
    The output of the second stage amplifier Q5829 is tapped via capacitor C5863 to supply the TX 
    feedback signal to the synthesizer prescalar via the amplifier Q5755.
    3.7.2.10 Receiver Injection
    The receiver (RX) injection string is a four-stage amplifier that supplies the RX feedback signal to the 
    FGU synthesizer loop and supplies the first local oscillator (LO) signal to the RX front-end mixer. 
    Each RX VCO output is attenuated via resistive pads to increase isolation. The VCO signals are 
    buffered by the RX injection amplifier string Q5904, Q5902 and Q5906. The output of Q5906 is 
    tapped via C5957 and fed back to the synthesizer prescaler through amplifier Q5755. The main path 
    at the output of Q5906 is amplified by U5303 to a level of 24 dBm to provide the first LO signal to the 
    RX front end mixer in the receiver chain. 
    						
    							6881096C74-BMay 25, 2005
    Theory of Operation: Frequency Generation Unit (FGU) 3-53
    3.7.2.11 Transmitter VCOs
    Transmitter frequencies are generated from two VCOs, Q5825 and Q5826.
    • Q5825 supplies frequencies in the range 380 MHz up to (but not including) 425 MHz.
    • Q5826 supplies frequencies in the range from 425 MHz to 470 MHz.
    3.7.2.12 Receiver VCOs
    Receiver first local-oscillator frequencies are generated from three VCOs, Q5901, Q5903 and 
    Q5905. 
    • Q5901 supplies frequencies in the range 489.65 MHz up to (but not including) 519.65 MHz.
    • Q5903 supplies frequencies in the range 519.65 MHz up to (but not including) 549.65 MHz.
    • Q5905 supplies frequencies in the range 549.65 MHz up to 579.65 MHz.
    The RX VCOs operate at frequencies which are 109.65 MHz higher than the radio channel selected 
    frequency since the receiver is high side injected, and the first IF frequency is 109.65 MHz.
    The five VCOs are selected by the following pattern of logic levels on the AUX pins from the 
    synthesizer chip U5752 (Table 3-11):
    3.7.2.13 Prescaler Feedback 
    RF feedback for the synthesizer loop is provided by prescaler amplifier Q5755. Feedback from both 
    the transmitter and receiver injection strings are coupled to this amplifier through capacitors C5863 
    and C5957. The output of Q5755 is coupled to U5752 at pin 32 (PREIN), which is the prescaler input 
    for the synthesizer.Table 3-11.  VCO AUX Pin Logic UHF Range 1
    VCOAUX1AUX2AUX3
    RX VCO Q5901 0 1 0
    RX VCO Q5903 1 1 0
    RX VCO Q5905 0 0 1
    TX VCO Q5825 0 0 0
    TX VCO Q5826 1 0 0 
    						
    							May 25, 20056881096C74-B
    3-54Theory of Operation: Frequency Generation Unit (FGU)
    3.7.3 UHF Range 2 (450–520 MHz) Band
    The FGU (Figure 3-39) provides the XTL 5000 radio with a 16.8 MHz reference frequency, receiver 
    1st local oscillator, and a modulated transmitter RF carrier that is further amplified by the power 
    amplifier section of the radio.
    The FGU consists of the following:
    • Reference oscillator (Y5750)
    • Low-voltage Fractional-N (LV Frac-N) synthesizer (U5752)
    • Three receiver voltage-controlled oscillators (VCOs) 
    • Two transmitter VCOs
    • Three receiver LO amplifiers (Q5904, Q5902 and Q5906)
    • Two transmitter injection amplifiers (Q5828, and Q5829)
    Figure 3-39.  Frequency Generation Unit Block Diagram (UHF Range 2)
    Bias 1 3.0V3.0V
    3.0V
    3.0V
    8.2VLock Detect
    to ControllerPrescaler Input
    Q5755RF
    Feedback 8.2V Bias 2
    9.3VSFIN
    SFBASE
    SFOUTLock PREINAUX4AUX3
    Mod OutIADAPTIOUT AUX2AUX1 VMULT4 VMULT3 5.0V16.8MHz Reference
    to Controller and
    Receiver Back End
    VOLTAGE
    MULTIPLIER
    D5750 and
    D5751 16.8MHz OSC
    8.2V
    Super Filter
    Q5752U5751
    U5752 3.0V
    Regulator
    U5750 
    PHASE
    DETECTOR BIAS
    Q5750 RX and
    Q5751  TXCLOCK
    SYN_SEL
    D ATA
    MOD_IN From
    Controller
    NCAX0
    X1
    X2
    X3
    X4 B
    C7.5V 8.2V
    Q5706
    Q5707
    Q5708
    Q5709RX
    INJECTIONTX
    INJECTION
    RX
    InjectionTX
    Injection Keyed
    9.1V
    C5779
    C5780LOOP
    FILTER8.2V SW
    8.2V SW8.2V SW
    8.2V SW
    Q5825
    Q5826
    Q5901
    Q5903
    Q5905
    U5753
    Q57108.2V SW 
    						
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