Acer Extensa 610 Service Guide
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2-64Service GuideTable 2-13PCI1131 Pin Descriptions (Continued)TERMINALNAME NO.I/OTYPEFUNCTIONPCI Address and Data TerminalsC/BE3 180 C/BE2 192 C/BE1 203 C/BE0 5I/O8us commands and byte enables. These are muitiplexed on the same PCI terminals. During the address phase, C/BE-0 define the bus command. During the data phase, C /ENEW-O are used as byte enables. The byte enables determine which byte lanes carry meaningful data. C/BE0 applies to byte 0 (AD7-0), C/BE1 applies to byte 1 (AD15-8), C/BE2...
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Major Chips Description2-65Table 2-13PCI1131 Pin Descriptions (Continued)TERMINALNAME NO.I/OTYPEFUNCTIONPCI Interface Control TerminalsTRDY 196I/OTarget ready. Indicates the PCI 1131 ability to complete the current data phase of the transaction. TRDY is used in conjunction with IRDY. A data phase is completed on any clock where both TRDY I/O are sampled asserted. During a read, TRDY indicates that valid data is present on AD31-0. During a write, TRDY indicates the PCI1131 is prepared to accept...
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2-66Service GuideTable 2-13PCI1131 Pin Descriptions (Continued)TERMINALName SlotSlotI/OTYPEFUNCTION A+ B¹ ¹1 6-bit PC Card Address and Data (Slots A and B)D1593 27 D1491 25 D1389 23 D1287 20 D1184 18 D10147 81 D9145 79 D8142 77 D690 24 D588 21 D485 19 D383 17 D2146 80 D1144 78 D0141 76I/OPC Card Data. 16-bit PC Card data lines. D15 is the most significant bit.1 6-bit PC Card Interface Control Signals (Slots A...
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Major Chips Description2-67Table 2-13PCI1131 Pin Descriptions (Continued)TERMINALName SlotSlotI/OTYPEFUNCTION A+ B¹ ¹1 6-bit PC Card Interface Control Signals (Slots A and B)BVD2137 71 (SPKR)IBattery Voltage Detect 2. Generated by 16-bit memory PC Cards that include batteries. BVD2 is used with BVD 1 as an indication of the condition of the batteries on a memory PC Card. Both BVD 1 and BVD2 are high when the battery is good. When BVD2 is low and BVD1 is high, the battery is weak and...
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2-68Service GuideTable 2-13PCI1131 Pin Descriptions (Continued)TERMINALName SlotSlotI/OTYPEFUNCTION A+ B¹ ¹1 6-bit PC Card Address and Data (Slots A and B)IORD99 33OI/O Read. LORD is asserted by the PCI1131 to enable 16-bit l/O PC Card data output during host I/O read cycles. (DMA Write) This pin is used as the DMA write strobe during DMA operations from a 16-bit PC Card which supports DMA. The PCI 1131 asserts this signal during DMA transfers from the PC Card to host memory.IOWR101...
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Major Chips Description2-69Table 2-13PCI1131 Pin Descriptions (Continued)TERMINALName SlotSlotI/OTYPEFUNCTION A+ B¹ ¹1 6-bit PC Card Interface Control Signals (Slots A and B)WP139 73 (IOIS16)IWrite Protect. This signal applies to 16-bit Memory PC Cards. WP reflects the status of the write-protect switch on 16-bitmemory PC Cards. For 16-bit l/O cards, WP is used for the 16-bit port ( IOIS16) function. The status of the signal can be read from the interface status register. (I/O is 16...
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2-70Service GuideTable 2-13PCI1131 Pin Descriptions (Continued)TERMINALName SlotSlotI/OTYPEFUNCTION A+ B¹ ¹CardBus PC Card Address and Data Signals (Slots A and B)CC/BE0 94 28 CC/BE1104 39 CC/BE2117 52 CC/BE3130 63I/OCardBus PC Card Command and Byte Enables. These signals are multiplexed on the same pin. During the address phase of the transaction, CC/BE3 0 define the bus command. During the data I/O phase transaction, CC/BE3-0 are used as Byte Enables. Byte Enables are...
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Major Chips Description2-71Table 2-13PCI1131 Pin Descriptions (Continued)TERMINALName SlotSlotI/OTYPEFUNCTION A+ B¹ ¹CardBus PC Card Interface Control Signals (Slots A and B)CBLOCK 107 42I/OCardBus Lock. This is an optional signal used to lock a particular address, ensuring a bus initiator exclusive access. NOTE: This signal is not supported on the PCI 1131.CDEVSEL 111 47I/OCardBus Device Select. When actively driven, this signal indicates that the PCI 1131 has decoded its address as...
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2-72Service GuideTable 2-13PCI1131 Pin Descriptions (Continued)TERMINALName SlotSlotI/OTYPEFUNCTION A+ B¹ ¹CardBus PC Card Interface Control Signals (Slots A and B)CREQ127 61ICardBus Request. This signal ir1dicates to the arbiter that the CardBus PC Card desires use the CardBus bus.CGNT110 46OCardBus Grant. This signal is driven by the PCI 1131 to grant a CardBus PC Card access to the CardBus bus after the current data transaction has completedCPERR108 43I/OCardBus Parity...
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Major Chips Description2-73Table 2-13PCI1131 Pin Descriptions (Continued) TERMINALNAME NOI /O TYPEFUNCTIONInterrupt TerminalsIRQ3/INTA 154 IRQ4/INTB 155OInterrupt Request 3 and Interrupt Request 4. These terminals may be connected to either PCI or ISA interrupts. These terminals are software configurable as IRQ3 or T1VTA, and as IRQ4 or T1~. When configured for IRQ3 and IRQ4, these terminals should be connected to the ISA IRQ programmable interrupt controller. When these pins...