Casio Qt6000 Service Manual
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Page 61
— 59 — NO. PIN NAME I/O DESCRIPTION 110 WE3/ICIOWR O D31–D24 select signal 111 VDD Power Internal VDD 112 VSS Power Internal GND 113 SLEEP I Sleep 114 PCIGNT4 O Bus grant (host function) 115 PCIGNT3 O Bus grant (host function) 116 PCIGNT2 O Bus grant (host function) 117 PCIREQ4 I* Bus request (host function) 118 PCIREQ3/MD10 I* Bus request (host function)/mode 119 VDDQ Power IO VDD 120 VSSQ Power IO GND 121 PCIREQ2/MD9 I* Bus request (host function)/mode 122 IDSEL I Configuration device select 123 INTA O...
Page 62
— 60 — NO. PIN NAME I/O DESCRIPTION 165 AD14 166 AD13 I/O PCI address/data/port 167 AD12 168 AD11 169 VDDQ Power IO VDD 170 VSSQ Power IO GND 171 AD10 172 AD9 I/O PCI address/data/port 173 AD8 174 C/BE0 I/O Command/byte enable 175 VDD Power Internal VDD 176 VSS Power Internal GND 177 AD7 178 AD6 179 AD5 I/O PCI address/data/port 180 AD4 181 AD3 182 AD2 183 VDDQ Power I/O VDD 184 VSSQ Power I/O GND 185 AD1 I/O PCI address/data/port 186 AD0 I/O PCI address/data/port 187 IRL0 I Interrupt 0 188 IRL1 I...
Page 63
— 61 — NO. PIN NAME I/O DESCRIPTION 219 AUDSYNC–AUD sync 220 AUDCK–AUD clock 221 VDDQ Power IO VDD 222 VSSQ Power IO GND 223 AUDATA0 –AUD data 224 AUDATA1 225 VDD Power Internal VDD 226 VSS Power Internal GND 227 AUDATA2 –AUD data 228 AUDATA3 229 Reserved–Do not connect 230 MD3/CE2A I/O Mode/PCMCIA-CE 231 MD4/CE2B I/O Mode/PCMCIA-CE 232 MD5 I Mode MD5 233 VDDQ Power IO VDD 234 VSSQ Power IO GND 235 DACK0 O DMAC0 bus acknowledge 236 DACK1 O DMAC1 bus acknowledge 237 DRAK0 O DMAC0 request acknowledge 238...
Page 64
— 62 — 8-8. I/O CONTROLLER (IC44: uPD784215AGC8018EU) 8-8-1. Pin Assignment 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 2575 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 10076 P120/RTP0 P121/RTP1 P122/RTP2 P123/RTP3 P124/RTP4 P125/RTP5 P126/RTP6 P127/RTP7 V DD X2 X1 V SS XT2 XT1 RESET P00/INTP0 P01/INTP1 P02/INTP2/NMI P03/INTP3 P04/INTP4 P05/INTP5 P06/INTP6 AV DD AVREF0 P10/ANI0 P62/A18 P61/A17 P60/A16 V SS P57/A15 P56/A14 P55/A13...
Page 65
— 63 — 8-8-2. Block Diagram INTP2/NMI INTP0, INTP1, INTP3-INTP6 PROGRAMMABLEINTERRUPTCONTROLLER REAL-TIME OUTPUT PORT TIMER/COUNTER7 TIMER/COUNTER6 TIMER/COUNTER5 TIMER/COUNTER2 TIMER/COUNTER1 (8 BITS) (8 BITS) (8 BITS) (8 BITS) (8 BITS) (8 BITS) TIMER/COUNTER(16 BITS) WATCH TIMER TIMER/COUNTER8 WATCHDOG TIMER TI00 TI01 TO0 TI1 TO1 TI2 TO2 TI5/TO5 TI6/TO6 TI7/TO7 TI8/TO8 RTP0-RTP7 CLOCK OUTPUTCONTROLA/D CONVERTER AVDDAVSSP03 NMI/INTP2 PCL BUZ AV REF0ANI0-ANI7D/A CONVERTER ANO0 AV SS AVREF1 ANO178K/IV CPU...
Page 66
— 64 — 8-8-3. Pin Function PIN NO.PIN NAME I / O DESCRIPTION 1 P120/RTP0 2 P121/RTP1 3 P122/RTP2 4 P123/RTP3 5 P124/RTP4 6 P125/RTP5 7 P126/RTP6 8 P127/RTP7 9 VDD - Power Supply 10 X2 - 11 X1 I 12 VSS - GND 13 XT2 - 14 XT1 I 15 RESET IReset 16 P00/INTP0 17 P01/INTP1 18 P02/INTP2/NMI 19 P03/INTP3 20 P04/INTP4 21 P05/INTP5 22 P06/INTP6 23 AVDD -A/D CONVERTER POWER SUPPLY 24 AVREF0 -Application of Standard Voltage for A/D CONVERTER 25 P10/ANI0 26 P11/ANI1 27 P12/ANI2 28 P13/ANI3 29 P14/ANI4 30 P15/ANI5 31...
Page 67
— 65 — PIN NO.PIN NAME I / O DESCRIPTION 51 P83/A3 52 P84/A4 53 P85/A5 54 P86/A6 55 P87/A7 56 P40/AD0 57 P41/AD1 58 P42/AD2 59 P43/AD3 60 P44/AD4 61 P45/AD5 62 P46/AD6 63 P47/AD7 64 P50/A8 65 P51/A9 66 P52/A10 67 P53/A11 68 P54/A12 69 P55/A13 70 P56/A14 71 P57/A15 72 VSS - GND 73 P60/A16 74 P61/A17 75 P62/A18 76 P63/A19 77 P64/RD 78 P65/WR 79 P66/WAIT 80 P67/ASTB 81 VDD - Power Supply 82 P100/TI5/TO5 83 P101/TI6/TO6 84 P102/TI7/TO7 85 P103/TI8/TO8 86 P30/TO0 87 P31/TO1 88 P32/TO2 89 P33/TI1 90 P34/TI2 91...
Page 68
— 66 — 8-9. G/A (IC14: uPD65945GJ-093-JEU) 8-9-1. Pin Function PIN NO PIN NAME I / ODESCRIPTINPIN NO PIN NAME I / ODESCRIPTIN1 VDD VDD VDD 73 VDD VDD VDD 2 GD0 I/O ARC DATA (D0) 74CLKOUT OCLOCK 8MHz 3 GD1 I/O ARC DATA (D1) 75 CLKIN I CLOCK 8MHz 4 GD2 I/O ARC DATA (D2) 76 GND I GND 5 GD3 I/O ARC DATA (D3) 77 CS I Chip Select 5 6 GD4 I/O ARC DATA (D4) 78 A0 I ADDRESS (A1) 7 TVDD VDD VDD 79 A1 I ADDRESS (A2) 8 TGND GND GND 80 A2 I ADDRESS (A3) 9 GD5 I/O ARC DATA (D5) 81 A3 I GND 10 GD6 I/O...
Page 69
— 67 — 8-10. SDRAM (IC12: EDS2532AABH) DQ261A B C D E F G H J K L M N P R 23456789 DQ28 VSSQ VSSQ VDDQ VSS A4 A7 CLKDQ24 VDDQ DQ27 DQ29 DQ31 DQM3 A5 A8 CKEVSS VSSQ DQ25 DQ30 NC A3 A6 NC A9VDD VDDQ DQ22 DQ17 NC A2 A10 NC BA0DQ23 VSSQ DQ20 DQ18 DQ16 DQM2 A0 BA1 /CSDQ21 DQ19 VDDQ VDDQ VSSQ VDD A1 A11 /RAS (Top view) DQM1 NC NC /CAS /WEDQM0 VDDQ DQ8 VSS VDD DQ7 VSSQ VSSQ DQ10 DQ9 DQ6 DQ5 VDDQ VSSQ DQ12 DQ14 DQ1 DQ3 VDDQ DQ11 VDDQ VSSQ VDDQ VSSQ DQ4 DQ13 DQ15 VSS VDD DQ0 DQ2 90-ball FBGA ClockGenerator Mode...
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— 68 — 8-11. FLASH RAM (IC1: MBM29QM12DH) RESET RY/BY A 0A1A2A3A4A5VCCDQ0DQ1DQ2DQ3VSSQVCCQDQ4DQ5DQ6DQ7VSSN.C. A6A7A8A9A10A11A12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 2856 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 TSOP (1) (Top View) WP/ACC WE N.C. A 22A21A20OE N.C. CE V SSDQ15DQ14DQ13DQ12VSSQVCCQDQ11DQ10DQ9DQ8VCCA19A18A17A16A15A14A13 (Marking Side) (FPT-56P-M01) VCC VSS A22 to A0 RESET WE CE OE WP/ACC DQ 15 to DQ0 DQ15to DQ0 Bank A...