ATT DEFINITY Communications System Generic 3 Pocket Reference Instructions Manual

							CIRCUIT PACKS
CodeName
Type
TN746, BAnalog Line
Port
TN747BCO Trunk
Port
TN748C, DTone Detector
Service
TN750, BAnnouncementService
TN753
DID TrunkPort
TN754, B
Digital LinePort
TN755BPower Unit, Neon
Power
TN758Pooled Modem
Service
TN760D
Tie TrunkPort
TN762BHybrid LinePort
TN763B, C, DAuxiliary TrunkPort
TN767BDS1/E1 Interface
Port
TN768Tone-clock
Service
TN769Analog Line
Port
TN771DMaintenance/Test
Service
TN775BMaintenanceService
TN780Tone-clockService
TN1648System Access/MaintenanceService
TN1650BMemory
Control
TN1655Packet Interface
Control
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							CIRCUIT PACKS
CodeNameType
TN1656
Tape DriveControl
TN1657
Disk DriveControl
UN330BDuplicaton Interface
Control
UN331B
ProcessorControl
UN332Mass Storage/Network ControlControl
WP-91153
Power Supply (AC)Power
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							CONTROL CIRCUIT PACKS
CONTROL CIRCUIT PACKS
Call Classifier TN744 (G3V2)
Provides 8 ports for touch-tone reception and call classification. It
is required with OCM and call prompting applications.
One TN748C Tone Detector is required in each port network to sup-
port maintenance test tones when using the TN744 circuit pack.
Current Limiter Card 94782LS (G3iV2)
The 982LS connects to the back of the processor board slot. It pro-
vides current limited accessory 48 volts, emergency transfer logic,
current limited 5 volts to trip the main circuit breaker in a high tem-
perature condition, and duplicated 48 volts for the fan units in the
EPN cabinet.
Current Limiter CFY1B
The CFY1B connects to the back of the maintenance board slot. It
provides current limited accessory 48 volts, emergency transfer
logic, current limited 5 volts to trip the main circuit breaker in a high
temperature condition, and duplicated 48 volts for the fan units in
the EPN cabinet.
Disk Drive TN1657 (G3rV2)
Contains a small computer system interface (SCSI) disk drive that
provides mass data storage. The TN1657 reduces the system boot
time. Optional for direct connection between carriers; required for
using CSS.
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							CONTROL CIRCUIT PACKS
Duplication Interface TN772 (G3iV2)
Selects the active processing element (control complex) in a dupli-
cated system and coordinates the interchange of processing ele-
ments. Controls and provides the memory shadowing function with
the duplication option. Terminates the environmental sensors and
controls the integrated battery supply and charging circuits. Selects
the active tone-clock circuit pack. Provides the G3-Management
Terminal interface in place of the processor. A second Duplication
Interface circuit pack resides in the duplicated control
carrier/cabinet. It requires a cable connection to the Duplication
Interface circuit pack in the basic control carrier/cabinet.
Duplication Interface UN330B (G3rV2)
In a duplicated system, which has two switch processing elements
(SPEs), one UN330B resides in each SPE and is connected to the
other UN330B. These provide control and communication paths
between the SPEs to keep the redundant standby (inactive) SPE
ready to assume control of the active SPE fails. The UN330Bs pro-
vide the following functions:
lSelects active/standby mode for the two SPEs
lShadows (copies) the active SPE’s memory writes into
the standby SPE memory
lSupports inter-SPE communication such as two-way
general purpose mailbox
Memory shadowing is a bidirectional high-speed path between the
two SPEs. When memory shadowing is activated, all shadowed
memory writes on the active processors bus are sent across the
link and written into the standby processors memory. Standby
memory writes are not sent to the active processor.
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							CONTROL CIRCUIT PACKS
Expansion Interface TN776 (G3iV2)
Provides for the extension of the TDM bus from the PPN cabinet to
the TDM bus of the EPN cabinet. Packages the TDM control chan-
nel with LAPD control for transmission over the fiber link between
cabinets. Provides the time slot interchange between cabinets. A
system with ASAI/BRI requires TN570 Expansion Interface circuit
packs instead of TN776 Expansion Interface circuit packs to con-
nect the TDM bus and packet bus of the PPN to the TDM bus and
packet bus of the EPN(s).
Expansion Interface TN570 (G3iV2 and G3rV2)
TN570 is an interface in the fiber-optic links that interconnect
cabinets. It is used in a port network in the following cabinet
connections:
lBetween a port network and another port network in a
l
directly-connected system
Between a port network and a Switch Node Interface in a
switch node carrier in a Center Stage Switch-connected
system.
The TN570 also provides control channel connectivity and time slot
interchanging between the PPN and the EPNs.
The TN570 carries the following information: circuit-switched data,
packet-switched data, network control, timing control, and DS1 con-
trol.
Lightwave Transceivers (4-Type or 9823-Type)
Mount on an I/O connector located on the backplanes of multicarrier
cabinet (MCC) and single-carrier cabinet (SCC) systems requiring
an Expansion Port Network.
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							CONTROL CIRCUIT PACKS
Terminates the fiber optic link(s) between the PPN cabinet and the
EPN cabinet.
Maintenance TN775 (G3sV2, G3vsV2, G3iV2)
The TN775B is used for system maintenance and performs the fol-
lowing functions:
l
l
l
lMonitors power failure signals
Monitors the clock
Provides two serial links to communicate with expansion
interface circuit packs
Contains a three-position switch that controls emergency
power transfer
Monitors and controls power supplies and battery charger
Monitors air flow and high temperature sensors
Provides an EIA-232 interface for connection to an
l
l
l
administration terminal.
Maintenance/Test TN771D (G3V2)
The TN771C performs the following maintenance functions:
lPacket bus reconfiguration, which allows diagnosis and
correction of recoverable packet bus failures before the
link-access procedure on the D-channel (LAPD) links,
which use the bus, fail. LAPD is a link-layer protocol on
the ISDN-BRI and ISDN-PRI data link layer (level 2).
LAPD provides data transfer between two devices, and
error and flow control on multiple logic links. It recovers
packet bus failures involving up to three malfunctioning
leads (one or two data or parity leads, and one control
lead) by swapping spare leads with malfunctioning leads.
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							CONTROL CIRCUIT PACKS
lISDN-PRI testing, which makes test calls that originate
and terminate loop-back tests on the ISDN facilities. It
provides bit and block error rate information that can be
used to indicate ISDN facility quality.
Memory (CPP1) (G3iV2 and G3rV2)
The CPP1 accommodates an additional 4 megabytes of DRAM and
2 megabytes of Flash ROM. The CPP1 includes byte parity and
has the same access time as the memory on the Processor circuit
pack.
Mass Storage System/Network Control UN332
(G3rV2)
Provides a small computer system interface (SCSI) between the
processing element and the mass storage system (MSS), which 
consists of tape and disk drives. Provides network control for the
SPE. Terminates one end of the processor-multiplexed bus.
Memory TN770 (G3sV2, G3vsV2, G3iV2)
Contains system translations including addresses of equipment
connected to the switch through the port circuit packs and call pro-
cessing software. Provides 6 Mbytes of dynamic RAM with single-
bit error correction and double-bit error detection.
Memory TN1650B (G3rV2)
Provides 32 Mbytes of dynamic RAM. It has error detection and
correction circuitry to ensure information integrity and uses 4 Mbit
RAM chips.
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							CONTROL CIRCUIT PACKS
Network Control TN777B (G3sV2, G3vsV2,
G3iV2)
The TN777B provides the following functions
l
lCommunicates control channel messages between the
processor circuit pack and the distributed network of port
circuit packs on the Time Division Bus (TDM).
Controls the four channels that process and route infor-
mation directly from the processor circuit pack to the cus-
tomer connected equipment. Some of the possible equip-
ment connections are Data Services facilities, Station
Message Detail Recording devices, an on-premises
remote pooled modem or administration terminal, or an
off-premises administration terminal. Some of these con-
nections require modems as a Modular Processor Data
Module (MPDM) or a Modular Trunk Data Module
(MTDM).
Provides the time of day clock with battery back-up for
power failure or low voltage conditions. This circuit pack
also provides the system with a 24-hour clock used with
record keeping and system maintenance.
Monitors the status of system clocks and alerts the pro-
cessor circuit pack in the event of a failure of any clock.
Supports the duplicated processor option and handles all
l
l
l
control channel messages from the PPN or EPN net-
works over the TDM.
Packet Control TN778 (G3iV2)
Interfaces the packet bus with the SPE and terminates LAPD links.
Supports packet bus signaling for ISDN D-channel signaling for
ASAI applications and for packet bus maintenance.
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							CONTROL CIRCUIT PACKS
Packet Data Line TN553 (G3rV2)
In conjunction with a TN726B circuit pack, provides connections to
system ports.
Packet Gateway TN577 (G3rV2)
TN577 is an X.25 protocol interface between the system and
adjuncts. For example, the TN577 serves as the interface between
AUDIX and the system.
Packet Interface TN1655 (G3rV2)
Provides the communication path between the SPE and the LAN
bus in the PPN. This path is used by the EPNs and the CSS, via
EI circuit packs in the PPN, to communicate with the processor
(RISC).
The TN1655 also provides LAPD terminations of communication
links across the LAN bus that go to the RISC. The following major
links are terminated:
l
l
lISDN-BRI and ISDN-PRI signaling links
Expansion archangel links that connect the RISC to the
expansion archangels on EI circuit packs in each PN
Center stage control network links that connect the RISC
with the switch node interface circuit packs in the CSS
DCS links (Station Message Detail Recording (SMDR)
and adjuncts such as AUDIX)
Firmware downloading
l
l
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							 l
 l
 l
 l
 l
CONTROL CIRCUIT PACKS
Processor (TN786B) (G3vsV2, G3sV2, G3iV2)
The TN786B provides the means for storing and executing the
software which operates the system features. The Processor cir-
cuit pack consists of:
A 80386SX Intel processor
6 megabytes of Flash ROM
4 megabytes of DRAM
An interface to the MBUS
Logic to support the shadowing function in duplicated
systems
In addition, the Processor performs maintenance functions such as:
l
l
lMonitoring the sanity of the system Processor
Reporting system Processor failures
Releasing or resetting the system Processor on dupli-
cated systems
Monitoring and controlling cabinet level power supplies
Managing the alarm panel LED indicators.
l
l
Processor UN331B (G3rV2)
The UN331B is the main processor that manages the G3rV2 sys-
tem. The processor operates at 33 MHz and uses a MIPS RISC
3000 central processing unit (CPU) chip. The processor’s instruc-
tion set is stored in a 256-Kbyte cache memory on the UN331B.
Switch Node Clock TN572 (G3rV2)
Distributes all of the timing signals that synchronize the switch node
carrier in which it resides. Also receives maintenance data.
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