Panasonic Va-208 Key Telephone System Installation Manual

CONTENTS 
BLOCKDIAGRAM ............................................................. 1 
EXPLANATION OF CIRCUIT OPERATION (KSU) 
.................................... 2 
1. 
2. 
3. 
4. 
5. 
6. 
7. 
8. 
9. 
10. 
11. COLCircuit ............................................................... 2 
Relay Operation Circuit. ...................................................... 3 
Hold Tone Transmit Circuit 
.................................................... 4 
RAM Hold Circuit...

q BLOCK DIAGRAM 
To SLT ADPT 
From CO 
- To Tel No2 KSU (VA-208101 
--_-_____ -_-___---_--A---- --- 
COL BLOCK 1 
r~-------_7 I 
t 
r_-----__-_--- 
t 
I 
I 
, TONE 
LEiZ!5_-________ 
r ____----__ --- 
I 
I BUS 1 CPU 
I I POW SEN I I 
BAT ALM I 
! NPU BLOCK - 
I- 
L____----------- 
SYMBOL DESCRIPTION SYMBOL DESCRIPTION SYMBOL DESCRIPTION 
KSU Key Service Unit ICSD COL Detection Circuit DSR Data Transmission and Receive 
TX Central Line Transmit Tone Switch CLLC COL Loop Circuit XP Speech Path Switch 
PBS...

.- 
I 
TEL (VA-20820) 
a,S------ 
l---u 
csc 
- 
I 
. RVC 
17 
x P I 
‘.. 
I I I i 1NT-j X P 1 
I I 
I I 
HS2 
2 
-4 
- 
- 
- b 
& 
PS 
DSR  

C603 T61 
V GND C42 
--I R43 (7 
_I6 3 
Y - COL 1 - 
COL 24 
COL 3.5 L” 82 
R42 $ 
ROW 1 ‘4 
I i 
1 I & 
IC12 b IC5 
IC4 
(3) DTMF signal sending operation 
COL COL COL 123 
I 
IC12 
,Example) 
ilVhen the telephone is dialed No. 1, the 
pin No.3 and pin No. 14 of ICI2 is turne 
to 03 status 
When the DTMF signal is dialed on Key Telephone, ICI 2 generates desired DTMF signal according to the dialed 
telephone number, and amplified it by iC25 to send it to CO line via IC23 and T61. 
Besides, the signal...

n EXPLANATION 
OF CIRCUIT OPERATION 
1. COL Circuit 
WW 
1.1 COL incoming call detector circuit 
I. 
PH61 
To COL call (answering) 
_ circuit 
ZNR 
601 
DE62 
ZNR 
602 
Ro 
Incoming call from COL is full wave rectified by DB62, and the rectified signal is sent to PH61 photo coupler. 
PH61 photo coupler is synchronised to the incoming call signal and generates switched DC pulse. Then send it 
to IC4 pin No. 40 to identify if the signal is incoming COL call or not. (RLI operates when the power supply 
is...

2. Relay Operation Circuit 
. 
c13 
RLll 
+ 
RLIO 
t 1 I  
RL6 i 
Q13 D27 
 
i 
 
RLI : 
RL2 : 
RL3 : 
RL4 : 
RL5 : 
RL6 : 
RL7 : 
RL IO : 
RLII : 
IC4 
32 
84 
85 
@state on idle condition 
Operates when the COL 1 line is seized. 
Operates when the COL 2 line is seized. 
Operates when the dial signal sending to COL 1 line (by Di relay). 
Operates when the dial signal sending to COL 2 line (by Di relay). 
Operates when the dial signal sending and the COL 1 line holding (DS relay). 
Operates when the dial...

3. Hold Tone Transmit Circuit 
C603 
ZD602 
’ IC4 
+12v 
MOH 
IA R501 
c35 R93 D3 
R96 
C36 
r--- -- 91 
L__-_-. Q16 
c 
a- 
( 
R508 ‘f 
When the incoming call is hold at Key Telephone, 0 status is output on IC4-I36 (pin No. 24) by turn the SW2 
switch to RI side and SW1 switch is break. 
Then reverse it with IC24 to supply the base bias ON for 016, and IC31 (Hold tone memory IC) is actuated. 
Generated memory output on IC31 pin No. 5 and 6 is sent to IC27 and IC25 (Amplifier), and transmit it to 
CO...

4. RAM Hold Circuit 
L 
RI5 ZD 1 
87 25 (1 
RlB 
R14 
Q2 Q3 
IC1 @ 
R16 
24 
1 L: RAM disable 
vcc. = _L 
q : c4 
+ 
6RD 12’ I 0 
c3 
Rl9 
R21 
L+ 
R20 
---l-- 
I 
RAM 
HOLD 
SW 
In case of the power failure, +3V DC voltage is supplied to IC2-Vcc (pin No. 24) from backup battery to 
prevent erasure of memorised program in RAM. 
At the normal operation (AC power ON), the battery idle condition formed by @ status on IC5-B7 (pin 
No. 25), and the operation flow is as following sequence: 
02 
[OFFI -+ 03...

5. WD Circuit 
Cl5 .- 
RlO R12 
1 
IC4 @-+ C6 R5 
Id 
IC6 @ --&” 
D18 
i 
I__ 
07 L-__ 
; Q8 
J 
Cl7 
IC 
(R eset state = 2 to 3 sec. Q 
) 
l When the WD circuit detects abnormal condition on data communication between TEL and Link switch 
address output, the WD circuit executes system reset with sending out @ status on ICI-FIST (pin No.26) 
- 
and IC4 to 6-RST 
l WD circuit is monitor the status of data communication Inh signal of IC4 and address output of IC6 all 
times, in case of either signals are...

6. Power Failure Detect Circuit 
+12v 
0 Q 
IC4 ( i state on BATT alarm) 
0 IC4 
( #I$ state on power failure) 
t 0 
c BATT 12V 
F3 (2A) 
ti rP90 
b e t 12v 
R40 R55 
I 
‘I 
. 
- 
,52 Dll R54 
L J ---- 
‘L 06 D5lL 
D7 I 
I 
I ---1 
( 
I ’ I 
I 
I 350 
--- A 
010 
rQ--7 I 
IC7 
5V SW Regulator rl r’ 1 
013 R59 D12 
Power 
Source 
+ 
c99 
E, 
When AC power is failed, RL 9 relay operates by the voltage detection circuit, and change over the power 
source circuit to Battery circuit. Under the above...