NEC Neax 2400 Imx Circuit Card Manual

CHAPTER 3 ND-70182 (E)
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Revision 4.0
PH-CK16-A
Phase Lock Oscillator
PH-CK16-A
Phase Lock Oscillator
1. General Function
This circuit card, used together with a direct digital interface circuit card, sets up network synchronization.
With this circuit card, the system can be a clock subordinate office of the digital network. As seen in the
figure below, the PLO can be redundant regardless of the system switching network selection. This circuit
card is used for the IMX-U system. 

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PH-CK16-A
Phase Lock Oscillator
Figure 3-10   Location of PH-CK16-A (PLO) 
LN0
(IMG2/IMG3)LN3
(IMG2/IMG3)
32M, FH+WFH
PLO ACT32M, FH+WFH
PLO ACT
CLK1
(TSWM1)
TSW
10~13
CLK0
(TSWM1)
TSW
00~03
MUX
(System1)MUX
(System0)
LC/TRK
HSW00 ISW
HSW01
CLK1
(TSWM1)
TSW
10~13
CLK0
(TSWM1)
TSW
00~03
MUX
(System1)MUX
(System0)
LC/TRK
LN0
(IMG0/IMG1)from
LN DTIfrom
LN DTI
32M, FH+WFH
PLO ACT32M, FH+WFH
PLO ACT
(BWB)32M, FH+WFH
PLO ACT
(BWB)
64K+FH, WFH
TSW ACT
(Cable)64K+FH,...

CHAPTER 3 ND-70182 (E)
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PH-CK16-A
Phase Lock Oscillator
2. Mounting Location/Condition
This circuit card can be mounted in the shaded slots shown below.
Mounting ModuleISWM
00 01 02 03 04 05 06 07 0809 10 11 1213 14 15 16 17 18 19
00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 2021 2223
PLO (#0) PLO (#1)
Mounting ModuleTSWM0 (IMG1)
PLO (#0) PLO (#1) 

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PH-CK16-A
Phase Lock Oscillator
3. Face Layout of Lamps, Switches, and Connectors
The face layout of lamps, switches, and connectors are shown in Figure 3-11.
Figure 3-11   Face Layout of PH-CK16-A (PLO)
1   2  3  4  
1   2    
SW11
SW10SW12
MB OPE
1   2  3  4  5  6  7  8 
MJ
MN
SYNC
ICK
CKPKG
ALM0
ALM1
PALM
SW01
SW02
SW03
12345678 12345678 

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Revision 4.0
PH-CK16-A
Phase Lock Oscillator
4. Lamp Indications
Lamp indications for this circuit card are shown in the table below:
Note:This lamp is effective when this card is mounted in TSWM0 of the IMX-U system.
5. Switch Settings
Standard settings for switches on this circuit card are shown in the table below.
LAMP NAME COLOR STATE
OPE Green Remains lit while this circuit card is in active state.
MJ RedLights when the following MJ fault has occurred: 
All of the...

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PH-CK16-A
Phase Lock Oscillator
Note:
When this card is used in the 4-IMG or ISWM of the IMX-U system, specify the clock source (DCS or DTI)
according to the clock network configuration for the office.
Note 1:This standard setting is applicable when this card is mounted in TSWM0 of the IMX-U system.
SWITCH 
NAMESWITCH
NO.SETTINGSTANDARD 
SETTINGMEANING
SW01
Note1ON
×    Note 1Clock subordinate office.
OFF Clock source office.
2ON
×    Note 1Digital Clock...

CHAPTER 3 ND-70182 (E)
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PH-CK16-A
Phase Lock Oscillator
Note:
When this card is mounted in TSWM0 of the IMX-U system, the DCS clock from the ISW is used. The DTI
clock can also be used as an alternate clock supply route in case of DCS clock failure.
SWITCH 
NAMESWITCH
NO.SETTINGSTANDARD 
SETTINGMEANING
SW02
Note1ON DIU 0 is used as the DTI clock supply route zero.
OFF DIU 0 is not used.
2ON DIU 1 is used as the DTI clock supply route one.
OFF DIU 1 is not used.
3ON DIU 2 is used as...

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PH-CK16-A
Phase Lock Oscillator
SWITCH 
NAMESWITCH
NO.SETTINGSTANDARD 
SETTINGMEANING
SW111
2
3
4
SW121
2
3
4ON Not used
OFF×Not used
5
MUSIC (CH1) selection. The music varies depending on the melody IC located on this circuit 
card. 6
7
8ON Not used
OFF×Not used
SW11-1 SW11-2Impedance of the External 
Music Source 0 (FM 0)
OFF OFF 600 Ω
ON OFF 8.2 Ω
OFF ON 47K Ω
SW11-3 SW11-4Impedance of the External 
Music Source 1 (FM 1)
OFF OFF 600 Ω
ON OFF 8.2 Ω
OFF ON...

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PH-CK16-A
Phase Lock Oscillator
6. External Interface
PLO leads appear on the LT connectors labeled EXCLK0 and EXCLK1.
PLO mounting slots
The PLO card is mounted in Slots 21 and 23 of TSWM.
LT cable connectors
Connect the LT cables to the connectors labeled EXCLK0 and EXCLK1 on the TSWM backplane.
Figure 3-12   PLO Pin Assignments for Receiving Clock (4 IMG System) (1/2) 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23
EXCLK0EXCLK1...

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PH-CK16-A
Phase Lock Oscillator
EXCLK0/EXCLK1 connector Pin Assignment
Pins are assigned as follows on the EXCLK0/EXCLK1 connectors. When the clock is distributed from a
digital interface, use one pair of DIUxxx in one of the 4 inputs. (There are a maximum of 4 inputs.) DIU
leads have the following precedence: DIU0xx (high) 
➝ DIU3xx (low).
Figure 3-12   PLO Pin Assignments for Receiving Clock (4 IMG System) (2/2)
PLO input leads appear on the LT connectors...