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NEC Neax 2400 Imx Circuit Card Manual

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Page 191

CHAPTER 3 ND-70182 (E)
Page 176
Revision 4.0
PH-CK16-A
Phase Lock Oscillator
LT cable connectors
Connect LT cables to the connectors labeled EXCLK0 and EXCLK! on the ISWM backplane.
Figure 3-13   PLO Pin Assignment for Receiving Clock (ISW) (1/2)
EXCLK0/EXCLK1 connector Pin Assignment
Pins are assigned as follows on the EXCLK0/EXCLK1 connectors. When the clock is distributed from a
digital interface, use one pair of DIUxxx in one of the 4 inputs. (There are a maximum of 4 inputs.) DIU
leads have the...

Page 192

ND-70182 (E) CHAPTER 3
Page 177
Revision 4.0
PH-CK16-A
Phase Lock Oscillator
Cable Connection Diagram
Provide the following wiring at the MDF. Figure 3-14 shows an example of a system that has the PLO cards
in dual configuration.
Figure 3-14   Cable Connection Diagram (ISW) for Accepting Synchronization Clocks from an External 
High-Stability Oscillator
MDF ISW
External
High-Stability
Oscillator #1
CLK
External
High-Stability
Oscillator #0
CLK PCM Cable(IP) PCM Cable(IP)
DCSA
DCSB LT Connector Cable...

Page 193

CHAPTER 3 ND-70182 (E)
Page 178
Revision 4.0
PH-CK16-A
Phase Lock Oscillator
Figure 3-15 shows an example of distributing clock from a digital interface in LN. This example assumes that
the Digital Trunk POUT leads are used as the first clock distribution route.
Figure 3-15   Cable Connection Diagram (ISW) for Receiving Clock from Digital Interface
MDF
ISWLN
PCM
Carrier
Equipment
DSU
CLK PCM Cable (2P)
to other node
Installation CableInstallation Cable maximum 100
meters (330 feet)...

Page 194

ND-70182 (E) CHAPTER 3
Page 179
Revision 4.0
PH-CK16-A
Phase Lock Oscillator
Figure 3-16   LT Connector Lead Location of PLO (ISW-LN0)
261 LEAD
NAMELEAD
NAME
272
283 PIN
No. PIN
No.
294
305 FM1
FM0
316
327
338
349
35
3610
11E
DIU 3B
DIU 2BDIU 3A
DIU 2AE
DIU 1B
DIU 1A
DIU 0B
DIU 0A
CLK00
(Slot No.08) CLK10
(Slot No.12)
TSWM1
TSWM0 ISWM
Installation Cable DIU Connection Note
MDF
To Digital Interface
EXCLK0
(Slot No.21)
PLO CLOCK0
(Slot No.21)
EXCLK1
(Slot No.23)
PLO CLOCK1
(Slot No.23)PLO CLOCK0
(Slot...

Page 195

CHAPTER 3 ND-70182 (E)
Page 180
Revision 4.0
PH-CK16-A
Phase Lock Oscillator
Figure 3-17 shows an example of distributing clock from a digital interface. This figure assumes that the Digital
Trunk POUT leads are used as the first clock distribution route.
Figure 3-17   Cable Connection Diagram (4-IMG System/LN) for Receiving Clock from Digital Interface
DIU0A1
DIU0B1
DIU1A1
DIU1B1
DIU2A1
DIU2B1
DIU3A1
DIU3B1
DIU0A0
DIU0B0
DIU1A0
DIU1B0
DIU2A0
DIU2B0
DIU3A0
DIU3B0
RA
RB
TA
TB
POUT A
POUT BPCM Cable (2P)...

Page 196

ND-70182 (E) CHAPTER 3
Page 181
Revision 4.0
PH-CK16-A
Phase Lock Oscillator
Figure 3-18   Connection of External Music-On-Hold
7. Switch Setting Sheet
SWITCH NAME SWITCH SHAPE
MB
SW01
SW02
SW03
SW10
SW11
SW12
ISW-LN PLO CA-A cable/
34PH ISWM EXCLK CA-A
Pin Assignment
PIN
No.
26
27
28
29
30
31
32
33LEAD
NAME
FM1
FM0LEAD
NAME
E
E PIN
No.
1
2
3
4
5
6
7
8
9MUSIC
SOURCE MDFISW-LN PLO CA-A/
34PH ISWM EXCLK CA-A and
Installation Cable(25 P)
Multiple connections between systems 0 and 1
are required on the MDF....

Page 197

CHAPTER 3 ND-70182 (E)
Page 182
Revision 4.0
PH-CK17
Phase Lock Oscillator
PH-CK17
Phase Lock Oscillator
1. General Function
This circuit card, used together with a direct digital interface circuit card, sets up network synchronization
with the network. Since this circuit card provides a high precision base clock oscillator, the 4 IMG system
can be a clock source office for the digital network. As seen in Figure 3-19, the PLO can be redundant re-
gardless of the system switching network selection.
Figure...

Page 198

ND-70182 (E) CHAPTER 3
Page 183
Revision 4.0
PH-CK17
Phase Lock Oscillator
The source clock of the clock subordinate office is either the digital clock supply (DCS) or the digital interface
clock (DIU0 - DIU3). When clock source failure has occurred, the PLO chooses another clock source automat-
ically in the order of:
1. DCS
2. DIU0
3. DIU1
4. DIU2
5. DIU3
6. PLO changeover or the PLO internal oscillator drifting 
The PLO can output the clock signals (CLK) and the frame head signals (FH) as follows:...

Page 199

CHAPTER 3 ND-70182 (E)
Page 184
Revision 4.0
PH-CK17
Phase Lock Oscillator
The MUSIC ROM also located on this circuit card contains the hold tone, and is supplied to the TSW circuit
card. When an external music on hold is applied to the 4 IMG system, this circuit card provides the interface for
the external hold tone source.
Figure 3-20   Music Source
SELSEL
SEL
Speech Path Memory
for Music/Tone
Music/Tone
MUSIC ROM
TDSW00PLO#0
TONE ROM
SELSEL
SEL
Speech Path Memory
for Music/Tone
Music/Tone
MUSIC ROM...

Page 200

ND-70182 (E) CHAPTER 3
Page 185
Revision 4.0
PH-CK17
Phase Lock Oscillator
2. Mounting Location/Condition
This circuit card is mounted in the TSWM of the slot shown below.
3. Face Layout of Lamps, Switches, and Connectors
The face layout of lamps, switches, and connectors is shown in Figure 3-21.
Figure 3-21   Face Layout of PH-CK17 (PLO) 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19
20212223
Mounting ModuleTSWM
TSWM
PLO 0 PLO 1
1   2  3  4  
1   2    
SW06
SW05
SW04
MB ACT
1   2  3  4  5...
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