Acer Travelmate 7300 Service Guide

1-18Service Guide
1.6  System Configurations and Specifications
1.6.1  System Memory Map
Table 1-8 System Memory Map
Address RangeDefinitionFunction
000000 -09FFFF 640 KB memory Base memory
0A0000 -0BFFFF 128 KB video RAM Reserved for graphics display buffer
0C0000 -0CBFFF Video BIOS Video BIOS
0CC000 -0CDFFF
0CE000 -0CFFFFSystem CardBus
Mini dock CardBus
0F0000 -0FFFFF 64 KB system BIOS System BIOS
010000 -07FFFF
080000 -027FFFExtended memory Onboard memory
SIMM memory
FE0000 -FFFFFF 256 KB system ROM...

System Introduction1-19
Table 1-10 I/O Address Map
Address RangeDevice
070 -071
080 -08F
0A0 -0A1
0C0 -0DF
1F0 -1F7
3F6 -3F7
170 -177
376 -377
220 -22F
240 -24F
260 -26F
280 -28F
278 -27F
2E8 -2EF
2F8 -2FF
300 -301
310 -311
320 -321
330 -321
378 -37F
388 -38B
3BC -3BE
3B4, 3B5, 3BA
3C0 -3C5
3C6 -3C9
3C0 -3CF
3D0 -3DF
3E8 -3EF
3F0 -3F7
3F8 -3FF
CF8 -CFFReal-time clock and NMI mask
DMA page register
Interrupt controller-2
DMA controller-2
Hard disk select
Hard disk select
CD-ROM select
CD-ROM select
Audio...

1-20Service Guide
1.6.5  GPIO Port Definition Map
Table 1-12 GPIO Port Definition Map I
GPIO/SignalPin #I/ODescription
GPIO Pin Assignment: PIIX4
SUSA# (PX3_SUSA#) W20 O 0: Power down clock generator
GPO0 (PX3_DOCKRST#) G4 O 0 : Enable docking reset
GPO1 (PX3_HDPON) Y15 O 1: Turn on HDD power
GPO2 (PX3_ CD/FDPON) T14 O 1: Turn on CD/FDD power
GPO3 (PX3_ HDRST#) W14 O 0: Reset HDD interface
GPO4 (PX3_CDRST#) U13 O 0: Reset CD interface
GPO5 (PX3_3MODE) V13 O 0: 3 mode drive
GPO6 (PX3_SMBSEL0) Y13 O Select...

System Introduction1-21
Table 1-12 GPIO Port Definition Map I
GPIO/SignalPin #I/ODescription
GPI1 (DK3_DOCKIRQ#) P19 O 0: Detect Docking IRQ
GPI2/REQA#  (PX3_OEM0) M1 O OEM detection
GPI3/REQB#  (SM5_BAYSW) N2 O Detect FDD/CD bay   1: installed, 0: not installed
GPI4/REQC# (CF5_FDD/CD#) P3 O Detect FDD or CD installed   1: FDD, 0: CD
GPI5/APICREQ# K18 O NC
GPI6/IRQ8# (RT3_IRQ8#) Y20 O 0: RTC wake
GPI7/SERIRQ (PM3_IRQSER) J19 O Serial IRQ
GPI8/THRM# (SM5_OVTMP#) H19 O 0: Enable over temperature of  CPU or...

1-22Service Guide
Table 1-13 GPIO Port Definition Map II
GPIOI/ODescription
P1.7 (IS5_IRQ12) O IRQ12
P2.0 (KB5_MEMB0A0) I Address 0 of memory bank 0
P2.1 (KB5_MEMB0A1) I Address 1 of memory bank 0
P2.2 (KB5_MODE) I Detect KBD mode (1:US/EC 0:Japan)
P2.3 I NC
P2.4 (KB5_MEMB1A0) I Address 0 of memory bank 1
P2.5 (KB5_PSWD) I Enable Password
P2.6 (KB5_MEMB1A1) I Address 1 of memory bank 1
P2.7 (PX3_OEM0) I Address 1 of memory bank 1
P3.0 (SM5_TXD) I Receiving data from SMC to KBC
P3.1 (SM5_RXD) O...

System Introduction1-23
Table 1-13 GPIO Port Definition Map II
GPIOI/ODescription
P2.1 O NC
P2.2 (SM5_BAYSW) I Detect FDD/CD bay installed or not
P2.3 O NC
P2.4 O NC
P2.5 O NC
P2.6 O NC
P2.7 O NC
P3.0 (SM5_RXD) I Receiving data from KBC to SMC
P3.1 (SM5_TXD) O Transmitting data from SMC to KBC
P3.2 (SM5_DOCKSW) I Dock switch sense
P3.3 (CF5_DOCKED) I Detect completely docked or not
P3.4 (SM5_LIDSW) I Lid switch sense
P3.5 (SM5_OVTMP#) O CPU or system over temperature
P3.6 O NC
P3.7 (SM5_ON_RES_SW) O...

1-24Service Guide
DeviceDevice IDAssignment
MTXC North Bridge 0 AD11
PIIX4 ISA Bridge 1 AD18 (Function 0)
PIIX4 IDE controller 1 AD18 (Function 1)
PIIX4 USB controller 1 AD18 (Function 2)
PIIX4 PM/SMBUS controller 1 AD18 (Function 3)
PCI VGA(NM2160) 2 AD13
PCI Cardbus controller A AD21
PCI Ethernet (Am79C970A) (ACER Dock III) C AD23
PCI CardBus (TI 1131) (ACER Dock V) C AD23
1.6.7 Power Management
Power Management in this design is aimed toward the conservation of power on the device and
system level...

System Introduction1-25
1.6.7.1 PMU Timers
There are several  devices related timers available on the V1-LS chip.  Each timer may have zero or
more devices assigned to the timer for the purpose of retriggering the timer.
Table 1-15 PMU Timers List
ItemDescriptions
Video timer
Timer value 30sec, 1min, 1.5min, 2min, 2.5min, 3min, 3.5min, 4min, 4.5min, 5min, 6min, 7min,
8min, 9min, 10min, 15min, 20min, 30min(if AC plugged-in)
System activities
and timer retriggersSystem activities
- The video display (CRT...

1-26Service Guide
Table 1-15 PMU Timers List
ItemDescriptions
System activities
and timer retriggersSystem activities
- Power off either or both FDD and CD-ROM. Tri-state FDD and CD-ROM
interfaces and stop IDE controller clock.
Timer retriggers
- The I/O access to 3F2, 3F4, 3F5(FDD), 3F7, 376(CD ROM) will retrigger the
timer.
Detective hardware
change1.   The PX3_FDDBEN signal on pin-M3 of U21(PIIX4) is from L to H.  CD-ROM
buffer is disabled.
2.   The pin-T14(PX3_CD/FDPON) of U21(PIIX4) is from H to L,...

System Introduction1-27
3.  CD-ROM Reset [pin-U13 of U21(PX3_CDRST#) of PIIX4].  The reset pin is used to assert
the hard reset needed for the CD-ROM during power up.  The reset pin is asserted before
CD-ROM power up and is deasserted after CD-ROM power up and before the buffer is
enabled.
· Floppy
The floppy has two components involved in the process.  The floppy drive and the  controller
imbedded in the 87338 super I/O chip.  The FDC enable/disabled function is controlled by
87338 chip.  In power...