Acer Travelmate 7100 Service Guide

Major Chips Description2-63Table 2-7CL-PD6832 Pin DescriptionsPin NameDescriptionPin NumberI/OPowerPERR#
Parity Error: The CL-PD6832 drives this
output active (low) if it detects a data parity
error during a write phase.33I/O4SERR#
System Error: This output is pulsed by the CL-
PD6832 to indicate an address parity error.34O-
OD4PAR
Parity: This pin is sampled the clock cycle
after completion of each corresponding
address or write data phase. For read
operations this pin is driven from the cycle after...

2-64Service GuideTable 2-7CL-PD6832 Pin DescriptionsPin NameDescriptionPin NumberI/OPowerSOUT#/
INTC#/
ISLDSerial Interrupt Output / PCI Bus Interrupt C
/ Serial IRQ Load: In PCI Interrupt Signaling
mode, this output can be used as an interrupt
output connected to the PCI bus INTC#
interrupt line. In PC/PCI Serial Interrupt
Signaling mode, this pin is the serial interrupt
output, SOUT#. In External-Hardware Interrupt
Signaling mode, this pin is the load signal,
ISLD, used to load the serially...

Major Chips Description2-65Table 2-7CL-PD6832 Pin DescriptionsPin NameDescriptionPin No.(socket A)Pin No.(socketB)I/OPowerSocket Interface Pins-REG/
CC/BE3#Register Access: In Memory Card
Interface mode, this output chooses
between attribute and common memory. In
l/O Card Interface mode, this signal is
active (low) for non DMA transfers and high
for DMA  transfers.  In ATA mode this
signal is always high.  In CardBus mode,
this pin is the command and byte enables.112188I/O2 or 3A[25:24]/
CAD[19,17]PCMCIA...

2-66Service GuideTable 2-7CL-PD6832 Pin DescriptionsPin NameDescriptionPin No.(socket A)Pin No.(socketB)I/OPowerA13/
CPARPCMCIA socket address 13 output.  In
CardBus mode, this pin is the Cardbus PAR
signal.84159I/O2 or 3A12/
CC/BE2#PCMCIA socket address 12 output.  In
CardBus mode, this pin is the Cardbus
C/BE2# signal.97173I/O2 or 3A[11:9]/
CAD[12,9,14]PCMCIA socket address 11:9 outputs.  In
CardBus mode, these pins are the Cardbus
address/data bits 12, 9, and 14,
respectively.77, 73,
80153,
149,...

Major Chips Description2-67Table 2-7CL-PD6832 Pin DescriptionsPin NameDescriptionPin No.(socket A)Pin No.(socketB)I/OPower-OE/
CAD11Output Enable: This output goes
active(low) to indicate a memory read from
the PCMCIA socket to the CL-PD6832.  In
CardBus mode, this pin is the Cardbus
address/data bit 11.75151I/O2 or 3-WE/
CGNT#Write Enable: This output goes active(low)
to indicate a memory write from the CL-
PD6832 to the PCMCIA socket.  In CardBus
mode, this pin is the CardBus GNT# signal.89165I/O2 or...

2-68Service GuideTable 2-7CL-PD6832 Pin DescriptionsPin NameDescriptionPin No.(socket A)Pin No.(socketB)I/OPower-CD[2:1]/
CCD[2:1]#Card Detect: These inputs indicate to the
CL-PD6832  that a card is in the socket.
They are internally pulled high to the
voltage of the +5V power pin.  In CardBus
mode, these inputs are used in conjunction
with CVS[2:1] to detect the presence and
type of card.126, 61202,
136 I-PU1-CE2/
CAD10Card Enable pin is driven low by the CL-
PD6832 during card access cycles to
control...

Major Chips Description2-69Table 2-7CL-PD6832 Pin DescriptionsPin NameDescriptionPin No.(socket A)Pin No.(socketB)I/OPowerBVD1/
-STSCHG/
-RI/
-CSTSCHGBattery Voltage Detect 1 / Status Change
/ Ring Indicate: In Memory Card Interface
mode, this input serves as the BVD1
(battery-dead status) input. In I/O Card
Interface mode, this input is the -STSCHG
input, which indicates to the CL-PD6832
that the cards internal status has changed.
If bit 7 of the Interrupt and General Control
register is set to ‘1’,...

2-70Service GuideTable 2-7CL-PD6832 Pin DescriptionsPin NameDescriptionPin NumberI/OPowerPower Control and General Interface PinsSPKR_OUTt
Speaker Output: This output can be used as a
digital output to a speaker to allow a system to
support PCMCIA  card fax/modem/voice and
audio sound output.  This output is enabled by
setting the socket’s Misc Control 1 register bit 4
to ‘1’(for the socket whose speaker signal is to
be directed from BVD2/-SPKR/-LED to this
pin). This pin is used for configuration...

Major Chips Description2-71Table 2-7CL-PD6832 Pin DescriptionsPin NameDescriptionPin NumberI/OPowerSLATCH/
SMBLCKtSerial Latch / System Management Bus
Clock: This pin serves as output pin SLATCH
when used with the serial interface of Texas
Instruments TPS2202AIDF socket power
control chip, and serves as a bidirectional pin
SMBCLK when used with Intels System
Management Bus used by Maxims socket
power control chip. This pin is open drain in the
SMB mode of operation. In this mode an
external pull up is...

2-72Service Guide2.8 Ambit T62.036.C DC-DC Converter
This T62.036.C DC-DC converter supplies multiple DC(5V, 3,3V, 12V) output to system, and also
supplies the battery charge current (0~3.5A).   The total inputs from the notebook would be limited
by the total output of 65 watts maximum.
2.8.1 Pin Diagram2 - VDCF
4 - VDCF
6 - GND
8 - DCIN
10 - DCIN
12 - CHARGON
14 - CHARGSP
16 - GND
18 - CHARGOUT
20 - CHARGOUTCN1VDCF - 1
VDCF - 3
GND - 5
DCIN - 7
DCIN - 9
CHARGCL - 11
CHARGFB - 13
GND - 15
CHARGOUT - 17...